LLVM: lib/CodeGen/InterferenceCache.h Source File (original) (raw)
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14#ifndef LLVM_LIB_CODEGEN_INTERFERENCECACHE_H
15#define LLVM_LIB_CODEGEN_INTERFERENCECACHE_H
16
22#include
23#include
24#include
25
26namespace llvm {
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35 struct BlockInterference {
36 unsigned Tag = 0;
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40 BlockInterference() = default;
41 };
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45 class Entry {
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51 unsigned Tag = 0;
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54 unsigned RefCount = 0;
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71 struct RegUnitInfo {
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77 unsigned VirtTag;
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86 VirtI.setMap(LIU.getMap());
87 }
88 };
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98 void update(unsigned MBBNum);
99
100 public:
101 Entry() = default;
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104 assert(!hasRefs() && "Cannot clear cache entry with references");
106 MF = mf;
107 Indexes = indexes;
108 LIS = lis;
109 }
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111 MCRegister getPhysReg() const { return PhysReg; }
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113 void addRef(int Delta) { RefCount += Delta; }
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115 bool hasRefs() const { return RefCount > 0; }
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127 BlockInterference *get(unsigned MBBNum) {
128 if (Blocks[MBBNum].Tag != Tag)
129 update(MBBNum);
130 return &Blocks[MBBNum];
131 }
132 };
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137 enum { CacheEntries = 32 };
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145 unsigned char* PhysRegEntries = nullptr;
146 size_t PhysRegEntriesCount = 0;
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149 unsigned RoundRobin = 0;
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152 Entry Entries[CacheEntries];
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157public:
162 free(PhysRegEntries);
163 }
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165 void reinitPhysRegEntries();
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178 Entry *CacheEntry = nullptr;
179 const BlockInterference *Current = nullptr;
180 static const BlockInterference NoInterference;
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182 void setEntry(Entry *E) {
183 Current = nullptr;
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186 if (CacheEntry)
187 CacheEntry->addRef(-1);
188 CacheEntry = E;
189 if (CacheEntry)
190 CacheEntry->addRef(+1);
191 }
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193 public:
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198 setEntry(O.CacheEntry);
199 }
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202 setEntry(O.CacheEntry);
203 return *this;
204 }
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212 setEntry(nullptr);
214 setEntry(Cache.get(PhysReg));
215 }
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219 Current = CacheEntry ? CacheEntry->get(MBBNum) : &NoInterference;
220 }
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224 return Current->First.isValid();
225 }
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230 return Current->First;
231 }
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236 return Current->Last;
237 }
238 };
239};
240
241}
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243#endif
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
#define LLVM_LIBRARY_VISIBILITY
This file defines the SmallVector class.
SlotIndex first()
first - Return the starting index of the first interfering range in the current block.
Definition InterferenceCache.h:229
SlotIndex last()
last - Return the ending index of the last interfering range in the current block.
Definition InterferenceCache.h:235
~Cursor()
Definition InterferenceCache.h:206
Cursor & operator=(const Cursor &O)
Definition InterferenceCache.h:201
Cursor(const Cursor &O)
Definition InterferenceCache.h:197
bool hasInterference()
hasInterference - Return true if the current block has any interference.
Definition InterferenceCache.h:223
void moveToBlock(unsigned MBBNum)
moveTo - Move cursor to basic block MBBNum.
Definition InterferenceCache.h:218
Cursor()=default
Cursor - Create a dangling cursor.
void setPhysReg(InterferenceCache &Cache, MCRegister PhysReg)
setPhysReg - Point this cursor to PhysReg's interference.
Definition InterferenceCache.h:209
InterferenceCache & operator=(const InterferenceCache &other)=delete
InterferenceCache(const InterferenceCache &other)=delete
InterferenceCache()=default
unsigned getMaxCursors() const
getMaxCursors - Return the maximum number of concurrent cursors that can be supported.
Definition InterferenceCache.h:174
~InterferenceCache()
Definition InterferenceCache.h:161
Union of live intervals that are strong candidates for coalescing into a single register (either phys...
LiveSegments::iterator SegmentIter
unsigned getTag() const
getTag - Return an opaque tag representing the current state of the union.
const Map & getMap() const
This class represents the liveness of a register, stack slot, etc.
Segments::iterator iterator
Wrapper class representing physical registers. Should be passed by value.
constexpr bool isValid() const
static constexpr unsigned NoRegister
SlotIndex - An opaque wrapper around machine indexes.
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This is an optimization pass for GlobalISel generic memory operations.
@ First
Helpers to iterate all locations in the MemoryEffectsBase class.