LLVM: lib/MCA/HardwareUnits/LSUnit.cpp Source File (original) (raw)

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19#define DEBUG_TYPE "llvm-mca"

20

21namespace llvm {

22namespace mca {

23

25 bool AssumeNoAlias)

26 : LQSize(LQ), SQSize(SQ), UsedLQEntries(0), UsedSQEntries(0),

27 NoAlias(AssumeNoAlias) {

29 const MCExtraProcessorInfo &EPI = SM.getExtraProcessorInfo();

30 if (!LQSize && EPI.LoadQueueID) {

31 const MCProcResourceDesc &LdQDesc = *SM.getProcResource(EPI.LoadQueueID);

32 LQSize = std::max(0, LdQDesc.BufferSize);

33 }

34

35 if (!SQSize && EPI.StoreQueueID) {

36 const MCProcResourceDesc &StQDesc = *SM.getProcResource(EPI.StoreQueueID);

37 SQSize = std::max(0, StQDesc.BufferSize);

38 }

39 }

40}

41

42LSUnitBase::~LSUnitBase() = default;

43

45 for (const std::pair<unsigned, std::unique_ptr> &G : Groups)

46 G.second->cycleEvent();

47}

48

49#ifndef NDEBUG

55 dbgs() << "\n";

56 for (const auto &GroupIt : Groups) {

57 const MemoryGroup &Group = *GroupIt.second;

58 dbgs() << "[LSUnit] Group (" << GroupIt.first << "): "

64 << ", #IExecuted = " << Group.getNumExecuted() << '\n';

65 }

66}

67#endif

68

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81 unsigned NewGID = createMemoryGroup();

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86 unsigned ImmediateLoadDominator =

88 if (ImmediateLoadDominator) {

89 MemoryGroup &IDom = getGroup(ImmediateLoadDominator);

90 LLVM_DEBUG(dbgs() << "[LSUnit]: GROUP DEP: (" << ImmediateLoadDominator

91 << ") --> (" << NewGID << ")\n");

93 }

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95

100 << ")\n");

102 }

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109 << ") --> (" << NewGID << ")\n");

111 }

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114 if (IsStoreBarrier)

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119 if (IsLoadBarrier)

121 }

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123 return NewGID;

124 }

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127

128 unsigned ImmediateLoadDominator =

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143 bool ShouldCreateANewGroup =

144 IsLoadBarrier || !ImmediateLoadDominator ||

147 getGroup(ImmediateLoadDominator).isExecuting();

148

149 if (ShouldCreateANewGroup) {

150 unsigned NewGID = createMemoryGroup();

151 MemoryGroup &NewGroup = getGroup(NewGID);

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154

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159 << ") --> (" << NewGID << ")\n");

161 }

162

163

164 if (IsLoadBarrier) {

165 if (ImmediateLoadDominator) {

166 MemoryGroup &LoadGroup = getGroup(ImmediateLoadDominator);

167 LLVM_DEBUG(dbgs() << "[LSUnit]: GROUP DEP: (" << ImmediateLoadDominator

168 << ") --> (" << NewGID << ")\n");

170 }

171 } else {

172

177 << ")\n");

179 }

180 }

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183 if (IsLoadBarrier)

185 return NewGID;

186 }

187

188

192}

193

202

207 assert((IsALoad || IsAStore) && "Expected a memory operation!");

208

209 if (IsALoad) {

211 LLVM_DEBUG(dbgs() << "[LSUnit]: Instruction idx=" << IR.getSourceIndex()

212 << " has been removed from the load queue.\n");

213 }

214

215 if (IsAStore) {

217 LLVM_DEBUG(dbgs() << "[LSUnit]: Instruction idx=" << IR.getSourceIndex()

218 << " has been removed from the store queue.\n");

219 }

220}

221

225 return;

226

228 auto It = Groups.find(GroupID);

229 assert(It != Groups.end() && "Instruction not dispatched to the LS unit");

230 It->second->onInstructionExecuted(IR);

231 if (It->second->isExecuted())

233

234 if (!isValidGroupID(GroupID)) {

243 }

244}

245

246}

247}

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

A Load/Store unit class that models load/store queues and that implements a simple weak memory consis...

Legalize the Machine IR a function s Machine IR

This file defines abstractions used by the Pipeline to model register reads, register writes and inst...

An InstRef contains both a SourceMgr index and Instruction pair.

bool isAStoreBarrier() const

bool isALoadBarrier() const

An instruction propagated through the simulated instruction pipeline.

unsigned getLSUTokenID() const

unsigned getUsedSQEntries() const

unsigned getUsedLQEntries() const

bool assumeNoAlias() const

unsigned getLoadQueueSize() const

Returns the total number of entries in the load queue.

LSUnitBase(const MCSchedModel &SM, unsigned LoadQueueSize, unsigned StoreQueueSize, bool AssumeNoAlias)

Definition LSUnit.cpp:24

unsigned getStoreQueueSize() const

Returns the total number of entries in the store queue.

A node of a memory dependency graph.

unsigned getNumInstructions() const

unsigned getNumExecutingPredecessors() const

unsigned getNumExecuting() const

unsigned getNumPredecessors() const

void addSuccessor(MemoryGroup *Group, bool IsDataDependent)

unsigned getNumExecuted() const

unsigned getNumExecutedPredecessors() const

void dump() const override

Definition LSUnit.cpp:50

unsigned CurrentLoadGroupID

Status isAvailable(const InstRef &IR) const override

Returns LSU_AVAILABLE if there are enough load/store queue entries to accomodate instruction IR.

Definition LSUnit.cpp:194

DenseMap< unsigned, std::unique_ptr< MemoryGroup > > Groups

Used to map group identifiers to MemoryGroups.

unsigned CurrentStoreGroupID

void cycleEvent() override

Definition LSUnit.cpp:44

void onInstructionExecuted(const InstRef &IR) override

Definition LSUnit.cpp:222

unsigned CurrentLoadBarrierGroupID

void onInstructionRetired(const InstRef &IR) override

Definition LSUnit.cpp:203

unsigned dispatch(const InstRef &IR) override

Allocates LS resources for instruction IR.

Definition LSUnit.cpp:69

unsigned CurrentStoreBarrierGroupID

This is an optimization pass for GlobalISel generic memory operations.

LLVM_ABI raw_ostream & dbgs()

dbgs() - This returns a reference to a raw_ostream for debugging messages.

Machine model for scheduling, bundling, and heuristics.

bool hasExtraProcessorInfo() const