LanaiInstPrinter.cpp Source File (original) (raw)

23using namespace llvm;

25#define DEBUG_TYPE "asm-printer"

28#define PRINT_ALIAS_INSTR

29#include "LanaiGenAsmWriter.inc"

37 unsigned OpNo1) {

38 OS << "\t" << Alias << " ";

40 OS << ", ";

42 return true;

43}

46 unsigned AluCode = MI->getOperand(3).getImm();

48 (MI->getOperand(2).getImm() == AddOffset ||

49 MI->getOperand(2).getImm() == -AddOffset);

50}

53 unsigned AluCode = MI->getOperand(3).getImm();

55}

58 unsigned AluCode = MI->getOperand(3).getImm();

60}

63 if (MI->getOperand(2).getImm() < 0)

64 return "--";

65 return "++";

66}

68bool LanaiInstPrinter::printMemoryLoadIncrement(const MCInst *MI,

71 int AddOffset) {

76 return true;

77 }

79 OS << "\t" << Opcode << "\t[%"

82 return true;

83 }

84 return false;

85}

87bool LanaiInstPrinter::printMemoryStoreIncrement(const MCInst *MI,

90 int AddOffset) {

92 OS << "\t" << Opcode << "\t%" << getRegisterName(MI->getOperand(0).getReg())

95 return true;

96 }

98 OS << "\t" << Opcode << "\t%" << getRegisterName(MI->getOperand(0).getReg())

101 return true;

102 }

103 return false;

104}

105

107 switch (MI->getOpcode()) {

108 case Lanai::LDW_RI:

109

110

111

112

113 return printMemoryLoadIncrement(MI, OS, "ld", 4);

114 case Lanai::LDHs_RI:

115 return printMemoryLoadIncrement(MI, OS, "ld.h", 2);

116 case Lanai::LDHz_RI:

117 return printMemoryLoadIncrement(MI, OS, "uld.h", 2);

118 case Lanai::LDBs_RI:

119 return printMemoryLoadIncrement(MI, OS, "ld.b", 1);

120 case Lanai::LDBz_RI:

121 return printMemoryLoadIncrement(MI, OS, "uld.b", 1);

122 case Lanai::SW_RI:

123

124

125

126

127 return printMemoryStoreIncrement(MI, OS, "st", 4);

128 case Lanai::STH_RI:

129 return printMemoryStoreIncrement(MI, OS, "st.h", 2);

130 case Lanai::STB_RI:

131 return printMemoryStoreIncrement(MI, OS, "st.b", 1);

132 default:

133 return false;

134 }

135}

136

145

149 if (Op.isReg())

151 else if (Op.isImm())

153 else {

154 assert(Op.isExpr() && "Expected an expression");

155 MAI.printExpr(OS, *Op.getExpr());

156 }

157}

158

162 if (Op.isImm()) {

163 OS << '[' << formatHex(Op.getImm()) << ']';

164 } else {

165

166 assert(Op.isExpr() && "Expected an expression");

167 OS << '[';

168 MAI.printExpr(OS, *Op.getExpr());

169 OS << ']';

170 }

171}

172

176 if (Op.isImm()) {

178 } else {

179

180 assert(Op.isExpr() && "Expected an expression");

181 MAI.printExpr(OS, *Op.getExpr());

182 }

183}

184

188 if (Op.isImm()) {

189 OS << formatHex((Op.getImm() << 16) | 0xffff);

190 } else {

191

192 assert(Op.isExpr() && "Expected an expression");

193 MAI.printExpr(OS, *Op.getExpr());

194 }

195}

196

200 if (Op.isImm()) {

201 OS << formatHex(0xffff0000 | Op.getImm());

202 } else {

203

204 assert(Op.isExpr() && "Expected an expression");

205 MAI.printExpr(OS, *Op.getExpr());

206 }

207}

208

211 assert(RegOp.isReg() && "Register operand expected");

212 OS << "[";

214 OS << "*";

217 OS << "*";

218 OS << "]";

219}

220

221template

232

235 const MCOperand &RegOp = MI->getOperand(OpNo);

237 const MCOperand &AluOp = MI->getOperand(OpNo + 2);

238 const unsigned AluCode = AluOp.getImm();

239

240

242

243

245}

246

249 const MCOperand &RegOp = MI->getOperand(OpNo);

251 const MCOperand &AluOp = MI->getOperand(OpNo + 2);

252 const unsigned AluCode = AluOp.getImm();

254

255

256 OS << "[";

258 OS << "*";

261 OS << "*";

264 OS << "]";

265}

266

269 const MCOperand &RegOp = MI->getOperand(OpNo);

271 const MCOperand &AluOp = MI->getOperand(OpNo + 2);

272 const unsigned AluCode = AluOp.getImm();

273

274

276

277

279}

280

285

287 OS << "";

288 else

289 OS << lanaiCondCodeToString(CC);

290}

291

296

298 OS << "";

300 OS << "." << lanaiCondCodeToString(CC);

301}

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

std::pair< Instruction::BinaryOps, Value * > OffsetOp

Find all possible pairs (BinOp, RHS) that BinOp V, RHS can be simplified.

static bool isPostIncrementForm(const MCInst *MI, int AddOffset)

Definition LanaiInstPrinter.cpp:57

static StringRef decIncOperator(const MCInst *MI)

Definition LanaiInstPrinter.cpp:62

static void printMemoryBaseRegister(raw_ostream &OS, const unsigned AluCode, const MCOperand &RegOp)

Definition LanaiInstPrinter.cpp:209

static bool usesGivenOffset(const MCInst *MI, int AddOffset)

Definition LanaiInstPrinter.cpp:45

static void printMemoryImmediateOffset(const MCAsmInfo &MAI, const MCOperand &OffsetOp, raw_ostream &OS)

Definition LanaiInstPrinter.cpp:222

static bool isPreIncrementForm(const MCInst *MI, int AddOffset)

Definition LanaiInstPrinter.cpp:52

void printMemRrOperand(const MCInst *MI, int OpNo, raw_ostream &O)

Definition LanaiInstPrinter.cpp:247

static const char * getRegisterName(MCRegister Reg)

bool printAliasInstr(const MCInst *MI, uint64_t Address, raw_ostream &OS)

void printMemImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O)

Definition LanaiInstPrinter.cpp:159

void printMemRiOperand(const MCInst *MI, int OpNo, raw_ostream &O)

Definition LanaiInstPrinter.cpp:233

void printRegName(raw_ostream &OS, MCRegister Reg) override

Print the assembler register name.

Definition LanaiInstPrinter.cpp:31

void printHi16AndImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O)

Definition LanaiInstPrinter.cpp:185

void printMemSplsOperand(const MCInst *MI, int OpNo, raw_ostream &O)

Definition LanaiInstPrinter.cpp:267

void printInst(const MCInst *MI, uint64_t Address, StringRef Annot, const MCSubtargetInfo &STI, raw_ostream &O) override

Print the specified MCInst to the specified raw_ostream.

Definition LanaiInstPrinter.cpp:137

void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O)

Definition LanaiInstPrinter.cpp:146

void printCCOperand(const MCInst *MI, int OpNo, raw_ostream &O)

Definition LanaiInstPrinter.cpp:281

void printLo16AndImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O)

Definition LanaiInstPrinter.cpp:197

void printHi16ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O)

Definition LanaiInstPrinter.cpp:173

void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O)

void printPredicateOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O)

Definition LanaiInstPrinter.cpp:292

This class is intended to be used as a base class for asm properties and features specific to the tar...

void printExpr(raw_ostream &, const MCExpr &) const

format_object< int64_t > formatHex(int64_t Value) const

void printAnnotation(raw_ostream &OS, StringRef Annot)

Utility function for printing annotations.

Instances of this class represent a single low-level machine instruction.

Instances of this class represent operands of the MCInst class.

MCRegister getReg() const

Returns the register number.

Wrapper class representing physical registers. Should be passed by value.

Generic base class for all target subtargets.

StringRef - Represent a constant reference to a string, i.e.

LLVM_ABI std::string lower() const

This class implements an extremely fast bulk output stream that can only output to a stream.

static bool isPreOp(unsigned AluOp)

static const char * lanaiAluCodeToString(unsigned AluOp)

static unsigned encodeLanaiAluCode(unsigned AluOp)

static bool isPostOp(unsigned AluOp)

This is an optimization pass for GlobalISel generic memory operations.

constexpr bool isInt(int64_t x)

Checks if an integer fits into the given bit width.

MachineInstr * getImm(const MachineOperand &MO, const MachineRegisterInfo *MRI)

DWARFExpression::Operation Op