LLVM: include/llvm/CodeGen/GlobalISel/LegalizerHelper.h Source File (original) (raw)

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20#ifndef LLVM_CODEGEN_GLOBALISEL_LEGALIZERHELPER_H

21#define LLVM_CODEGEN_GLOBALISEL_LEGALIZERHELPER_H

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30namespace llvm {

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58private:

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106 LLT NarrowTy);

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112 LLT WideTy);

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124 unsigned TypeIdx, LLT NarrowTy);

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129 LLT MoreTy);

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143 unsigned ExtOpcode);

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154 unsigned TruncOpcode = TargetOpcode::G_TRUNC);

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160 unsigned ExtOpcode);

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181private:

183 widenScalarMergeValues(MachineInstr &MI, unsigned TypeIdx, LLT WideTy);

185 widenScalarUnmergeValues(MachineInstr &MI, unsigned TypeIdx, LLT WideTy);

187 widenScalarExtract(MachineInstr &MI, unsigned TypeIdx, LLT WideTy);

189 widenScalarInsert(MachineInstr &MI, unsigned TypeIdx, LLT WideTy);

191 LLT WideTy);

193 LLT WideTy);

195 LLT WideTy);

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206 void insertParts(Register DstReg, LLT ResultTy,

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213 void appendVectorElts(SmallVectorImpl &Elts, Register Reg);

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219 LLT extractGCDType(SmallVectorImpl &Parts, LLT DstTy,

220 LLT NarrowTy, Register SrcReg);

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225 void extractGCDType(SmallVectorImpl &Parts, LLT GCDTy,

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243 LLT buildLCMMergePieces(LLT DstTy, LLT NarrowTy, LLT GCDTy,

244 SmallVectorImpl &VRegs,

245 unsigned PadStrategy = TargetOpcode::G_ANYEXT);

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250 void buildWidenedRemergeToDst(Register DstReg, LLT LCMTy,

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256 void multiplyRegisters(SmallVectorImpl &DstRegs,

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260 void changeOpcode(MachineInstr &MI, unsigned NewOpcode);

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263 LLT SrcTy, LLT NarrowTy,

264 unsigned ScalarOpc);

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268 uint64_t KnownLen, Align Alignment,

269 bool IsVolatile);

271 uint64_t KnownLen, Align DstAlign,

272 Align SrcAlign, bool IsVolatile);

275 Align SrcAlign, bool IsVolatile);

277 uint64_t KnownLen, Align DstAlign, Align SrcAlign,

278 bool IsVolatile);

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282 MachineInstr &MI,

283 LostDebugLocObserver &LocObserver);

285 MachineInstr &MI,

286 LostDebugLocObserver &LocObserver);

288 MachineInstr &MI,

289 LostDebugLocObserver &LocObserver);

291 MachineInstr &MI,

292 LostDebugLocObserver &LocObserver);

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294 MachineInstrBuilder

295 getNeutralElementForVecReduce(unsigned Opcode, MachineIRBuilder &MIRBuilder,

296 LLT Ty);

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300 Type *OpType,

301 LostDebugLocObserver &LocObserver);

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304 unsigned Size, Type *OpType,

305 LostDebugLocObserver &LocObserver);

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307public:

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311 Align MinAlign = Align()) const;

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315 TypeSize Bytes, Align Alignment, MachinePointerInfo &PtrInfo);

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320 const SrcOp &Val);

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339 GenericMachineInstr &MI, unsigned NumElts,

340 std::initializer_list NonVecOpIndices = {});

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343 unsigned NumElts);

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346 unsigned TypeIdx, LLT MoreTy);

348 unsigned TypeIdx,

349 LLT MoreTy);

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352 unsigned TypeIdx,

353 LLT NarrowTy);

355 unsigned TypeIdx,

356 LLT NarrowTy);

358 MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy);

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364 LLT NarrowTy);

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367 const APInt &Amt,

368 LLT HalfTy,

369 LLT ShiftAmtTy);

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374 LLT TargetTy);

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380 const APInt &Amt,

381 LLT TargetTy,

382 LLT ShiftAmtTy);

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395 unsigned NumParts,

398 LLT TargetTy, LLT ShiftAmtTy);

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409 unsigned TypeIdx,

410 LLT NarrowTy);

412 unsigned TypeIdx,

413 LLT NarrowTy);

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418 unsigned TypeIdx, LLT NarrowTy);

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421 unsigned TypeIdx,

422 LLT NarrowTy);

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427 LLT NarrowTy);

432 unsigned TypeIdx, LLT Ty);

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453 unsigned TypeIdx, LLT CastTy);

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457 unsigned TypeIdx, LLT CastTy);

459 unsigned TypeIdx, LLT CastTy);

461 unsigned TypeIdx, LLT CastTy);

463 unsigned TypeIdx, LLT CastTy);

465 unsigned TypeIdx, LLT CastTy);

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538 unsigned MaxLen = 0);

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564#endif

unsigned const MachineRegisterInfo * MRI

static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")

This file describes how to lower LLVM calls to machine code calls.

Provides analysis for querying information about KnownBits during GISel passes.

This file declares the MachineIRBuilder class.

Promote Memory to Register

MachineInstr unsigned OpIdx

static constexpr MCPhysReg SPReg

Class for arbitrary precision integers.

ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...

Represents any generic load, including sign/zero extending variants.

Abstract class that contains various methods for clients to notify about changes.

Represents any type of generic load or store.

A base class for all GenericMachineInstrs.

LLVM_ABI LegalizeResult lowerShlSat(MachineInstr &MI)

LLVM_ABI LegalizeResult narrowScalarCTPOP(MachineInstr &MI, unsigned TypeIdx, LLT Ty)

LLVM_ABI LegalizeResult lowerThreewayCompare(MachineInstr &MI)

LLVM_ABI LegalizeResult lowerFPTRUNC_F64_TO_F16(MachineInstr &MI)

LLVM_ABI LegalizeResult equalizeVectorShuffleLengths(MachineInstr &MI)

Equalize source and destination vector sizes of G_SHUFFLE_VECTOR.

LLVM_ABI LegalizeResult bitcastInsertVectorElt(MachineInstr &MI, unsigned TypeIdx, LLT CastTy)

Perform Bitcast legalize action on G_INSERT_VECTOR_ELT.

LLVM_ABI LegalizeResult lowerSITOFP(MachineInstr &MI)

LLVM_ABI LegalizeResult lowerDynStackAlloc(MachineInstr &MI)

LLVM_ABI LegalizeResult lowerBitCount(MachineInstr &MI)

LLVM_ABI LegalizeResult narrowScalarMul(MachineInstr &MI, LLT Ty)

LLVM_ABI LegalizeResult lowerFMinNumMaxNum(MachineInstr &MI)

LLVM_ABI LegalizeResult lowerU64ToF64BitFloatOps(MachineInstr &MI)

LLVM_ABI LegalizeResult lowerSSUBE(MachineInstr &MI)

LLVM_ABI LegalizeResult lowerIntrinsicRound(MachineInstr &MI)

LLVM_ABI void widenScalarSrc(MachineInstr &MI, LLT WideTy, unsigned OpIdx, unsigned ExtOpcode)

Legalize a single operand OpIdx of the machine instruction MI as a Use by extending the operand's typ...

LLVM_ABI LegalizeResult moreElementsVectorShuffle(MachineInstr &MI, unsigned TypeIdx, LLT MoreTy)

LLVM_ABI LegalizeResult lowerSMULH_UMULH(MachineInstr &MI)

LLVM_ABI LegalizeResult lowerLoad(GAnyLoad &MI)

LLVM_ABI LegalizeResult fewerElementsVectorShuffle(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy)

LLVM_ABI LegalizeResult lowerAbsToAddXor(MachineInstr &MI)

LLVM_ABI void moreElementsVectorDst(MachineInstr &MI, LLT MoreTy, unsigned OpIdx)

Legalize a single operand OpIdx of the machine instruction MI as a Def by performing it with addition...

LLVM_ABI LegalizeResult lowerFConstant(MachineInstr &MI)

LLVM_ABI LegalizeResult narrowScalarCTTZ(MachineInstr &MI, unsigned TypeIdx, LLT Ty)

LLVM_ABI LegalizeResult lowerBitreverse(MachineInstr &MI)

LLVM_ABI LegalizeResult narrowScalarShift(MachineInstr &MI, unsigned TypeIdx, LLT Ty)

LLVM_ABI LegalizeResult lowerExtractInsertVectorElt(MachineInstr &MI)

Lower a vector extract or insert by writing the vector to a stack temporary and reloading the element...

LLVM_ABI LegalizeResult moreElementsVector(MachineInstr &MI, unsigned TypeIdx, LLT MoreTy)

Legalize a vector instruction by increasing the number of vector elements involved and ignoring the a...

LLVM_ABI LegalizeResult lowerFunnelShiftWithInverse(MachineInstr &MI)

LLVM_ABI LegalizeResult lowerAbsToMaxNeg(MachineInstr &MI)

LLVM_ABI LegalizeResult lowerFPTOINT_SAT(MachineInstr &MI)

LLVM_ABI LegalizeResult lowerEXT(MachineInstr &MI)

LLVM_ABI LegalizeResult lowerStore(GStore &MI)

LLVM_ABI LegalizeResult lowerAbsToCNeg(MachineInstr &MI)

LLVM_ABI LegalizeResult bitcastExtractSubvector(MachineInstr &MI, unsigned TypeIdx, LLT CastTy)

This attempts to bitcast G_EXTRACT_SUBVECTOR to CastTy.

LLVM_ABI LegalizeResult narrowScalarShiftMultiway(MachineInstr &MI, LLT TargetTy)

Multi-way shift legalization: directly split wide shifts into target-sized parts in a single step,...

LLVM_ABI LegalizeResult lowerSADDO_SSUBO(MachineInstr &MI)

LLVM_ABI MachineInstrBuilder createStackTemporary(TypeSize Bytes, Align Alignment, MachinePointerInfo &PtrInfo)

Create a stack temporary based on the size in bytes and the alignment.

LLVM_ABI Register buildConstantShiftPart(unsigned Opcode, unsigned PartIdx, unsigned NumParts, ArrayRef< Register > SrcParts, const ShiftParams &Params, LLT TargetTy, LLT ShiftAmtTy)

Generates a single output part for constant shifts using direct indexing.

LLVM_ABI void narrowScalarSrc(MachineInstr &MI, LLT NarrowTy, unsigned OpIdx)

Legalize a single operand OpIdx of the machine instruction MI as a Use by truncating the operand's ty...

LLVM_ABI LegalizeResult fewerElementsVectorPhi(GenericMachineInstr &MI, unsigned NumElts)

LLVM_ABI LegalizeResult lowerFPTOUI(MachineInstr &MI)

const TargetLowering & getTargetLowering() const

Definition LegalizerHelper.h:80

LLVM_ABI LegalizeResult narrowScalar(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy)

Legalize an instruction by reducing the width of the underlying scalar type.

LLVM_ABI LegalizeResult narrowScalarFPTOI(MachineInstr &MI, unsigned TypeIdx, LLT Ty)

LLVM_ABI LegalizeResult bitcastInsertSubvector(MachineInstr &MI, unsigned TypeIdx, LLT CastTy)

This attempts to bitcast G_INSERT_SUBVECTOR to CastTy.

LLVM_ABI LegalizeResult lowerUnmergeValues(MachineInstr &MI)

LLVM_ABI LegalizeResult bitcast(MachineInstr &MI, unsigned TypeIdx, LLT Ty)

Legalize an instruction by replacing the value type.

LLVM_ABI LegalizeResult scalarizeVectorBooleanStore(GStore &MI)

Given a store of a boolean vector, scalarize it.

LLVM_ABI LegalizeResult lowerBitcast(MachineInstr &MI)

LLVM_ABI LegalizeResult lowerMinMax(MachineInstr &MI)

LLVM_ABI LegalizeResult lowerFunnelShiftAsShifts(MachineInstr &MI)

LLVM_ABI LegalizeResult lowerInsert(MachineInstr &MI)

LLVM_ABI LegalizeResult lowerReadWriteRegister(MachineInstr &MI)

LLVM_ABI LegalizeResult lowerExtract(MachineInstr &MI)

LLVM_ABI LegalizeResult fewerElementsBitcast(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy)

LLVM_ABI LegalizeResult narrowScalarShiftByConstant(MachineInstr &MI, const APInt &Amt, LLT HalfTy, LLT ShiftAmtTy)

LLVM_ABI LegalizeResult lowerISFPCLASS(MachineInstr &MI)

LLVM_ABI LegalizeResult lowerAbsDiffToSelect(MachineInstr &MI)

LLVM_ABI LegalizeResult lowerAddSubSatToMinMax(MachineInstr &MI)

LLVM_ABI LegalizeResult lowerFPOWI(MachineInstr &MI)

LLVM_ABI LegalizeResult lowerFAbs(MachineInstr &MI)

LLVM_ABI LegalizeResult narrowScalarBasic(MachineInstr &MI, unsigned TypeIdx, LLT Ty)

GISelValueTracking * getValueTracking() const

Definition LegalizerHelper.h:81

LLVM_ABI LegalizeResult lowerVectorReduction(MachineInstr &MI)

const LegalizerInfo & getLegalizerInfo() const

Expose LegalizerInfo so the clients can re-use.

Definition LegalizerHelper.h:79

LLVM_ABI LegalizeResult reduceLoadStoreWidth(GLoadStore &MI, unsigned TypeIdx, LLT NarrowTy)

LLVM_ABI LegalizeResult fewerElementsVectorMultiEltType(GenericMachineInstr &MI, unsigned NumElts, std::initializer_list< unsigned > NonVecOpIndices={})

Handles most opcodes.

LLVM_ABI LegalizeResult narrowScalarSelect(MachineInstr &MI, unsigned TypeIdx, LLT Ty)

LLVM_ABI LegalizeResult narrowScalarShiftByConstantMultiway(MachineInstr &MI, const APInt &Amt, LLT TargetTy, LLT ShiftAmtTy)

Optimized path for constant shift amounts using static indexing.

LLVM_ABI MachineInstrBuilder createStackStoreLoad(const DstOp &Res, const SrcOp &Val)

Create a store of Val to a stack temporary and return a load as the same type as Res.

LLVM_ABI LegalizeResult lowerVAArg(MachineInstr &MI)

LegalizeResult

Definition LegalizerHelper.h:65

@ Legalized

Instruction has been legalized and the MachineFunction changed.

Definition LegalizerHelper.h:71

@ AlreadyLegal

Instruction was already legal and no change was made to the MachineFunction.

Definition LegalizerHelper.h:68

@ UnableToLegalize

Some kind of error has occurred and we could not legalize this instruction.

Definition LegalizerHelper.h:75

LLVM_ABI LegalizeResult moreElementsVectorPhi(MachineInstr &MI, unsigned TypeIdx, LLT MoreTy)

LLVM_ABI LegalizeResult lowerU64ToF32BitOps(MachineInstr &MI)

LLVM_ABI LegalizeResult lowerFCopySign(MachineInstr &MI)

LLVM_ABI LegalizeResult bitcastConcatVector(MachineInstr &MI, unsigned TypeIdx, LLT CastTy)

LLVM_ABI LegalizerHelper(MachineFunction &MF, GISelChangeObserver &Observer, MachineIRBuilder &B)

LLVM_ABI LegalizeResult lowerRotateWithReverseRotate(MachineInstr &MI)

LLVM_ABI LegalizeResult lowerSADDE(MachineInstr &MI)

LLVM_ABI LegalizeResult lower(MachineInstr &MI, unsigned TypeIdx, LLT Ty)

Legalize an instruction by splitting it into simpler parts, hopefully understood by the target.

LLVM_ABI LegalizeResult lowerFunnelShift(MachineInstr &MI)

LLVM_ABI LegalizeResult fewerElementsVector(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy)

Legalize a vector instruction by splitting into multiple components, each acting on the same scalar t...

GISelChangeObserver & Observer

To keep track of changes made by the LegalizerHelper.

Definition LegalizerHelper.h:56

LLVM_ABI void bitcastDst(MachineInstr &MI, LLT CastTy, unsigned OpIdx)

Legalize a single operand OpIdx of the machine instruction MI as a def by inserting a G_BITCAST from ...

LLVM_ABI LegalizeResult lowerFPTRUNC(MachineInstr &MI)

LLVM_ABI LegalizeResult lowerFMad(MachineInstr &MI)

LLVM_ABI LegalizeResult widenScalar(MachineInstr &MI, unsigned TypeIdx, LLT WideTy)

Legalize an instruction by performing the operation on a wider scalar type (for example a 16-bit addi...

LLVM_ABI LegalizeResult lowerAddSubSatToAddoSubo(MachineInstr &MI)

LLVM_ABI LegalizeResult narrowScalarExtract(MachineInstr &MI, unsigned TypeIdx, LLT Ty)

LLVM_ABI LegalizeResult lowerFFloor(MachineInstr &MI)

LLVM_ABI LegalizeResult lowerAbsDiffToMinMax(MachineInstr &MI)

LLVM_ABI LegalizeResult narrowScalarExt(MachineInstr &MI, unsigned TypeIdx, LLT Ty)

LLVM_ABI LegalizeResult fewerElementsVectorSeqReductions(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy)

LLVM_ABI Register getDynStackAllocTargetPtr(Register SPReg, Register AllocSize, Align Alignment, LLT PtrTy)

LLVM_ABI LegalizeResult lowerFPTOSI(MachineInstr &MI)

LLVM_ABI LegalizeResult lowerUITOFP(MachineInstr &MI)

LLVM_ABI LegalizeResult lowerShuffleVector(MachineInstr &MI)

LLVM_ABI LegalizeResult fewerElementsVectorMerge(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy)

LLVM_ABI LegalizeResult lowerMergeValues(MachineInstr &MI)

LLVM_ABI LegalizeResult fewerElementsVectorUnmergeValues(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy)

LLVM_ABI LegalizeResult lowerVECTOR_COMPRESS(MachineInstr &MI)

LLVM_ABI void moreElementsVectorSrc(MachineInstr &MI, LLT MoreTy, unsigned OpIdx)

Legalize a single operand OpIdx of the machine instruction MI as a Use by producing a vector with und...

LLVM_ABI LegalizeResult bitcastExtractVectorElt(MachineInstr &MI, unsigned TypeIdx, LLT CastTy)

Perform Bitcast legalize action on G_EXTRACT_VECTOR_ELT.

LLVM_ABI LegalizeResult lowerRotate(MachineInstr &MI)

LLVM_ABI LegalizeResult lowerU64ToF32WithSITOFP(MachineInstr &MI)

LLVM_ABI LegalizeResult lowerMemCpyFamily(MachineInstr &MI, unsigned MaxLen=0)

LLVM_ABI Register coerceToScalar(Register Val)

Cast the given value to an LLT::scalar with an equivalent size.

LLVM_ABI LegalizeResult bitcastShuffleVector(MachineInstr &MI, unsigned TypeIdx, LLT CastTy)

LLVM_ABI LegalizeResult lowerDIVREM(MachineInstr &MI)

LLVM_ABI LegalizeResult lowerSelect(MachineInstr &MI)

LLVM_ABI LegalizeResult narrowScalarInsert(MachineInstr &MI, unsigned TypeIdx, LLT Ty)

LLVM_ABI LegalizeResult narrowScalarFLDEXP(MachineInstr &MI, unsigned TypeIdx, LLT Ty)

LLVM_ABI Register buildVariableShiftPart(unsigned Opcode, Register MainOperand, Register ShiftAmt, LLT TargetTy, Register CarryOperand=Register())

Generates a shift part with carry for variable shifts.

LLVM_ABI void bitcastSrc(MachineInstr &MI, LLT CastTy, unsigned OpIdx)

Legalize a single operand OpIdx of the machine instruction MI as a use by inserting a G_BITCAST to Ca...

LLVM_ABI void narrowScalarDst(MachineInstr &MI, LLT NarrowTy, unsigned OpIdx, unsigned ExtOpcode)

LLVM_ABI LegalizeResult lowerStackRestore(MachineInstr &MI)

LLVM_ABI LegalizeResult fewerElementsVectorReductions(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy)

LLVM_ABI LegalizeResult lowerStackSave(MachineInstr &MI)

LLVM_ABI LegalizeResult fewerElementsVectorExtractInsertVectorElt(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy)

LLVM_ABI LegalizeResult narrowScalarCTLZ(MachineInstr &MI, unsigned TypeIdx, LLT Ty)

MachineIRBuilder & MIRBuilder

Expose MIRBuilder so clients can set their own RecordInsertInstruction functions.

Definition LegalizerHelper.h:53

LLVM_ABI LegalizeResult lowerTRUNC(MachineInstr &MI)

LLVM_ABI LegalizeResult lowerBswap(MachineInstr &MI)

LLVM_ABI Register getVectorElementPointer(Register VecPtr, LLT VecTy, Register Index)

Get a pointer to vector element Index located in memory for a vector of type VecTy starting at a base...

LLVM_ABI LegalizeResult narrowScalarAddSub(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy)

LLVM_ABI Align getStackTemporaryAlignment(LLT Type, Align MinAlign=Align()) const

Return the alignment to use for a stack temporary object with the given type.

LLVM_ABI LegalizeResult lowerConstant(MachineInstr &MI)

LLVM_ABI void widenScalarDst(MachineInstr &MI, LLT WideTy, unsigned OpIdx=0, unsigned TruncOpcode=TargetOpcode::G_TRUNC)

Legalize a single operand OpIdx of the machine instruction MI as a Def by extending the operand's typ...

LLVM_ABI LegalizeResult legalizeInstrStep(MachineInstr &MI, LostDebugLocObserver &LocObserver)

Replace MI by a sequence of legal instructions that can implement the same operation.

LLVM_ABI LegalizeResult lowerFMinimumMaximum(MachineInstr &MI)

Helper class to build MachineInstr.

Representation of each machine instruction.

MachineRegisterInfo - Keep track of information for virtual and physical registers,...

Wrapper class representing virtual and physical registers.

This class consists of common code factored out of the SmallVector class to reduce code duplication b...

This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...

unsigned ID

LLVM IR allows to use arbitrary numbers as calling convention identifiers.

This is an optimization pass for GlobalISel generic memory operations.

LLVM_ABI LegalizerHelper::LegalizeResult createMemLibcall(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, MachineInstr &MI, LostDebugLocObserver &LocObserver)

Create a libcall to memcpy et al.

constexpr T MinAlign(U A, V B)

A and B are either alignments or offsets.

LLVM_ABI LegalizerHelper::LegalizeResult createLibcall(MachineIRBuilder &MIRBuilder, const char *Name, const CallLowering::ArgInfo &Result, ArrayRef< CallLowering::ArgInfo > Args, CallingConv::ID CC, LostDebugLocObserver &LocObserver, MachineInstr *MI=nullptr)

Helper function that creates a libcall to the given Name using the given calling convention CC.

ArrayRef(const T &OneElt) -> ArrayRef< T >

This struct is a compact representation of a valid (non-zero power of two) alignment.

Definition LegalizerHelper.h:384

Register WordShift

Definition LegalizerHelper.h:385

Register InvBitShift

Definition LegalizerHelper.h:387

Register BitShift

Definition LegalizerHelper.h:386

Register SignBit

Definition LegalizerHelper.h:389

Register Zero

Definition LegalizerHelper.h:388

This class contains a discriminated union of information about pointers in memory operands,...