LivePhysRegs.cpp Source File (original) (raw)

21#include "llvm/Config/llvm-config.h"

24using namespace llvm;

32 SmallVectorImpl<std::pair<MCPhysReg, const MachineOperand*>> *Clobbers) {

34 while (LRI != LiveRegs.end()) {

36 if (Clobbers)

37 Clobbers->push_back(std::make_pair(*LRI, &MO));

38 LRI = LiveRegs.erase(LRI);

39 } else

40 ++LRI;

41 }

42}

47 if (MOP.isRegMask()) {

49 continue;

50 }

52 if (MOP.isDef())

54 }

55}

60 if (!MOP.isReg() || !MOP.readsReg())

61 continue;

63 }

64}

74}

81 SmallVectorImpl<std::pair<MCPhysReg, const MachineOperand*>> &Clobbers) {

84 if (O->isReg()) {

85 if (O->isDebug())

86 continue;

88 if (!Reg.isPhysical())

89 continue;

90 if (O->isDef()) {

93 Clobbers.push_back(std::make_pair(Reg, &*O));

94 } else {

96 if (O->isKill())

98 }

99 } else if (O->isRegMask()) {

101 }

102 }

103

104

105 for (auto Reg : Clobbers) {

106

107

108 if (Reg.second->isReg() && Reg.second->isDead())

109 continue;

110 if (Reg.second->isRegMask() &&

112 continue;

114 }

115}

116

117

119 OS << "Live Registers:";

120 if (!TRI) {

121 OS << " (uninitialized)\n";

122 return;

123 }

124

126 OS << " (empty)\n";

127 return;

128 }

129

132 OS << "\n";

133}

134

135#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)

137 dbgs() << " " << *this;

138}

139#endif

140

143 if (LiveRegs.count(Reg))

144 return false;

145 if (MRI.isReserved(Reg))

146 return false;

148 if (LiveRegs.count(*R))

149 return false;

150 }

151 return true;

152}

153

154

156 for (const auto &LI : MBB.liveins()) {

160 assert(Mask.any() && "Invalid livein mask");

161 if (Mask.all() || !S.isValid()) {

163 continue;

164 }

165 for (; S.isValid(); ++S) {

166 unsigned SI = S.getSubRegIndex();

168 addReg(S.getSubReg());

169 }

170 }

171}

172

173

177 for (const MCPhysReg *CSR = MRI.getCalleeSavedRegs(); CSR && *CSR; ++CSR)

178 LiveRegs.addReg(*CSR);

179}

180

181void LivePhysRegs::addPristines(const MachineFunction &MF) {

184 return;

185

186

188

189

191

194 return;

195 }

196

197

198

199

202

204 Pristine.removeReg(Info.getReg());

207}

208

210

212 addBlockLiveIns(*Succ);

214

215

216

217

218

219

220

221

226 if (Info.isRestored())

228 }

229 }

230}

231

234 addPristines(MF);

236}

237

240 addPristines(MF);

241 addBlockLiveIns(MBB);

242}

243

245 addBlockLiveIns(MBB);

246}

247

257}

258

265 if (MRI.isReserved(Reg))

266 continue;

267

269 return LiveRegs.contains(SReg) && !MRI.isReserved(SReg);

270 }))

271 continue;

273 }

274}

275

281

282

286

288

290 if (!MO->isReg() || !MO->isDef() || MO->isDebug())

291 continue;

292

294 if (Reg == 0)

295 continue;

296 assert(Reg.isPhysical());

297

298 bool IsNotLive = LiveRegs.available(MRI, Reg);

299

300

301

304 if (Info.getReg() == Reg) {

305 IsNotLive = Info .isRestored();

306 break;

307 }

308 }

309 }

310

311 MO->setIsDead(IsNotLive);

312 }

313

314

316

317

319 if (!MO->isReg() || !MO->readsReg() || MO->isDebug())

320 continue;

321

323 if (Reg == 0)

324 continue;

325 assert(Reg.isPhysical());

326

327 bool IsNotLive = LiveRegs.available(MRI, Reg);

328 MO->setIsKill(IsNotLive);

329 }

330

331

333 }

334}

335

340}

unsigned const MachineRegisterInfo * MRI

Analysis containing CSE Info

#define LLVM_DUMP_METHOD

Mark debug helper function definitions like dump() that should not be stripped from debug builds.

static void addCalleeSavedRegs(LivePhysRegs &LiveRegs, const MachineFunction &MF)

Adds all callee saved registers to LiveRegs.

This file implements the LivePhysRegs utility for tracking liveness of physical registers.

unsigned const TargetRegisterInfo * TRI

assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())

The CalleeSavedInfo class tracks the information need to locate where a callee saved register is in t...

ConstMIBundleOperands - Iterate over all operands in a const bundle of machine instructions.

A set of physical registers with utility functions to track liveness when walking backward/forward th...

void stepForward(const MachineInstr &MI, SmallVectorImpl< std::pair< MCPhysReg, const MachineOperand * > > &Clobbers)

Simulates liveness when stepping forward over an instruction(bundle).

bool available(const MachineRegisterInfo &MRI, MCPhysReg Reg) const

Returns true if register Reg and no aliasing register is in the set.

void print(raw_ostream &OS) const

Prints the currently live registers to OS.

void stepBackward(const MachineInstr &MI)

Simulates liveness when stepping backwards over an instruction(bundle).

void removeReg(MCPhysReg Reg)

Removes a physical register, all its sub-registers, and all its super-registers from the set.

void init(const TargetRegisterInfo &TRI)

(re-)initializes and clears the set.

void addLiveIns(const MachineBasicBlock &MBB)

Adds all live-in registers of basic block MBB.

void addUses(const MachineInstr &MI)

Add uses to the set.

void removeDefs(const MachineInstr &MI)

Remove defined registers and regmask kills from the set.

void addLiveOutsNoPristines(const MachineBasicBlock &MBB)

Adds all live-out registers of basic block MBB but skips pristine registers.

void addLiveOuts(const MachineBasicBlock &MBB)

Adds all live-out registers of basic block MBB.

void addLiveInsNoPristines(const MachineBasicBlock &MBB)

Adds all live-in registers of basic block MBB but skips pristine registers.

void addReg(MCPhysReg Reg)

Adds a physical register and all its sub-registers to the set.

void removeRegsInMask(const MachineOperand &MO, SmallVectorImpl< std::pair< MCPhysReg, const MachineOperand * > > *Clobbers=nullptr)

Removes physical registers clobbered by the regmask operand MO.

bool empty() const

Returns true if the set is empty.

void dump() const

Dumps the currently live registers to the debug output.

MCRegAliasIterator enumerates all registers aliasing Reg.

Iterator that enumerates the sub-registers of a Reg and the associated sub-register indices.

bool isValid() const

isValid - Returns true until all the operands have been visited.

MIBundleOperands - Iterate over all operands in a bundle of machine instructions.

iterator_range< livein_iterator > liveins() const

bool livein_empty() const

bool isReturnBlock() const

Convenience function that returns true if the block ends in a return instruction.

void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())

Adds the specified register as a live in.

const MachineFunction * getParent() const

Return the MachineFunction containing this basic block.

iterator_range< succ_iterator > successors()

The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.

bool isCalleeSavedInfoValid() const

Has the callee saved info been calculated yet?

const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const

Returns a reference to call saved info vector for the current function.

MachineFrameInfo & getFrameInfo()

getFrameInfo - Return the frame info object for the current function.

MachineRegisterInfo & getRegInfo()

getRegInfo - Return information about the registers currently in use.

Representation of each machine instruction.

MachineOperand class - Representation of each machine instruction operand.

static bool clobbersPhysReg(const uint32_t *RegMask, MCRegister PhysReg)

clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.

MachineRegisterInfo - Keep track of information for virtual and physical registers,...

Wrapper class representing virtual and physical registers.

This class consists of common code factored out of the SmallVector class to reduce code duplication b...

iterator erase(iterator I)

erase - Erases an existing element identified by a valid iterator.

typename DenseT::iterator iterator

size_type count(const KeyT &Key) const

count - Returns 1 if this set contains an element identified by Key, 0 otherwise.

const_iterator begin() const

const_iterator end() const

TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...

LaneBitmask getSubRegIndexLaneMask(unsigned SubIdx) const

Return a bitmask representing the parts of a register that are covered by SubIdx.

This class implements an extremely fast bulk output stream that can only output to a stream.

This is an optimization pass for GlobalISel generic memory operations.

iterator_range< filter_iterator< ConstMIBundleOperands, bool(*)(const MachineOperand &)> > phys_regs_and_masks(const MachineInstr &MI)

Returns an iterator range over all physical register and mask operands for MI and bundled instruction...

bool any_of(R &&range, UnaryPredicate P)

Provide wrappers to std::any_of which take ranges instead of having to pass begin/end explicitly.

auto reverse(ContainerTy &&C)

raw_ostream & dbgs()

dbgs() - This returns a reference to a raw_ostream for debugging messages.

void recomputeLivenessFlags(MachineBasicBlock &MBB)

Recomputes dead and kill flags in MBB.

void computeAndAddLiveIns(LivePhysRegs &LiveRegs, MachineBasicBlock &MBB)

Convenience function combining computeLiveIns() and addLiveIns().

void computeLiveIns(LivePhysRegs &LiveRegs, const MachineBasicBlock &MBB)

Computes registers live-in to MBB assuming all of its successors live-in lists are up-to-date.

Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)

Prints virtual and physical registers with or without a TRI instance.

void addLiveIns(MachineBasicBlock &MBB, const LivePhysRegs &LiveRegs)

Adds registers contained in LiveRegs to the block live-in list of MBB.