LLVM: include/llvm/CodeGen/LiveRegMatrix.h Source File (original) (raw)
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23#ifndef LLVM_CODEGEN_LIVEREGMATRIX_H
24#define LLVM_CODEGEN_LIVEREGMATRIX_H
25
29#include
30
31namespace llvm {
32
39
40class LiveRegMatrix {
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48 unsigned UserTag = 0;
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51 std::unique_ptrLiveIntervalUnion::Allocator LIUAlloc;
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55 std::unique_ptrLiveIntervalUnion::Query\[\] Queries;
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58 unsigned RegMaskTag = 0;
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62 LiveRegMatrix()
64 void releaseMemory();
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66public:
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102 };
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169 return &Matrix[static_cast<MCRegUnit>(0)];
170 }
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173};
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178public:
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189};
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201}
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203#endif
This file implements the BitVector class.
Represent the analysis usage information of a pass.
Query interferences between a single live virtual register and a live interval union.
Union of live intervals that are strong candidates for coalescing into a single register (either phys...
LiveInterval - This class represents the liveness of a register, or stack slot.
This class represents the liveness of a register, stack slot, etc.
Definition LiveRegMatrix.h:191
LiveRegMatrix run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM)
LiveRegMatrix Result
Definition LiveRegMatrix.h:196
void releaseMemory() override
releaseMemory() - This member can be implemented by a pass if it wants to be able to release its memo...
LiveRegMatrixWrapperLegacy()
Definition LiveRegMatrix.h:181
const LiveRegMatrix & getLRM() const
Definition LiveRegMatrix.h:184
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - This function should be overriden by passes that need analysis information to do t...
LiveRegMatrix & getLRM()
Definition LiveRegMatrix.h:183
static char ID
Definition LiveRegMatrix.h:179
bool runOnMachineFunction(MachineFunction &MF) override
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
Definition LiveRegMatrix.h:40
bool checkRegMaskInterference(const LiveInterval &VirtReg, MCRegister PhysReg=MCRegister::NoRegister)
Check for regmask interference only.
void unassign(const LiveInterval &VirtReg)
Unassign VirtReg from its PhysReg.
bool isPhysRegUsed(MCRegister PhysReg) const
Returns true if the given PhysReg has any live intervals assigned.
void invalidateVirtRegs()
Invalidate cached interference queries after modifying virtual register live ranges.
Definition LiveRegMatrix.h:82
friend class LiveRegMatrixWrapperLegacy
Definition LiveRegMatrix.h:41
Register getOneVReg(unsigned PhysReg) const
friend class LiveRegMatrixAnalysis
Definition LiveRegMatrix.h:42
LiveIntervalUnion::Query & query(const LiveRange &LR, MCRegUnit RegUnit)
Query a line of the assigned virtual register matrix directly.
InterferenceKind
Definition LiveRegMatrix.h:84
@ IK_VirtReg
Virtual register interference.
Definition LiveRegMatrix.h:91
@ IK_RegUnit
Register unit interference.
Definition LiveRegMatrix.h:96
@ IK_Free
No interference, go ahead and assign.
Definition LiveRegMatrix.h:86
@ IK_RegMask
RegMask interference.
Definition LiveRegMatrix.h:101
void init(MachineFunction &MF, LiveIntervals &LIS, VirtRegMap &VRM)
void assign(const LiveInterval &VirtReg, MCRegister PhysReg)
Assign VirtReg to PhysReg.
InterferenceKind checkInterference(const LiveInterval &VirtReg, MCRegister PhysReg)
Check for interference before assigning VirtReg to PhysReg.
bool checkRegUnitInterference(const LiveInterval &VirtReg, MCRegister PhysReg)
Check for regunit interference only.
LiveRegMatrix(LiveRegMatrix &&Other)=default
LiveIntervalUnion * getLiveUnions()
Directly access the live interval unions per regunit.
Definition LiveRegMatrix.h:168
LaneBitmask checkInterferenceLanes(SlotIndex Start, SlotIndex End, MCRegister PhysReg)
Check for interference in the segment [Start, End) that may prevent assignment to PhysReg,...
Wrapper class representing physical registers. Should be passed by value.
static constexpr unsigned NoRegister
MachineFunctionPass(char &ID)
Wrapper class representing virtual and physical registers.
SlotIndex - An opaque wrapper around machine indexes.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This is an optimization pass for GlobalISel generic memory operations.
AnalysisManager< MachineFunction > MachineFunctionAnalysisManager
Implement std::hash so that hash_code can be used in STL containers.
A CRTP mix-in that provides informational APIs needed for analysis passes.
A special type used by analysis passes to provide an address that identifies that particular analysis...