LoadStoreOpt.h Source File (original) (raw)

14#ifndef LLVM_CODEGEN_GLOBALISEL_LOADSTOREOPT_H

15#define LLVM_CODEGEN_GLOBALISEL_LOADSTOREOPT_H

26namespace llvm {

28class AnalysisUsage;

29class GStore;

30class LegalizerInfo;

31class MachineBasicBlock;

32class MachineInstr;

33class TargetLowering;

34struct LegalityQuery;

35class MachineRegisterInfo;

36namespace GISelAddressing {

39private:

42 std::optional<int64_t> Offset;

44public:

52 void setOffset(std::optional<int64_t> NewOff) { Offset = NewOff; }

54 int64_t getOffset() const { return *Offset; }

55};

72}

74using namespace GISelAddressing;

77public:

78 static char ID;

80private:

96 class StoreMergeCandidate {

97 public:

100

101

102

103

104 int64_t CurrentLowestOffset;

106

107

108

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111

112

114

116

117

118 void reset() {

120 PotentialAliases.clear();

121 CurrentLowestOffset = 0;

123 }

124 };

125

126 bool isLegalOrBeforeLegalizer(const LegalityQuery &Query,

127 MachineFunction &MF) const;

128

129

130 bool addStoreToCandidate(GStore &MI, StoreMergeCandidate &C);

131

132

133 bool operationAliasesWithCandidate(MachineInstr &MI, StoreMergeCandidate &C);

134

135

136

137

138 bool mergeStores(SmallVectorImpl<GStore *> &StoresToMerge);

139

140

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142

143 bool doSingleStoreMerge(SmallVectorImpl<GStore *> &Stores);

144 bool processMergeCandidate(StoreMergeCandidate &C);

145 bool mergeBlockStores(MachineBasicBlock &MBB);

146 bool mergeFunctionStores(MachineFunction &MF);

147

148 bool mergeTruncStore(GStore &StoreMI,

149 SmallPtrSetImpl<GStore *> &DeletedStores);

150 bool mergeTruncStoresBlock(MachineBasicBlock &MBB);

151

152

153

154

155 void initializeStoreMergeTargetInfo(unsigned AddrSpace = 0);

156

157

158

159

160 DenseMap<unsigned, BitVector> LegalStoreSizes;

161 bool IsPreLegalizer = false;

162

163 SmallSet<MachineInstr *, 16> InstsToErase;

164

165public:

167 LoadStoreOpt(std::function<bool(const MachineFunction &)>);

168

170

174 }

175

177

179};

180

181}

182

183#endif

unsigned const MachineRegisterInfo * MRI

This file implements the BitVector class.

This file declares the MachineIRBuilder class.

This file defines the SmallPtrSet class.

This file defines the SmallSet class.

This file defines the SmallVector class.

Represent the analysis usage information of a pass.

Helper struct to store a base, index and offset that forms an address.

void setOffset(std::optional< int64_t > NewOff)

int64_t getOffset() const

BaseIndexOffset()=default

bool hasValidOffset() const

void setIndex(Register NewIndex)

void setBase(Register NewBase)

void getAnalysisUsage(AnalysisUsage &AU) const override

getAnalysisUsage - This function should be overriden by passes that need analysis information to do t...

MachineFunctionProperties getRequiredProperties() const override

StringRef getPassName() const override

getPassName - Return a nice clean name for a pass.

bool runOnMachineFunction(MachineFunction &MF) override

runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...

MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...

Properties which a MachineFunction may have at a given point in time.

MachineFunctionProperties & set(Property P)

Helper class to build MachineInstr.

Representation of each machine instruction.

MachineRegisterInfo - Keep track of information for virtual and physical registers,...

Wrapper class representing virtual and physical registers.

This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.

StringRef - Represent a constant reference to a string, i.e.

This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...

@ C

The default llvm calling convention, compatible with C.

bool aliasIsKnownForLoadStore(const MachineInstr &MI1, const MachineInstr &MI2, bool &IsAlias, MachineRegisterInfo &MRI)

Compute whether or not a memory access at MI1 aliases with an access at MI2.

BaseIndexOffset getPointerInfo(Register Ptr, MachineRegisterInfo &MRI)

Returns a BaseIndexOffset which describes the pointer in Ptr.

bool instMayAlias(const MachineInstr &MI, const MachineInstr &Other, MachineRegisterInfo &MRI, AliasAnalysis *AA)

Returns true if the instruction MI may alias Other.

This is an optimization pass for GlobalISel generic memory operations.