LoongArchTargetMachine.cpp Source File (original) (raw)

27#include

29using namespace llvm;

31#define DEBUG_TYPE "loongarch"

49 "loongarch-enable-dead-defs", cl::Hidden,

50 cl::desc("Enable the pass that removes dead"

51 " definitons and replaces stores to"

52 " them with stores to r0"),

57 cl::desc("Enable the loop data prefetch pass"),

62 cl::desc("Enable the merge base offset pass"),

67 cl::desc("Enable sinking and folding of instruction copies"),

76 std::optionalCodeModel::Model CM) {

77 if (!CM)

80 switch (*CM) {

82 return *CM;

85 if (!TT.isArch64Bit())

87 return *CM;

88 default:

90 "Only small, medium and large code models are allowed on LoongArch");

91 }

92}

104

106

109 Attribute CPUAttr = F.getFnAttribute("target-cpu");

110 Attribute TuneAttr = F.getFnAttribute("tune-cpu");

111 Attribute FSAttr = F.getFnAttribute("target-features");

112

113 std::string CPU =

115 std::string TuneCPU =

117 std::string FS =

119

120 std::string Key = CPU + TuneCPU + FS;

121 auto &I = SubtargetMap[Key];

122 if () {

123

124

125

127 auto ABIName = Options.MCOptions.getABIName();

129 F.getParent()->getModuleFlag("target-abi"))) {

132 ModuleTargetABI->getString() != ABIName) {

134 }

135 ABIName = ModuleTargetABI->getString();

136 }

137 I = std::make_unique(TargetTriple, CPU, TuneCPU, FS,

138 ABIName, *this);

139 }

140 return I.get();

141}

142

147 Allocator, F, STI);

148}

149

150namespace {

152public:

156 }

157

160 }

161

162 void addIRPasses() override;

163 void addCodeGenPrepare() override;

164 bool addInstSelector() override;

165 void addPreEmitPass() override;

166 void addPreEmitPass2() override;

167 void addMachineSSAOptimization() override;

168 void addPreRegAlloc() override;

169 bool addRegAssignAndRewriteFast() override;

170 bool addRegAssignAndRewriteOptimized() override;

171};

172}

173

176 return new LoongArchPassConfig(*this, PM);

177}

178

179void LoongArchPassConfig::addIRPasses() {

180

181

182

183

187

189}

190

191void LoongArchPassConfig::addCodeGenPrepare() {

195}

196

197bool LoongArchPassConfig::addInstSelector() {

199

200 return false;

201}

202

207

209

210void LoongArchPassConfig::addPreEmitPass2() {

212

213

214

216}

217

218void LoongArchPassConfig::addMachineSSAOptimization() {

220

221 if (TM->getTargetTriple().isLoongArch64()) {

223 }

224}

225

226void LoongArchPassConfig::addPreRegAlloc() {

230}

231

232bool LoongArchPassConfig::addRegAssignAndRewriteFast() {

237}

238

239bool LoongArchPassConfig::addRegAssignAndRewriteOptimized() {

244}

static cl::opt< bool > EnableSinkFold("aarch64-enable-sink-fold", cl::desc("Enable sinking and folding of instruction copies"), cl::init(true), cl::Hidden)

static cl::opt< bool > EnableLoopDataPrefetch("aarch64-enable-loop-data-prefetch", cl::Hidden, cl::desc("Enable the loop data prefetch pass"), cl::init(true))

static Reloc::Model getEffectiveRelocModel()

#define LLVM_EXTERNAL_VISIBILITY

static cl::opt< bool > EnableLoongArchDeadRegisterElimination("loongarch-enable-dead-defs", cl::Hidden, cl::desc("Enable the pass that removes dead" " definitons and replaces stores to" " them with stores to r0"), cl::init(true))

static cl::opt< bool > EnableMergeBaseOffset("loongarch-enable-merge-offset", cl::desc("Enable the merge base offset pass"), cl::init(true), cl::Hidden)

static cl::opt< bool > EnableLoopDataPrefetch("loongarch-enable-loop-data-prefetch", cl::Hidden, cl::desc("Enable the loop data prefetch pass"), cl::init(false))

LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeLoongArchTarget()

Definition LoongArchTargetMachine.cpp:34

static CodeModel::Model getEffectiveLoongArchCodeModel(const Triple &TT, std::optional< CodeModel::Model > CM)

Definition LoongArchTargetMachine.cpp:75

static cl::opt< bool > EnableSinkFold("loongarch-enable-sink-fold", cl::desc("Enable sinking and folding of instruction copies"), cl::init(true), cl::Hidden)

This file a TargetTransformInfoImplBase conforming object specific to the LoongArch target machine.

const GCNTargetMachine & getTM(const GCNSubtarget *STI)

static TableGen::Emitter::Opt Y("gen-skeleton-entry", EmitSkeleton, "Generate example skeleton entry")

static TableGen::Emitter::OptClass< SkeletonEmitter > X("gen-skeleton-class", "Generate example skeleton class")

Target-Independent Code Generator Pass Configuration Options pass.

This pass exposes codegen information to IR-level passes.

Functions, function parameters, and return types can have attributes to indicate how they should be t...

LLVM_ABI StringRef getValueAsString() const

Return the attribute's value as a string.

bool isValid() const

Return true if the attribute is any kind of attribute.

CodeGenTargetMachineImpl(const Target &T, StringRef DataLayoutString, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOptLevel OL)

LoongArchTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, std::optional< Reloc::Model > RM, std::optional< CodeModel::Model > CM, CodeGenOptLevel OL, bool JIT)

Definition LoongArchTargetMachine.cpp:94

~LoongArchTargetMachine() override

const LoongArchSubtarget * getSubtargetImpl() const =delete

TargetPassConfig * createPassConfig(PassManagerBase &PM) override

Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...

Definition LoongArchTargetMachine.cpp:175

TargetTransformInfo getTargetTransformInfo(const Function &F) const override

Get a TargetTransformInfo implementation for the target.

Definition LoongArchTargetMachine.cpp:204

MachineFunctionInfo * createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F, const TargetSubtargetInfo *STI) const override

Create the target's instance of MachineFunctionInfo.

Definition LoongArchTargetMachine.cpp:143

static LLVM_ABI PassRegistry * getPassRegistry()

getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...

StringRef - Represent a constant reference to a string, i.e.

std::string str() const

str - Get the contents as an std::string.

Triple TargetTriple

Triple string, CPU name, and target feature strings the TargetMachine instance is created with.

std::unique_ptr< const MCSubtargetInfo > STI

void resetTargetOptions(const Function &F) const

Reset the target options based on the function's attributes.

Target-Independent Code Generator Pass Configuration Options.

virtual void addCodeGenPrepare()

Add pass to prepare the LLVM IR for code generation.

virtual bool addRegAssignAndRewriteFast()

Add core register allocator passes which do the actual register assignment and rewriting.

virtual void addIRPasses()

Add common target configurable passes that perform LLVM IR to IR transforms following machine indepen...

virtual void addMachineSSAOptimization()

addMachineSSAOptimization - Add standard passes that optimize machine instructions in SSA form.

virtual bool addRegAssignAndRewriteOptimized()

TargetSubtargetInfo - Generic base class for all target subtargets.

This pass provides access to the codegen interfaces that are needed for IR-level transformations.

Target - Wrapper for Target specific information.

Triple - Helper class for working with autoconf configuration names.

PassManagerBase - An abstract interface to allow code to add passes to a pass manager without having ...

ABI getTargetABI(StringRef ABIName)

initializer< Ty > init(const Ty &Val)

This is an optimization pass for GlobalISel generic memory operations.

Target & getTheLoongArch64Target()

FunctionPass * createLoongArchExpandAtomicPseudoPass()

FunctionPass * createLoongArchDeadRegisterDefinitionsPass()

void initializeLoongArchDAGToDAGISelLegacyPass(PassRegistry &)

LLVM_ABI FunctionPass * createTypePromotionLegacyPass()

Create IR Type Promotion pass.

void initializeLoongArchPreRAExpandPseudoPass(PassRegistry &)

auto dyn_cast_or_null(const Y &Val)

void initializeLoongArchMergeBaseOffsetOptPass(PassRegistry &)

static Reloc::Model getEffectiveRelocModel(std::optional< Reloc::Model > RM)

void initializeLoongArchExpandAtomicPseudoPass(PassRegistry &)

LLVM_ABI char & BranchRelaxationPassID

BranchRelaxation - This pass replaces branches that need to jump further than is supported by a branc...

void initializeLoongArchExpandPseudoPass(PassRegistry &)

FunctionPass * createLoongArchOptWInstrsPass()

LLVM_ABI FunctionPass * createLoopDataPrefetchPass()

LLVM_ABI void report_fatal_error(Error Err, bool gen_crash_diag=true)

CodeGenOptLevel

Code generation optimization level.

LLVM_ATTRIBUTE_VISIBILITY_DEFAULT AnalysisKey InnerAnalysisManagerProxy< AnalysisManagerT, IRUnitT, ExtraArgTs... >::Key

Target & getTheLoongArch32Target()

FunctionPass * createLoongArchISelDag(LoongArchTargetMachine &TM, CodeGenOptLevel OptLevel)

FunctionPass * createLoongArchPreRAExpandPseudoPass()

void initializeLoongArchOptWInstrsPass(PassRegistry &)

FunctionPass * createLoongArchExpandPseudoPass()

LLVM_ABI FunctionPass * createAtomicExpandLegacyPass()

AtomicExpandPass - At IR level this pass replace atomic instructions with __atomic_* library calls,...

BumpPtrAllocatorImpl<> BumpPtrAllocator

The standard BumpPtrAllocator which just uses the default template parameters.

void initializeLoongArchDeadRegisterDefinitionsPass(PassRegistry &)

FunctionPass * createLoongArchMergeBaseOffsetOptPass()

Returns an instance of the Merge Base Offset Optimization pass.

Implement std::hash so that hash_code can be used in STL containers.

MachineFunctionInfo - This class can be derived from and used by targets to hold private target-speci...

static FuncInfoTy * create(BumpPtrAllocator &Allocator, const Function &F, const SubtargetTy *STI)

Factory function: default behavior is to call new using the supplied allocator.

RegisterTargetMachine - Helper template for registering a target machine implementation,...