LLVM: lib/Target/M68k/MCTargetDesc/M68kMCCodeEmitter.cpp Source File (original) (raw)
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30#include <type_traits>
31
32using namespace llvm;
33
34#define DEBUG_TYPE "m68k-mccodeemitter"
35
36namespace {
38 M68kMCCodeEmitter(const M68kMCCodeEmitter &) = delete;
39 void operator=(const M68kMCCodeEmitter &) = delete;
42
46
51
52 template
53 void encodeRelocImm(const MCInst &MI, unsigned OpIdx, unsigned InsertPos,
56
57 template
58 void encodePCRelImm(const MCInst &MI, unsigned OpIdx, unsigned InsertPos,
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62 void encodeFPSYSSelect(const MCInst &MI, unsigned OpIdx, unsigned InsertPos,
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66 void encodeInverseMoveMask(const MCInst &MI, unsigned OpIdx,
70
71public:
73 : MCII(mcii), Ctx(ctx) {}
74
75 ~M68kMCCodeEmitter() override {}
76
80};
81
82}
83
84#include "M68kGenMCCodeEmitter.inc"
85
86
88 using type = typename std::conditional<
90 typename std::conditional<
92 typename std::conditional<Size == 32, uint32_t,
94};
95
96
97template static unsigned getBytePosition(unsigned BitPos) {
98 if (Size % 16) {
99 return static_cast<unsigned>(BitPos / 8 + ((BitPos & 0b1111) < 8 ? 1 : -1));
100 } else {
101 assert(!(BitPos & 0b1111) && "Not aligned to word boundary?");
102 return BitPos / 8;
103 }
104}
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126template
127void M68kMCCodeEmitter::encodeRelocImm(const MCInst &MI, unsigned OpIdx,
132 const MCOperand &MCO = MI.getOperand(OpIdx);
133 if (MCO.isImm()) {
135 } else if (MCO.isExpr()) {
136 const MCExpr *Expr = MCO.getExpr();
137
138
139 int64_t Addr;
140 if (Expr->evaluateAsAbsolute(Addr)) {
142 return;
143 }
144
145
148 }
149}
150
151template
152void M68kMCCodeEmitter::encodePCRelImm(const MCInst &MI, unsigned OpIdx,
153 unsigned InsertPos, APInt &Value,
154 SmallVectorImpl &Fixups,
155 const MCSubtargetInfo &STI) const {
156 const MCOperand &MCO = MI.getOperand(OpIdx);
157 if (MCO.isImm()) {
160 } else if (MCO.isExpr()) {
161 const MCExpr *Expr = MCO.getExpr();
163
164
165 if (Size < 16) {
166 int LabelOffset = 0;
167 if (InsertPos < 16)
168
169
170 LabelOffset = InsertByte - 2;
171 else if (InsertByte % 2)
172
173
174 LabelOffset = 1;
175
176 if (LabelOffset)
179 }
180
182 true);
183 }
184}
185
186void M68kMCCodeEmitter::encodeFPSYSSelect(const MCInst &MI, unsigned OpIdx,
187 unsigned InsertPos, APInt &Value,
188 SmallVectorImpl &Fixups,
189 const MCSubtargetInfo &STI) const {
190 MCRegister FPSysReg = MI.getOperand(OpIdx).getReg();
191 switch (FPSysReg) {
192 case M68k::FPC:
194 break;
195 case M68k::FPS:
197 break;
198 case M68k::FPIAR:
200 break;
201 default:
203 }
204}
205
206void M68kMCCodeEmitter::encodeInverseMoveMask(
207 const MCInst &MI, unsigned OpIdx, unsigned InsertPos, APInt &Value,
208 SmallVectorImpl &Fixups, const MCSubtargetInfo &STI) const {
209 const MCOperand &Op = MI.getOperand(OpIdx);
211}
212
213void M68kMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &Op,
214 unsigned InsertPos, APInt &Value,
215 SmallVectorImpl &Fixups,
216 const MCSubtargetInfo &STI) const {
217
218 if (Op.isReg()) {
219 unsigned RegNum = Op.getReg();
221 Value |= RI->getEncodingValue(RegNum);
222
225 } else if (Op.isImm()) {
226
227 Value |= static_cast<uint64_t>(Op.getImm());
228 } else if (Op.isExpr()) {
229
230 int64_t Addr;
231 if (.getExpr()->evaluateAsAbsolute(Addr))
232 report_fatal_error("Unsupported asm expression. Only absolute address "
233 "can be placed here.");
234 Value |= static_cast<uint64_t>(Addr);
235 } else {
237 }
238}
239
240void M68kMCCodeEmitter::encodeInstruction(const MCInst &MI,
241 SmallVectorImpl &CB,
242 SmallVectorImpl &Fixups,
243 const MCSubtargetInfo &STI) const {
245 << "(" << MI.getOpcode() << ")\n");
246 (void)MCII;
247
248
249 APInt EncodedInst(16, 0U);
250 APInt Scratch(64, 0U);
251 getBinaryCodeForInstr(MI, Fixups, EncodedInst, Scratch, STI);
252
253 unsigned InstSize = EncodedInst.getBitWidth();
254 for (unsigned i = 0; i != InstSize; i += 16)
256 CB, static_cast<uint16_t>(EncodedInst.extractBitsAsZExtValue(16, i)),
258}
259
262 return new M68kMCCodeEmitter(MCII, Ctx);
263}
static void addFixup(SmallVectorImpl< MCFixup > &Fixups, uint32_t Offset, const MCExpr *Value, uint16_t Kind, bool PCRel=false)
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
This file contains small standalone helper functions and enum definitions for the M68k target useful ...
This file contains M68k specific fixup entries.
static unsigned getBytePosition(unsigned BitPos)
Definition M68kMCCodeEmitter.cpp:97
This file contains the declarations for the code emitter which are useful outside of the emitter itse...
This file provides M68k specific target descriptions.
MachineInstr unsigned OpIdx
Class for arbitrary precision integers.
static const MCBinaryExpr * createAdd(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx, SMLoc Loc=SMLoc())
MCCodeEmitter - Generic instruction encoding interface.
static LLVM_ABI const MCConstantExpr * create(int64_t Value, MCContext &Ctx, bool PrintInHex=false, unsigned SizeInBytes=0)
Context object for machine code objects.
const MCRegisterInfo * getRegisterInfo() const
Base class for the full range of assembler expressions which are needed for parsing.
static MCFixupKind getDataKindForSize(unsigned Size)
Return the generic fixup kind for a value with the given size.
static MCFixup create(uint32_t Offset, const MCExpr *Value, MCFixupKind Kind, bool PCRel=false)
Consider bit fields if we need more flags.
Instances of this class represent a single low-level machine instruction.
Interface to description of machine instruction set.
StringRef getName(unsigned Opcode) const
Returns the name for the instructions with the given opcode.
Instances of this class represent operands of the MCInst class.
const MCExpr * getExpr() const
Generic base class for all target subtargets.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
LLVM Value Representation.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
static bool isAddressRegister(unsigned RegNo)
value_t swapWord(value_t Val)
void write(void *memory, value_type value, endianness endian)
Write a value to memory with a particular endianness.
This is an optimization pass for GlobalISel generic memory operations.
FunctionAddr VTableAddr Value
LLVM_ABI raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
LLVM_ABI void report_fatal_error(Error Err, bool gen_crash_diag=true)
static void addFixup(SmallVectorImpl< MCFixup > &Fixups, uint32_t Offset, const MCExpr *Value, uint16_t Kind)
DWARFExpression::Operation Op
constexpr T reverseBits(T Val)
Reverse the bits in Val.
MCCodeEmitter * createM68kMCCodeEmitter(const MCInstrInfo &MCII, MCContext &Ctx)
Definition M68kMCCodeEmitter.cpp:260
typename std::conditional< Size==8, uint8_t, typename std::conditional< Size==16, uint16_t, typename std::conditional< Size==32, uint32_t, uint64_t >::type >::type >::type type
Definition M68kMCCodeEmitter.cpp:88