MCInst.h Source File (original) (raw)

15#ifndef LLVM_MC_MCINST_H

16#define LLVM_MC_MCINST_H

23#include

24#include

25#include

27namespace llvm {

29class MCExpr;

30class MCInst;

31class MCInstPrinter;

32class MCRegisterInfo;

33class raw_ostream;

38 enum MachineOperandType : unsigned char {

39 kInvalid,

40 kRegister,

41 kImmediate,

42 kSFPImmediate,

43 kDFPImmediate,

44 kExpr,

45 kInst

46 };

47 MachineOperandType Kind = kInvalid;

49 union {

56 };

58public:

61 bool isValid() const { return Kind != kInvalid; }

62 bool isReg() const { return Kind == kRegister; }

63 bool isImm() const { return Kind == kImmediate; }

64 bool isSFPImm() const { return Kind == kSFPImmediate; }

65 bool isDFPImm() const { return Kind == kDFPImmediate; }

66 bool isExpr() const { return Kind == kExpr; }

67 bool isInst() const { return Kind == kInst; }

71 assert(isReg() && "This is not a register operand!");

73 }

77 assert(isReg() && "This is not a register operand!");

79 }

82 assert(isImm() && "This is not an immediate");

84 }

87 assert(isImm() && "This is not an immediate");

89 }

94 }

99 }

100

104 }

105

109 }

112 FPImmVal = bit_cast<uint64_t>(Val);

113 }

114

116 assert(isExpr() && "This is not an expression");

118 }

119

121 assert(isExpr() && "This is not an expression");

123 }

124

126 assert(isInst() && "This is not a sub-instruction");

128 }

129

131 assert(isInst() && "This is not a sub-instruction");

133 }

134

137 Op.Kind = kRegister;

138 Op.RegVal = Reg.id();

139 return Op;

140 }

141

144 Op.Kind = kImmediate;

145 Op.ImmVal = Val;

146 return Op;

147 }

148

151 Op.Kind = kSFPImmediate;

152 Op.SFPImmVal = Val;

153 return Op;

154 }

155

158 Op.Kind = kDFPImmediate;

159 Op.FPImmVal = Val;

160 return Op;

161 }

162

165 Op.Kind = kExpr;

166 Op.ExprVal = Val;

167 return Op;

168 }

169

172 Op.Kind = kInst;

173 Op.InstVal = Val;

174 return Op;

175 }

176

178 void dump() const;

181};

182

183

184

186 unsigned Opcode = 0;

187

188

189

190 unsigned Flags = 0;

191

194

195public:

197

199 unsigned getOpcode() const { return Opcode; }

200

202 unsigned getFlags() const { return Flags; }

203

206

210

212

215

224

227 }

228

230 void dump() const;

231

232

233

234

240};

241

244 return OS;

245}

246

249 return OS;

250}

251

252}

253

254#endif

dxil pretty DXIL Metadata Pretty Printer

mir Rename Register Operands

assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())

This file defines the SmallVector class.

This file implements the C++20 header.

This class represents an Operation in the Expression.

Base class for the full range of assembler expressions which are needed for parsing.

This is an instance of a target assembly language printer that converts an MCInst to valid target ass...

Instances of this class represent a single low-level machine instruction.

void dump_pretty(raw_ostream &OS, const MCInstPrinter *Printer=nullptr, StringRef Separator=" ", const MCRegisterInfo *RegInfo=nullptr) const

Dump the MCInst as prettily as possible using the additional MC structures, if given.

const_iterator end() const

MCOperand & getOperand(unsigned i)

unsigned getNumOperands() const

void print(raw_ostream &OS, const MCRegisterInfo *RegInfo=nullptr) const

SmallVectorImpl< MCOperand >::iterator iterator

unsigned getFlags() const

unsigned getOpcode() const

void erase(iterator First, iterator Last)

const_iterator begin() const

iterator insert(iterator I, const MCOperand &Op)

void setFlags(unsigned F)

void addOperand(const MCOperand Op)

SmallVectorImpl< MCOperand >::const_iterator const_iterator

void setOpcode(unsigned Op)

const MCOperand & getOperand(unsigned i) const

Instances of this class represent operands of the MCInst class.

static MCOperand createExpr(const MCExpr *Val)

bool isBareSymbolRef() const

static MCOperand createSFPImm(uint32_t Val)

void setExpr(const MCExpr *Val)

static MCOperand createReg(MCRegister Reg)

static MCOperand createImm(int64_t Val)

void setReg(MCRegister Reg)

Set the register number.

void setInst(const MCInst *Val)

MCRegister getReg() const

Returns the register number.

void setSFPImm(uint32_t Val)

bool evaluateAsConstantImm(int64_t &Imm) const

const MCInst * getInst() const

void print(raw_ostream &OS, const MCRegisterInfo *RegInfo=nullptr) const

void setDFPImm(uint64_t Val)

const MCExpr * getExpr() const

void setFPImm(double Val)

uint32_t getSFPImm() const

static MCOperand createDFPImm(uint64_t Val)

uint64_t getDFPImm() const

static MCOperand createInst(const MCInst *Val)

MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...

Wrapper class representing physical registers. Should be passed by value.

virtual void print(raw_ostream &OS, const Module *M) const

print - Print out the internal state of the pass.

Represents a location in source code.

typename SuperClass::const_iterator const_iterator

typename SuperClass::iterator iterator

This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.

StringRef - Represent a constant reference to a string, i.e.

This class implements an extremely fast bulk output stream that can only output to a stream.

This is an optimization pass for GlobalISel generic memory operations.

@ First

Helpers to iterate all locations in the MemoryEffectsBase class.

DWARFExpression::Operation Op

raw_ostream & operator<<(raw_ostream &OS, const APFixedPoint &FX)