LLVM: lib/Target/MSP430/Disassembler/MSP430Disassembler.cpp Source File (original) (raw)
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26using namespace llvm;
28
29#define DEBUG_TYPE "msp430-disassembler"
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32
33namespace {
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42
46
47public:
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54};
55}
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60 return new MSP430Disassembler(STI, Ctx);
61}
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68
70 MSP430::PCB, MSP430::SPB, MSP430::SRB, MSP430::CGB,
71 MSP430::R4B, MSP430::R5B, MSP430::R6B, MSP430::R7B,
72 MSP430::R8B, MSP430::R9B, MSP430::R10B, MSP430::R11B,
73 MSP430::R12B, MSP430::R13B, MSP430::R14B, MSP430::R15B
74};
75
79 if (RegNo > 15)
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85}
86
88 MSP430::PC, MSP430::SP, MSP430::SR, MSP430::CG,
89 MSP430::R4, MSP430::R5, MSP430::R6, MSP430::R7,
90 MSP430::R8, MSP430::R9, MSP430::R10, MSP430::R11,
91 MSP430::R12, MSP430::R13, MSP430::R14, MSP430::R15
92};
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97 if (RegNo > 15)
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103}
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107 int64_t Imm;
108 switch (Bits) {
109 default:
111 case 0x22: Imm = 4; break;
112 case 0x32: Imm = 8; break;
113 case 0x03: Imm = 0; break;
114 case 0x13: Imm = 1; break;
115 case 0x23: Imm = 2; break;
116 case 0x33: Imm = -1; break;
117 }
120}
121
125 unsigned Reg = Bits & 15;
126 unsigned Imm = Bits >> 4;
127
131
134}
135
136#include "MSP430GenDisassemblerTables.inc"
137
149
151 switch (Rs) {
152 case 0:
156 break;
157 case 2:
161 break;
162 case 3:
164 default:
165 break;
166 }
167 switch (As) {
172 default:
174 }
175}
176
182
188
192 switch (Rd) {
195 default:
196 break;
197 }
199}
200
202 assert(0 < Words && Words < 4 && "Incorrect number of words");
203 switch (SrcAM) {
204 default:
207 assert(Words < 3 && "Incorrect number of words");
208 return Words == 2 ? DecoderTableAlpha32 : DecoderTableAlpha16;
210 assert(Words < 3 && "Incorrect number of words");
211 return Words == 2 ? DecoderTableBeta32 : DecoderTableBeta16;
216 assert(Words > 1 && "Incorrect number of words");
217 return Words == 2 ? DecoderTableGamma32 : DecoderTableGamma48;
220 assert(Words < 3 && "Incorrect number of words");
221 return Words == 2 ? DecoderTableDelta32 : DecoderTableDelta16;
222 }
223}
224
233 Size = 2;
235 }
236
237 unsigned Words = 1;
238 switch (SrcAM) {
243 if (Bytes.size() < (Words + 1) * 2) {
245 return DecodeStatus::Fail;
246 }
248 ++Words;
249 break;
250 default:
251 break;
252 }
253 switch (DstAM) {
257 if (Bytes.size() < (Words + 1) * 2) {
259 return DecodeStatus::Fail;
260 }
262 << (Words * 16);
263 ++Words;
264 break;
265 default:
266 break;
267 }
268
270 Insn, Address, this, STI);
272 Size = Words * 2;
274 }
275
277 return DecodeStatus::Fail;
278}
279
280DecodeStatus MSP430Disassembler::getInstructionII(MCInst &MI, uint64_t &Size,
281 ArrayRef<uint8_t> Bytes,
283 raw_ostream &CStream) const {
287 Size = 2;
289 }
290
291 unsigned Words = 1;
292 switch (SrcAM) {
297 if (Bytes.size() < (Words + 1) * 2) {
299 return DecodeStatus::Fail;
300 }
302 ++Words;
303 break;
304 default:
305 break;
306 }
307
308 const uint8_t *DecoderTable = Words == 2 ? DecoderTable32 : DecoderTable16;
310 this, STI);
312 Size = Words * 2;
314 }
315
317 return DecodeStatus::Fail;
318}
319
321 switch (Cond) {
330 default:
332 }
333}
334
335DecodeStatus MSP430Disassembler::getInstructionCJ(MCInst &MI, uint64_t &Size,
336 ArrayRef<uint8_t> Bytes,
338 raw_ostream &CStream) const {
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344
345 if (Cond == 7)
346 MI.setOpcode(MSP430::JMP);
347 else {
348 MI.setOpcode(MSP430::JCC);
350 }
351
353 return DecodeStatus::Success;
354}
355
356DecodeStatus MSP430Disassembler::getInstruction(MCInst &MI, uint64_t &Size,
357 ArrayRef<uint8_t> Bytes,
359 raw_ostream &CStream) const {
360 if (Bytes.size() < 2) {
363 }
364
367 switch (Opc) {
368 case 0:
369 return getInstructionII(MI, Size, Bytes, Address, CStream);
370 case 1:
371 return getInstructionCJ(MI, Size, Bytes, Address, CStream);
372 default:
373 return getInstructionI(MI, Size, Bytes, Address, CStream);
374 }
375}
MCDisassembler::DecodeStatus DecodeStatus
static SDValue getCondCode(SelectionDAG &DAG, AArch64CC::CondCode CC)
Like SelectionDAG::getCondCode(), but for AArch64 condition codes.
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
static const uint8_t * getDecoderTable(uint64_t Size)
#define LLVM_EXTERNAL_VISIBILITY
static DecodeStatus DecodeCGImm(MCInst &MI, uint64_t Bits, uint64_t Address, const MCDisassembler *Decoder)
Definition MSP430Disassembler.cpp:105
static const unsigned GR16DecoderTable[]
Definition MSP430Disassembler.cpp:87
LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMSP430Disassembler()
Definition MSP430Disassembler.cpp:64
static DecodeStatus DecodeMemOperand(MCInst &MI, uint64_t Bits, uint64_t Address, const MCDisassembler *Decoder)
Definition MSP430Disassembler.cpp:122
static AddrMode DecodeSrcAddrModeII(unsigned Insn)
Definition MSP430Disassembler.cpp:183
static const uint8_t * getDecoderTable(AddrMode SrcAM, unsigned Words)
Definition MSP430Disassembler.cpp:201
static AddrMode DecodeDstAddrMode(unsigned Insn)
Definition MSP430Disassembler.cpp:189
static MCDisassembler * createMSP430Disassembler(const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx)
Definition MSP430Disassembler.cpp:57
static AddrMode DecodeSrcAddrMode(unsigned Rs, unsigned As)
Definition MSP430Disassembler.cpp:150
static AddrMode DecodeSrcAddrModeI(unsigned Insn)
Definition MSP430Disassembler.cpp:177
static const unsigned GR8DecoderTable[]
Definition MSP430Disassembler.cpp:69
AddrMode
Definition MSP430Disassembler.cpp:138
@ amConstant
Definition MSP430Disassembler.cpp:147
@ amIndirect
Definition MSP430Disassembler.cpp:142
@ amInvalid
Definition MSP430Disassembler.cpp:139
@ amRegister
Definition MSP430Disassembler.cpp:140
@ amSymbolic
Definition MSP430Disassembler.cpp:144
@ amImmediate
Definition MSP430Disassembler.cpp:145
@ amAbsolute
Definition MSP430Disassembler.cpp:146
@ amIndirectPost
Definition MSP430Disassembler.cpp:143
@ amIndexed
Definition MSP430Disassembler.cpp:141
static DecodeStatus DecodeGR8RegisterClass(MCInst &MI, uint64_t RegNo, uint64_t Address, const MCDisassembler *Decoder)
Definition MSP430Disassembler.cpp:76
static DecodeStatus DecodeGR16RegisterClass(MCInst &MI, uint64_t RegNo, uint64_t Address, const MCDisassembler *Decoder)
Definition MSP430Disassembler.cpp:94
const SmallVectorImpl< MachineOperand > & Cond
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
size_t size() const
size - Get the array size.
Context object for machine code objects.
Superclass for all disassemblers.
DecodeStatus
Ternary decode status.
Instances of this class represent a single low-level machine instruction.
static MCOperand createReg(MCRegister Reg)
static MCOperand createImm(int64_t Val)
Generic base class for all target subtargets.
Target - Wrapper for Target specific information.
This class implements an extremely fast bulk output stream that can only output to a stream.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
std::enable_if_t< std::is_integral_v< IntType >, IntType > fieldFromInstruction(const IntType &Insn, unsigned StartBit, unsigned NumBits)
uint16_t read16le(const void *P)
This is an optimization pass for GlobalISel generic memory operations.
Target & getTheMSP430Target()
constexpr int32_t SignExtend32(uint32_t X)
Sign-extend the number in the bottom B bits of X to a 32-bit integer.
static void RegisterMCDisassembler(Target &T, Target::MCDisassemblerCtorTy Fn)
RegisterMCDisassembler - Register a MCDisassembler implementation for the given target.