MSP430MCCodeEmitter.cpp Source File (original) (raw)

29#define DEBUG_TYPE "mccodeemitter"

31namespace llvm {

39 mutable unsigned Offset;

55 unsigned getMemOpValue(const MCInst &MI, unsigned Op,

59 unsigned getPCRelImmOpValue(const MCInst &MI, unsigned Op,

63 unsigned getCGImmOpValue(const MCInst &MI, unsigned Op,

67 unsigned getCCOpValue(const MCInst &MI, unsigned Op,

71public:

73 : Ctx(ctx), MCII(MCII) {}

78};

82 bool PCRel = false;

83 switch (Kind) {

89 PCRel = true;

90 }

92}

100 unsigned Size = Desc.getSize();

101

102

103 Offset = 2;

104

105 uint64_t BinaryOpCode = getBinaryCodeForInstr(MI, Fixups, STI);

106 size_t WordCount = Size / 2;

107

108 while (WordCount--) {

111 BinaryOpCode >>= 16;

112 }

113}

114

115unsigned MSP430MCCodeEmitter::getMachineOpValue(const MCInst &MI,

120 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg());

121

122 if (MO.isImm()) {

125 }

126

127 assert(MO.isExpr() && "Expected expr operand");

130 return 0;

131}

132

133unsigned MSP430MCCodeEmitter::getMemOpValue(const MCInst &MI, unsigned Op,

136 const MCOperand &MO1 = MI.getOperand(Op);

137 assert(MO1.isReg() && "Register operand expected");

138 unsigned Reg = Ctx.getRegisterInfo()->getEncodingValue(MO1.getReg());

139

140 const MCOperand &MO2 = MI.getOperand(Op + 1);

141 if (MO2.isImm()) {

142 Offset += 2;

143 return ((unsigned)MO2.getImm() << 4) | Reg;

144 }

145

146 assert(MO2.isExpr() && "Expr operand expected");

148 switch (Reg) {

149 case 0:

151 break;

152 case 2:

154 break;

155 default:

157 break;

158 }

160 Offset += 2;

161 return Reg;

162}

163

164unsigned MSP430MCCodeEmitter::getPCRelImmOpValue(const MCInst &MI, unsigned Op,

167 const MCOperand &MO = MI.getOperand(Op);

168 if (MO.isImm())

170

171 assert(MO.isExpr() && "Expr operand expected");

173 return 0;

174}

175

176unsigned MSP430MCCodeEmitter::getCGImmOpValue(const MCInst &MI, unsigned Op,

179 const MCOperand &MO = MI.getOperand(Op);

180 assert(MO.isImm() && "Expr operand expected");

181

182 int64_t Imm = MO.getImm();

183 switch (Imm) {

184 default:

186 case 4: return 0x22;

187 case 8: return 0x32;

188 case 0: return 0x03;

189 case 1: return 0x13;

190 case 2: return 0x23;

191 case -1: return 0x33;

192 }

193}

194

195unsigned MSP430MCCodeEmitter::getCCOpValue(const MCInst &MI, unsigned Op,

198 const MCOperand &MO = MI.getOperand(Op);

199 assert(MO.isImm() && "Immediate operand expected");

200 switch (MO.getImm()) {

208 default:

210 }

211}

212

217

218#include "MSP430GenMCCodeEmitter.inc"

219

220}

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

This file declares a class to represent arbitrary precision floating point values and provide a varie...

This file defines the SmallVector class.

MCCodeEmitter - Generic instruction encoding interface.

Context object for machine code objects.

Base class for the full range of assembler expressions which are needed for parsing.

static MCFixup create(uint32_t Offset, const MCExpr *Value, MCFixupKind Kind, bool PCRel=false)

Consider bit fields if we need more flags.

Instances of this class represent a single low-level machine instruction.

Describe properties that are true of each instruction in the target description file.

Interface to description of machine instruction set.

Instances of this class represent operands of the MCInst class.

MCRegister getReg() const

Returns the register number.

const MCExpr * getExpr() const

Generic base class for all target subtargets.

void encodeInstruction(const MCInst &MI, SmallVectorImpl< char > &CB, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const override

Encode the given Inst to bytes and append to CB.

Definition MSP430MCCodeEmitter.cpp:94

MSP430MCCodeEmitter(MCContext &ctx, MCInstrInfo const &MCII)

Definition MSP430MCCodeEmitter.cpp:72

This class consists of common code factored out of the SmallVector class to reduce code duplication b...

LLVM Value Representation.

#define llvm_unreachable(msg)

Marks that the current location is not supposed to be reachable.

void write(void *memory, value_type value, endianness endian)

Write a value to memory with a particular endianness.

This is an optimization pass for GlobalISel generic memory operations.

MCCodeEmitter * createMSP430MCCodeEmitter(const MCInstrInfo &MCII, MCContext &Ctx)

Creates a machine code emitter for MSP430.

Definition MSP430MCCodeEmitter.cpp:213

static Lanai::Fixups FixupKind(const MCExpr *Expr)

static void addFixup(SmallVectorImpl< MCFixup > &Fixups, uint32_t Offset, const MCExpr *Value, uint16_t Kind)

DWARFExpression::Operation Op