MachineBasicBlock.cpp Source File (original) (raw)

32#include "llvm/Config/llvm-config.h"

41#include

42#include

43using namespace llvm;

45#define DEBUG_TYPE "codegen"

48 "print-slotindexes",

49 cl::desc("When printing machine IR, annotate instructions and blocks with "

50 "SlotIndexes when available"),

54 : BB(B), Number(-1), xParent(&MF) {

55 Insts.Parent = this;

56 if (B)

57 IrrLoopHeaderWeight = B->getIrrLoopHeaderWeight();

58}

60MachineBasicBlock::~MachineBasicBlock() = default;

64 if (!CachedMCSymbol) {

74 Suffix += ".cold";

76 Suffix += ".eh";

77 } else {

81 Suffix = (Suffix + Twine(".__part.") + Twine(SectionID.Number)).str();

82 }

84 } else {

90 }

91 }

92 return CachedMCSymbol;

93}

96 if (!CachedEHCatchretMCSymbol) {

102 }

103 return CachedEHCatchretMCSymbol;

104}

105

107 if (!CachedEndMCSymbol) {

112 false);

113 }

114 return CachedEndMCSymbol;

115}

116

119 return OS;

120}

121

124}

125

126

127

128

129

130

131

132

137

138

141 MI.addRegOperandsToUseLists(RegInfo);

142}

143

146 N->getParent()->removeFromMBBNumbering(N->Number);

147 N->Number = -1;

148}

149

150

151

153 assert(->getParent() && "machine instruction already in a basic block");

154 N->setParent(Parent);

155

156

157

159 N->addRegOperandsToUseLists(MF->getRegInfo());

160 MF->handleInsertion(*N);

161}

162

163

164

166 assert(N->getParent() && "machine instruction not in a basic block");

167

168

170 MF->handleRemoval(*N);

171 N->removeRegOperandsFromUseLists(MF->getRegInfo());

172 }

173

174 N->setParent(nullptr);

175}

176

177

178

180 instr_iterator First,

181 instr_iterator Last) {

182 assert(Parent->getParent() == FromList.Parent->getParent() &&

183 "cannot transfer MachineInstrs between MachineFunctions");

184

185

186 if (this == &FromList)

187 return;

188

189 assert(Parent != FromList.Parent && "Two lists have the same parent?");

190

191

192

194 First->setParent(Parent);

195}

196

198 assert(->getParent() && "MI is still in a block!");

199 Parent->getParent()->deleteMachineInstr(MI);

200}

201

204 while (I != E && I->isPHI())

205 ++I;

206 assert((I == E || ->isInsideBundle()) &&

207 "First non-phi MI cannot be inside a bundle!");

208 return I;

209}

210

214

216 while (I != E && (I->isPHI() || I->isPosition() ||

217 TII->isBasicBlockPrologue(*I)))

218 ++I;

219

220

221 assert((I == E || ->isInsideBundle()) &&

222 "First non-phi / non-label instruction is inside a bundle!");

223 return I;

224}

225

228 Register Reg, bool SkipPseudoOp) {

230

232 while (I != E && (I->isPHI() || I->isPosition() || I->isDebugInstr() ||

233 (SkipPseudoOp && I->isPseudoProbe()) ||

234 TII->isBasicBlockPrologue(*I, Reg)))

235 ++I;

236

237

238 assert((I == E || ->isInsideBundle()) &&

239 "First non-phi / non-label / non-debug "

240 "instruction is inside a bundle!");

241 return I;

242}

243

246 while (I != B && ((--I)->isTerminator() || I->isDebugInstr()))

247 ;

248 while (I != E && ->isTerminator())

249 ++I;

250 return I;

251}

252

255 while (I != B && ((--I)->isTerminator() || I->isDebugInstr()))

256 ;

257 while (I != E && ->isTerminator())

258 ++I;

259 return I;

260}

261

263 return find_if(instrs(), [](auto &II) { return II.isTerminator(); });

264}

265

268

270}

271

274

276 while (I != B) {

277 --I;

278

279 if (I->isDebugInstr() || I->isInsideBundle())

280 continue;

281 if (SkipPseudoOp && I->isPseudoProbe())

282 continue;

283 return I;

284 }

285

286 return end();

287}

288

291 if (Succ->isEHPad())

292 return true;

293 return false;

294}

295

298}

299

300#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)

303}

304#endif

305

308 if (Succ->isInlineAsmBrIndirectTarget())

309 return true;

310 }

311 return false;

312}

313

316 return false;

317 return true;

318}

319

322 return LBB->hasName();

323 return false;

324}

325

328 return LBB->getName();

329 else

331}

332

333

335 std::string Name;

340 else

343}

344

346 bool IsStandalone) const {

348 if (!MF) {

349 OS << "Can't print out MachineBasicBlock because parent MachineFunction"

350 << " is null\n";

351 return;

352 }

354 const Module *M = F.getParent();

357 print(OS, MST, Indexes, IsStandalone);

358}

359

362 bool IsStandalone) const {

364 if (!MF) {

365 OS << "Can't print out MachineBasicBlock because parent MachineFunction"

366 << " is null\n";

367 return;

368 }

369

372

374 OS << ":\n";

375

379 bool HasLineAttributes = false;

380

381

383 if (Indexes) OS << '\t';

384

385 OS << "; predecessors: ";

386 ListSeparator LS;

389 OS << '\n';

390 HasLineAttributes = true;

391 }

392

394 if (Indexes) OS << '\t';

395

396 OS.indent(2) << "successors: ";

397 ListSeparator LS;

400 if (!Probs.empty())

401 OS << '('

403 << ')';

404 }

405 if (!Probs.empty() && IsStandalone) {

406

407 OS << "; ";

408 ListSeparator LS;

414 100.0 * 100.0) /

415 100.0)

416 << ')';

417 }

418 }

419

420 OS << '\n';

421 HasLineAttributes = true;

422 }

423

425 if (Indexes) OS << '\t';

427

428 ListSeparator LS;

429 for (const auto &LI : liveins()) {

431 if (!LI.LaneMask.all())

433 }

434 HasLineAttributes = true;

435 }

436

437 if (HasLineAttributes)

438 OS << '\n';

439

440 bool IsInBundle = false;

445 OS << '\t';

446 }

447

448 if (IsInBundle && .isInsideBundle()) {

450 IsInBundle = false;

451 }

452

453 OS.indent(IsInBundle ? 4 : 2);

454 MI.print(OS, MST, IsStandalone, false, false,

455 false, &TII);

456

458 OS << " {";

459 IsInBundle = true;

460 }

461 OS << '\n';

462 }

463

464 if (IsInBundle)

466

467 if (IrrLoopHeaderWeight && IsStandalone) {

468 if (Indexes) OS << '\t';

469 OS.indent(2) << "; Irreducible loop header weight: " << *IrrLoopHeaderWeight

470 << '\n';

471 }

472}

473

474

475

476

477

478

479

480

481

482

483

484

485

486

487

488

489

493 bool hasAttributes = false;

494

495 auto PrintBBRef = [&](const BasicBlock *bb) {

496 os << "%ir-block.";

497 if (bb->hasName()) {

498 os << bb->getName();

499 } else {

500 int slot = -1;

501

502 if (moduleSlotTracker) {

504 } else if (bb->getParent()) {

508 }

509

510 if (slot == -1)

511 os << "";

512 else

513 os << slot;

514 }

515 };

516

519 if (bb->hasName()) {

520 os << '.' << bb->getName();

521 } else {

522 hasAttributes = true;

523 os << " (";

524 PrintBBRef(bb);

525 }

526 }

527 }

528

531 os << (hasAttributes ? ", " : " (");

532 os << "machine-block-address-taken";

533 hasAttributes = true;

534 }

536 os << (hasAttributes ? ", " : " (");

537 os << "ir-block-address-taken ";

539 hasAttributes = true;

540 }

542 os << (hasAttributes ? ", " : " (");

543 os << "landing-pad";

544 hasAttributes = true;

545 }

547 os << (hasAttributes ? ", " : " (");

548 os << "inlineasm-br-indirect-target";

549 hasAttributes = true;

550 }

552 os << (hasAttributes ? ", " : " (");

553 os << "ehfunclet-entry";

554 hasAttributes = true;

555 }

557 os << (hasAttributes ? ", " : " (");

559 hasAttributes = true;

560 }

562 os << (hasAttributes ? ", " : " (");

563 os << "bbsections ";

566 os << "Exception";

567 break;

569 os << "Cold";

570 break;

571 default:

573 }

574 hasAttributes = true;

575 }

576 if (getBBID().has_value()) {

577 os << (hasAttributes ? ", " : " (");

578 os << "bb_id " << getBBID()->BaseID;

579 if (getBBID()->CloneID != 0)

580 os << " " << getBBID()->CloneID;

581 hasAttributes = true;

582 }

583 if (CallFrameSize != 0) {

584 os << (hasAttributes ? ", " : " (");

585 os << "call-frame-size " << CallFrameSize;

586 hasAttributes = true;

587 }

588 }

589

590 if (hasAttributes)

591 os << ')';

592}

593

595 bool ) const {

596 OS << '%';

598}

599

601 LiveInVector::iterator I = find_if(

603 if (I == LiveIns.end())

604 return;

605

606 I->LaneMask &= ~LaneMask;

607 if (I->LaneMask.none())

608 LiveIns.erase(I);

609}

610

613

614 LiveInVector::iterator LI = LiveIns.begin() + (I - LiveIns.begin());

615 return LiveIns.erase(LI);

616}

617

621 return I != livein_end() && (I->LaneMask & LaneMask).any();

622}

623

628 });

629

630 LiveInVector::const_iterator I = LiveIns.begin();

631 LiveInVector::const_iterator J;

632 LiveInVector::iterator Out = LiveIns.begin();

633 for (; I != LiveIns.end(); ++Out, I = J) {

636 for (J = std::next(I); J != LiveIns.end() && J->PhysReg == PhysReg; ++J)

637 LaneMask |= J->LaneMask;

638 Out->PhysReg = PhysReg;

639 Out->LaneMask = LaneMask;

640 }

641 LiveIns.erase(Out, LiveIns.end());

642}

643

646 assert(getParent() && "MBB must be inserted in function");

648 assert(RC && "Register class is required");

650 "Only the entry block and landing pads can have physreg live ins");

651

652 bool LiveIn = isLiveIn(PhysReg);

656

657

658 if (LiveIn)

659 for (;I != E && I->isCopy(); ++I)

660 if (I->getOperand(1).getReg() == PhysReg) {

661 Register VirtReg = I->getOperand(0).getReg();

662 if ( MRI .constrainRegClass(VirtReg, RC))

664 return VirtReg;

665 }

666

667

668 Register VirtReg = MRI.createVirtualRegister(RC);

671 if (!LiveIn)

673 return VirtReg;

674}

675

678}

679

682}

683

686 if (TerminatorI == MBB.end())

687 return -1;

688 const MachineInstr &Terminator = *TerminatorI;

690 return TII->getJumpTableIndex(Terminator);

691}

692

696 << "\n");

697

699

701 return;

702

707 (void) B;

708 assert( && "UpdateTerminators requires analyzable predecessors!");

709 if (Cond.empty()) {

710 if (TBB) {

711

712

715 } else {

716

717

718

719

720

721

722

723 if (!PreviousLayoutSuccessor || isSuccessor (PreviousLayoutSuccessor) ||

724 PreviousLayoutSuccessor->isEHPad())

725 return;

726

727

728

731 }

732 return;

733 }

734

735 if (FBB) {

736

737

738

741 return;

747 }

748 return;

749 }

750

751

752 assert(PreviousLayoutSuccessor);

755

756 if (PreviousLayoutSuccessor == TBB) {

757

758

759

762 Cond.clear();

764 }

765 return;

766 }

767

768

771

772 Cond.clear();

774 return;

775 }

781 }

782}

783

785#ifndef NDEBUG

786 int64_t Sum = 0;

787 for (auto Prob : Probs)

788 Sum += Prob.getNumerator();

789

790

791

793 Probs.size() &&

794 "The sum of successors's probabilities exceeds one.");

795#endif

796}

797

800

801

802 if (!(Probs.empty() && !Successors.empty()))

803 Probs.push_back(Prob);

804 Successors.push_back(Succ);

805 Succ->addPredecessor(this);

806}

807

809

810

811

812 Probs.clear();

813 Successors.push_back(Succ);

814 Succ->addPredecessor(this);

815}

816

819 bool NormalizeSuccProbs) {

821 assert(OldI != succ_end() && "Old is not a successor of this block!");

823 "New is already a successor of this block!");

824

825

826

827

828

829

831 : *getProbabilityIterator(OldI));

832 if (NormalizeSuccProbs)

834}

835

837 bool NormalizeSuccProbs) {

840}

841

844 assert(I != Successors.end() && "Not a current successor!");

845

846

847

848 if (!Probs.empty()) {

849 probability_iterator WI = getProbabilityIterator(I);

850 Probs.erase(WI);

851 if (NormalizeSuccProbs)

853 }

854

855 (*I)->removePredecessor(this);

856 return Successors.erase(I);

857}

858

861 if (Old == New)

862 return;

863

868 if (*I == Old) {

869 OldI = I;

870 if (NewI != E)

871 break;

872 }

873 if (*I == New) {

874 NewI = I;

875 if (OldI != E)

876 break;

877 }

878 }

879 assert(OldI != E && "Old is not a successor of this block");

880

881

882 if (NewI == E) {

883 Old->removePredecessor(this);

884 New->addPredecessor(this);

885 *OldI = New;

886 return;

887 }

888

889

890

891 if (!Probs.empty()) {

892 auto ProbIter = getProbabilityIterator(NewI);

893 if (!ProbIter->isUnknown())

894 *ProbIter += *getProbabilityIterator(OldI);

895 }

897}

898

901 if (!Orig->Probs.empty())

903 else

905}

906

908 Predecessors.push_back(Pred);

909}

910

911void MachineBasicBlock::removePredecessor(MachineBasicBlock *Pred) {

913 assert(I != Predecessors.end() && "Pred is not a predecessor of this block!");

914 Predecessors.erase(I);

915}

916

918 if (this == FromMBB)

919 return;

920

923

924

925

926 if (!FromMBB->Probs.empty()) {

927 auto Prob = *FromMBB->Probs.begin();

929 } else

931

933 }

934}

935

936void

938 if (this == FromMBB)

939 return;

940

943 if (!FromMBB->Probs.empty()) {

944 auto Prob = *FromMBB->Probs.begin();

946 } else

949

950

952 }

954}

955

958}

959

962}

963

967}

968

970 return Successors.size() == 1 ? Successors[0] : nullptr;

971}

972

974 return Predecessors.size() == 1 ? Predecessors[0] : nullptr;

975}

976

979 ++Fallthrough;

980

982 return nullptr;

983

984

986 return nullptr;

987

988

993

994

995

996

997

999 ? &*Fallthrough

1000 : nullptr;

1001 }

1002

1003

1004 if ( TBB ) return &*Fallthrough;

1005

1006

1007

1010 return &*Fallthrough;

1011

1012

1013

1014 if (Cond.empty()) return nullptr;

1015

1016

1017

1018 return (FBB == nullptr) ? &*Fallthrough : nullptr;

1019}

1020

1023}

1024

1026 bool UpdateLiveIns,

1029 ++SplitPoint;

1030

1031 if (SplitPoint == end()) {

1032

1033 return this;

1034 }

1035

1037

1039 if (UpdateLiveIns) {

1040

1041

1047 }

1048

1050

1052 SplitBB->splice(SplitBB->begin(), this, SplitPoint, end());

1053

1056

1057 if (UpdateLiveIns)

1059

1060 if (LIS)

1062

1063 return SplitBB;

1064}

1065

1066

1067

1070 int JumpTableIndex) {

1071 assert(JumpTableIndex >= 0 && "need valid index");

1074

1075

1078 if (B != nullptr) {

1080 break;

1081 }

1082 }

1083 if (MBB == nullptr)

1084 return true;

1088 if (Pred == &IgnoreMBB)

1089 continue;

1092 Cond.clear();

1094 false)) {

1095

1096 continue;

1097 }

1099 if (PredJTI >= 0) {

1100 if (PredJTI == JumpTableIndex)

1101 return true;

1102 continue;

1103 }

1104

1105 return true;

1106 }

1107 return false;

1108}

1109

1111private:

1115

1116public:

1118 : MF(MF), Indexes(Indexes) {

1120 }

1121

1124 for (auto MI : Insertions)

1126 }

1127

1129

1130 if (Indexes)

1132 }

1133

1135 if (Indexes && !Insertions.remove(&MI))

1137 }

1138};

1139

1140#define GET_RESULT(RESULT, GETTER, INFIX) \

1141 [MF, P, MFAM]() { \

1142 if (P) { \

1143 auto *Wrapper = P->getAnalysisIfAvailable<RESULT##INFIX##WrapperPass>(); \

1144 return Wrapper ? &Wrapper->GETTER() : nullptr; \

1145 } \

1146 return MFAM->getCachedResult<RESULT##Analysis>(*MF); \

1147 }()

1148

1152 assert((P || MFAM) && "Need a way to get analysis results!");

1154 return nullptr;

1155

1158

1161

1162

1163 bool ChangedIndirectJump = false;

1165 if (JTI >= 0) {

1168 ChangedIndirectJump = true;

1169 }

1170

1175

1178 if (LIS)

1180 else if (Indexes)

1182

1183

1184

1185

1187

1188

1190 if (LV)

1194 if (MO.getReg() == 0 || !MO.isKill() || MO.isUndef())

1195 continue;

1200 MO.setIsKill(false);

1201 }

1202 }

1203 }

1204

1206 if (LIS) {

1210 if (!MO.isReg() || MO.getReg() == 0)

1211 continue;

1212

1216 }

1217 }

1218 }

1219

1221

1222

1223

1224 if (Succ == PrevFallthrough)

1225 PrevFallthrough = NMBB;

1226

1227 if (!ChangedIndirectJump) {

1230 }

1231

1232

1238

1239

1240

1241

1242

1243

1245 if (MergedDL && (MergedDL.getLine() || MergedDL.getCol()))

1246 DL = MergedDL;

1248 }

1249

1250

1252

1253

1254 for (const auto &LI : Succ->liveins())

1256

1257

1259 if (LV) {

1260

1261 while (!KilledRegs.empty()) {

1264 if (!(--I)->addRegisterKilled(Reg, TRI, false))

1265 continue;

1266 if (Reg.isVirtual())

1268 LLVM_DEBUG(dbgs() << "Restored terminator kill: " << *I);

1269 break;

1270 }

1271 }

1272

1273 if (LiveInSets != nullptr)

1274 LV->addNewBlock(NMBB, this, Succ, *LiveInSets);

1275 else

1277 }

1278

1279 if (LIS) {

1280

1281

1282

1283

1284

1285

1286

1287 bool isLastMBB =

1289

1293

1294

1298 I != E && I->isPHI(); ++I) {

1299 for (unsigned ni = 1, ne = I->getNumOperands(); ni != ne; ni += 2) {

1300 if (I->getOperand(ni+1).getMBB() == NMBB) {

1303 PHISrcRegs.insert(Reg);

1305 continue;

1306

1310 "PHI sources should be live out of their predecessors.");

1314 }

1315 }

1316 }

1317

1319 for (unsigned i = 0, e = MRI->getNumVirtRegs(); i != e; ++i) {

1322 continue;

1323

1325 if (!LI.liveAt(PrevIndex))

1326 continue;

1327

1331 assert(VNI && "LiveInterval should have VNInfo where it is live.");

1333

1334 for (auto &SR : LI.subranges()) {

1335 VNInfo *VNI = SR.getVNInfoAt(PrevIndex);

1336 if (VNI)

1338 }

1339 } else if ( isLiveOut && !isLastMBB) {

1342 SR.removeSegment(StartIndex, EndIndex);

1343 }

1344 }

1345

1346

1347

1349 }

1350

1351 if (MDTU)

1353

1355 if (MachineLoop *TIL = MLI->getLoopFor(this)) {

1356

1357

1358 if (MachineLoop *DestLoop = MLI->getLoopFor(Succ)) {

1359 if (TIL == DestLoop) {

1360

1361 DestLoop->addBasicBlockToLoop(NMBB, *MLI);

1362 } else if (TIL->contains(DestLoop)) {

1363

1364 TIL->addBasicBlockToLoop(NMBB, *MLI);

1365 } else if (DestLoop->contains(TIL)) {

1366

1367 DestLoop->addBasicBlockToLoop(NMBB, *MLI);

1368 } else {

1369

1370

1371

1372

1373 assert(DestLoop->getHeader() == Succ &&

1374 "Should not create irreducible loops!");

1375 if (MachineLoop *P = DestLoop->getParentLoop())

1376 P->addBasicBlockToLoop(NMBB, *MLI);

1377 }

1378 }

1379 }

1380

1381 return NMBB;

1382}

1383

1386

1387

1389 return false;

1390

1391

1392

1394 return false;

1395

1397

1398

1400 return false;

1401

1402

1405 return true;

1406

1407

1408

1412

1414 false))

1415 return false;

1416

1417

1418

1419

1420

1421 if (TBB && TBB == FBB) {

1422 LLVM_DEBUG(dbgs() << "Won't split critical edge after degenerate "

1424 return false;

1425 }

1426 return true;

1427}

1428

1429

1430

1432

1433 if (MI->isBundledWithSucc() && ->isBundledWithPred())

1434 MI->unbundleFromSucc();

1435

1436 if (MI->isBundledWithPred() && ->isBundledWithSucc())

1437 MI->unbundleFromPred();

1438

1439

1440}

1441

1445 return Insts.erase(I);

1446}

1447

1453}

1454

1457 assert(->isBundledWithPred() && ->isBundledWithSucc() &&

1458 "Cannot insert instruction with bundle flags");

1459

1460 if (I != instr_end() && I->isBundledWithPred()) {

1463 }

1465}

1466

1467

1468

1472 return this;

1473}

1474

1475

1479}

1480

1481

1482

1485 assert(Old != New && "Cannot replace self with self!");

1486

1489 --I;

1490 if (->isTerminator()) break;

1491

1492

1493

1495 if (MO.isMBB() && MO.getMBB() == Old)

1496 MO.setMBB(New);

1497 }

1498

1499

1501}

1502

1506 for (unsigned i = 2, e = MI.getNumOperands() + 1; i != e; i += 2) {

1508 if (MO.getMBB() == Old)

1510 }

1511}

1512

1513

1514

1517

1520 return MBBI->getDebugLoc();

1521 return {};

1522}

1523

1527

1529 if ( MBBI ->isDebugInstr())

1530 return MBBI->getDebugLoc();

1531 return {};

1532}

1533

1534

1535

1538 return {};

1539

1541 if ( MBBI ->isDebugInstr())

1542 return MBBI->getDebugLoc();

1543 return {};

1544}

1545

1548 return {};

1549

1552 return MBBI->getDebugLoc();

1553 return {};

1554}

1555

1556

1557

1562 while (TI != end() && !TI->isBranch())

1563 ++TI;

1564

1565 if (TI != end()) {

1566 DL = TI->getDebugLoc();

1567 for (++TI ; TI != end() ; ++TI)

1568 if (TI->isBranch())

1570 }

1571 return DL;

1572}

1573

1574

1577 if (Probs.empty())

1579

1580 const auto &Prob = *getProbabilityIterator(Succ);

1581 if (Prob.isUnknown()) {

1582

1583

1584 unsigned KnownProbNum = 0;

1586 for (const auto &P : Probs) {

1587 if (.isUnknown()) {

1588 Sum += P;

1589 KnownProbNum++;

1590 }

1591 }

1592 return Sum.getCompl() / (Probs.size() - KnownProbNum);

1593 } else

1594 return Prob;

1595}

1596

1597

1601 if (Probs.empty())

1602 return;

1603 *getProbabilityIterator(I) = Prob;

1604}

1605

1606

1607MachineBasicBlock::const_probability_iterator

1608MachineBasicBlock::getProbabilityIterator(

1610 assert(Probs.size() == Successors.size() && "Async probability list!");

1611 const size_t index = std::distance(Successors.begin(), I);

1612 assert(index < Probs.size() && "Not a current successor!");

1613 return Probs.begin() + index;

1614}

1615

1616

1617MachineBasicBlock::probability_iterator

1619 assert(Probs.size() == Successors.size() && "Async probability list!");

1620 const size_t index = std::distance(Successors.begin(), I);

1621 assert(index < Probs.size() && "Not a current successor!");

1622 return Probs.begin() + index;

1623}

1624

1625

1626

1627

1628

1629

1630

1634 unsigned Neighborhood) const {

1635 unsigned N = Neighborhood;

1636

1637

1639 for (; I != end() && N > 0; ++I) {

1640 if (I->isDebugOrPseudoInstr())

1641 continue;

1642

1643 --N;

1644

1646

1647

1648 if (Info.Read)

1650

1651 if (Info.FullyDefined || Info.Clobbered)

1653 }

1654

1655

1656

1657 if (I == end()) {

1660 if (TRI->regsOverlap(LI.PhysReg, Reg))

1662 }

1663 }

1664

1666 }

1667

1668

1669 N = Neighborhood;

1670

1671

1673

1675 do {

1676 --I;

1677

1678 if (I->isDebugOrPseudoInstr())

1679 continue;

1680

1681 --N;

1682

1684

1685

1686

1687

1688 if (Info.DeadDef)

1690

1691 if (Info.Defined) {

1692 if ( Info .PartialDeadDef)

1694

1695

1696

1697

1698 break;

1699 }

1700

1701 if (Info.Killed || Info.Clobbered)

1703

1704 if (Info.Read)

1706

1707 } while (I != begin() && N > 0);

1708 }

1709

1710

1711

1712 while (I != begin() && std::prev(I)->isDebugOrPseudoInstr())

1713 --I;

1714

1715

1717

1719 if (TRI->regsOverlap(LI.PhysReg, Reg))

1721

1723 }

1724

1725

1727}

1728

1731

1733}

1734

1737

1738

1739

1741}

1742

1744 LiveIns.clear();

1745}

1746

1748 std::vector &OldLiveIns) {

1749 assert(OldLiveIns.empty() && "Vector must be empty");

1751}

1752

1756 "Liveness information is accurate");

1757 return LiveIns.begin();

1758}

1759

1764 "Liveness information is accurate");

1765

1767 MCPhysReg ExceptionPointer = 0, ExceptionSelector = 0;

1772 }

1773

1774 return liveout_iterator(*this, ExceptionPointer, ExceptionSelector, false);

1775}

1776

1778 unsigned Cntr = 0;

1780 for (auto I = R.begin(), E = R.end(); I != E; ++I) {

1781 if (++Cntr > Limit)

1782 return true;

1783 }

1784 return false;

1785}

1786

unsigned const MachineRegisterInfo * MRI

MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL

MachineBasicBlock MachineBasicBlock::iterator MBBI

static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")

Analysis containing CSE Info

#define LLVM_DUMP_METHOD

Mark debug helper function definitions like dump() that should not be stripped from debug builds.

const HexagonInstrInfo * TII

This file implements the LivePhysRegs utility for tracking liveness of physical registers.

#define GET_RESULT(RESULT, GETTER, INFIX)

static bool jumpTableHasOtherUses(const MachineFunction &MF, const MachineBasicBlock &IgnoreMBB, int JumpTableIndex)

static void unbundleSingleMI(MachineInstr *MI)

Prepare MI to be removed from its bundle.

static int findJumpTableIndex(const MachineBasicBlock &MBB)

static cl::opt< bool > PrintSlotIndexes("print-slotindexes", cl::desc("When printing machine IR, annotate instructions and blocks with " "SlotIndexes when available"), cl::init(true), cl::Hidden)

unsigned const TargetRegisterInfo * TRI

uint64_t IntrinsicInst * II

const SmallVectorImpl< MachineOperand > MachineBasicBlock * TBB

const SmallVectorImpl< MachineOperand > & Cond

assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())

static bool isLiveOut(const MachineBasicBlock &MBB, unsigned Reg)

This file describes how to lower LLVM code to machine code.

SlotIndexUpdateDelegate(MachineFunction &MF, SlotIndexes *Indexes)

~SlotIndexUpdateDelegate()

void MF_HandleRemoval(MachineInstr &MI) override

Callback before a removal. This should not modify the MI directly.

void MF_HandleInsertion(MachineInstr &MI) override

Callback after an insertion. This should not modify the MI directly.

A container for analyses that lazily runs them and caches their results.

LLVM Basic Block Representation.

static uint32_t getDenominator()

static BranchProbability getUnknown()

uint32_t getNumerator() const

static BranchProbability getZero()

static DILocation * getMergedLocation(DILocation *LocA, DILocation *LocB)

When two instructions are combined into a single instruction we also need to combine the original loc...

bool hasPersonalityFn() const

Check whether this function has a personality function.

Constant * getPersonalityFn() const

Get the personality function associated with this function.

void splitCriticalEdge(BasicBlockT *FromBB, BasicBlockT *ToBB, BasicBlockT *NewBB)

Apply updates that the critical edge (FromBB, ToBB) has been split with NewBB.

unsigned removeBranch(MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override

Remove the branching code at the end of the specific MBB.

bool isPredicated(const MachineInstr &MI) const override

Returns true if the instruction is already predicated.

bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const override

Analyze the branching code at the end of MBB, returning true if it cannot be understood (e....

bool reverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const override

Reverses the branch condition of the specified condition list, returning false on success and true if...

unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const override

Insert branch code into the end of the specified MachineBasicBlock.

LiveInterval - This class represents the liveness of a register, or stack slot.

iterator_range< subrange_iterator > subranges()

void repairIntervalsInRange(MachineBasicBlock *MBB, MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End, ArrayRef< Register > OrigRegs)

Update live intervals for instructions in a range of iterators.

bool hasInterval(Register Reg) const

SlotIndex getMBBStartIdx(const MachineBasicBlock *mbb) const

Return the first index in the given basic block.

void insertMBBInMaps(MachineBasicBlock *MBB)

LiveInterval & getInterval(Register Reg)

A set of physical registers with utility functions to track liveness when walking backward/forward th...

void stepBackward(const MachineInstr &MI)

Simulates liveness when stepping backwards over an instruction(bundle).

void init(const TargetRegisterInfo &TRI)

(re-)initializes and clears the set.

void addLiveOuts(const MachineBasicBlock &MBB)

Adds all live-out registers of basic block MBB.

iterator addSegment(Segment S)

Add the specified Segment to this range, merging segments as appropriate.

bool liveAt(SlotIndex index) const

void removeSegment(SlotIndex Start, SlotIndex End, bool RemoveDeadValNo=false)

Remove the specified interval from this live range.

VNInfo * getVNInfoAt(SlotIndex Idx) const

getVNInfoAt - Return the VNInfo that is live at Idx, or NULL.

VarInfo & getVarInfo(Register Reg)

getVarInfo - Return the VarInfo structure for the specified VIRTUAL register.

void addNewBlock(MachineBasicBlock *BB, MachineBasicBlock *DomBB, MachineBasicBlock *SuccBB)

addNewBlock - Add a new basic block BB between DomBB and SuccBB.

Context object for machine code objects.

MCSymbol * createBlockSymbol(const Twine &Name, bool AlwaysEmit=false)

Get or create a symbol for a basic block.

MCSymbol * getOrCreateSymbol(const Twine &Name)

Lookup the symbol inside with the specified Name.

Wrapper class representing physical registers. Should be passed by value.

constexpr bool isPhysical() const

Return true if the specified register number is in the physical register namespace.

MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...

bool isInlineAsmBrIndirectTarget() const

Returns true if this is the indirect dest of an INLINEASM_BR.

DebugLoc rfindPrevDebugLoc(reverse_instr_iterator MBBI)

Has exact same behavior as findPrevDebugLoc (it also searches towards the beginning of this MBB) exce...

void transferSuccessorsAndUpdatePHIs(MachineBasicBlock *FromMBB)

Transfers all the successors, as in transferSuccessors, and update PHI operands in the successor bloc...

bool hasEHPadSuccessor() const

void normalizeSuccProbs()

Normalize probabilities of all successors so that the sum of them becomes one.

livein_iterator livein_end() const

iterator getFirstTerminatorForward()

Finds the first terminator in a block by scanning forward.

bool isEHPad() const

Returns true if the block is a landing pad.

void replacePhiUsesWith(MachineBasicBlock *Old, MachineBasicBlock *New)

Update all phi nodes in this basic block to refer to basic block New instead of basic block Old.

MachineInstr * remove_instr(MachineInstr *I)

Remove the possibly bundled instruction from the instruction list without deleting it.

instr_iterator instr_begin()

MachineInstrBundleIterator< const MachineInstr > const_iterator

MCSymbol * getSymbol() const

Return the MCSymbol for this basic block.

SmallVectorImpl< MachineBasicBlock * >::const_iterator const_succ_iterator

MCSymbol * getEHCatchretSymbol() const

Return the EHCatchret Symbol for this basic block.

void moveBefore(MachineBasicBlock *NewAfter)

Move 'this' block before or after the specified block.

void replaceSuccessor(MachineBasicBlock *Old, MachineBasicBlock *New)

Replace successor OLD with NEW and update probability info.

MachineBasicBlock * getFallThrough(bool JumpToFallThrough=true)

Return the fallthrough block if the block can implicitly transfer control to the block after it by fa...

void transferSuccessors(MachineBasicBlock *FromMBB)

Transfers all the successors from MBB to this machine basic block (i.e., copies all the successors Fr...

MachineBasicBlock * SplitCriticalEdge(MachineBasicBlock *Succ, Pass &P, std::vector< SparseBitVector<> > *LiveInSets=nullptr, MachineDomTreeUpdater *MDTU=nullptr)

Split the critical edge from this block to the given successor block, and return the newly created bl...

bool hasLabelMustBeEmitted() const

Test whether this block must have its label emitted.

instr_iterator insert(instr_iterator I, MachineInstr *M)

Insert MI into the instruction list before I, possibly inside a bundle.

BranchProbability getSuccProbability(const_succ_iterator Succ) const

Return probability of the edge from this block to MBB.

iterator_range< livein_iterator > liveins() const

iterator_range< iterator > phis()

Returns a range that iterates over the phis in the basic block.

reverse_instr_iterator instr_rbegin()

int getNumber() const

MachineBasicBlocks are uniquely numbered at the function level, unless they're not in a MachineFuncti...

iterator SkipPHIsAndLabels(iterator I)

Return the first instruction in MBB after I that is not a PHI or a label.

void addSuccessorWithoutProb(MachineBasicBlock *Succ)

Add Succ as a successor of this MachineBasicBlock.

bool hasName() const

Check if there is a name of corresponding LLVM basic block.

void setCallFrameSize(unsigned N)

Set the call frame size on entry to this basic block.

std::optional< UniqueBBID > getBBID() const

const BasicBlock * getBasicBlock() const

Return the LLVM basic block that this instance corresponded to originally.

void splitSuccessor(MachineBasicBlock *Old, MachineBasicBlock *New, bool NormalizeSuccProbs=false)

Split the old successor into old plus new and updates the probability info.

@ PrintNameIr

Add IR name where available.

@ PrintNameAttributes

Print attributes.

void updateTerminator(MachineBasicBlock *PreviousLayoutSuccessor)

Update the terminator instructions in block to account for changes to block layout which may have bee...

const MachineBasicBlock * getSinglePredecessor() const

Return the predecessor of this block if it has a single predecessor.

iterator SkipPHIsLabelsAndDebug(iterator I, Register Reg=Register(), bool SkipPseudoOp=true)

Return the first instruction in MBB after I that is not a PHI, label or debug.

bool canFallThrough()

Return true if the block can implicitly transfer control to the block after it by falling off the end...

void setSuccProbability(succ_iterator I, BranchProbability Prob)

Set successor probability of a given iterator.

iterator getFirstNonDebugInstr(bool SkipPseudoOp=true)

Returns an iterator to the first non-debug instruction in the basic block, or end().

succ_iterator succ_begin()

bool livein_empty() const

void removeLiveIn(MCRegister Reg, LaneBitmask LaneMask=LaneBitmask::getAll())

Remove the specified register from the live in set.

void printAsOperand(raw_ostream &OS, bool PrintType=true) const

void validateSuccProbs() const

Validate successors' probabilities and check if the sum of them is approximate one.

bool isIRBlockAddressTaken() const

Test whether this block is the target of an IR BlockAddress.

LiveInVector::const_iterator livein_iterator

MCSymbol * getEndSymbol() const

Returns the MCSymbol marking the end of this basic block.

void clearLiveIns()

Clear live in list.

bool isEHFuncletEntry() const

Returns true if this is the entry block of an EH funclet.

LivenessQueryResult computeRegisterLiveness(const TargetRegisterInfo *TRI, MCRegister Reg, const_iterator Before, unsigned Neighborhood=10) const

Return whether (physical) register Reg has been defined and not killed as of just before Before.

iterator getFirstTerminator()

Returns an iterator to the first terminator instruction of this basic block.

livein_iterator livein_begin() const

unsigned succ_size() const

bool isReturnBlock() const

Convenience function that returns true if the block ends in a return instruction.

const uint32_t * getBeginClobberMask(const TargetRegisterInfo *TRI) const

Get the clobber mask for the start of this basic block.

MBBSectionID getSectionID() const

Returns the section ID of this basic block.

bool isEntryBlock() const

Returns true if this is the entry block of the function.

void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())

Add Succ as a successor of this MachineBasicBlock.

void copySuccessor(const MachineBasicBlock *Orig, succ_iterator I)

Copy a successor (and any probability info) from original block to this block's.

SmallVectorImpl< MachineBasicBlock * >::iterator succ_iterator

BasicBlock * getAddressTakenIRBlock() const

Retrieves the BasicBlock which corresponds to this MachineBasicBlock.

void sortUniqueLiveIns()

Sorts and uniques the LiveIns vector.

const MachineBasicBlock * getSingleSuccessor() const

Return the successor of this block if it has a single successor.

liveout_iterator liveout_begin() const

Iterator scanning successor basic blocks' liveins to determine the registers potentially live at the ...

void removeSuccessor(MachineBasicBlock *Succ, bool NormalizeSuccProbs=false)

Remove successor from the successors list of this MachineBasicBlock.

iterator getFirstNonPHI()

Returns a pointer to the first instruction in this block that is not a PHINode instruction.

bool isPredecessor(const MachineBasicBlock *MBB) const

Return true if the specified MBB is a predecessor of this block.

DebugLoc rfindDebugLoc(reverse_instr_iterator MBBI)

Has exact same behavior as findDebugLoc (it also searches towards the end of this MBB) except that th...

void print(raw_ostream &OS, const SlotIndexes *=nullptr, bool IsStandalone=true) const

reverse_instr_iterator instr_rend()

DebugLoc findDebugLoc(instr_iterator MBBI)

Find the next valid DebugLoc starting at MBBI, skipping any debug instructions.

Instructions::iterator instr_iterator

iterator getLastNonDebugInstr(bool SkipPseudoOp=true)

Returns an iterator to the last non-debug instruction in the basic block, or end().

void ReplaceUsesOfBlockWith(MachineBasicBlock *Old, MachineBasicBlock *New)

Given a machine basic block that branched to 'Old', change the code and CFG so that it branches to 'N...

bool isLayoutSuccessor(const MachineBasicBlock *MBB) const

Return true if the specified MBB will be emitted immediately after this block, such that if this bloc...

DebugLoc findPrevDebugLoc(instr_iterator MBBI)

Find the previous valid DebugLoc preceding MBBI, skipping any debug instructions.

MachineBasicBlock * splitAt(MachineInstr &SplitInst, bool UpdateLiveIns=true, LiveIntervals *LIS=nullptr)

Split a basic block into 2 pieces at SplitPoint.

void eraseFromParent()

This method unlinks 'this' from the containing function and deletes it.

instr_iterator instr_end()

void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())

Adds the specified register as a live in.

const MachineFunction * getParent() const

Return the MachineFunction containing this basic block.

instr_iterator erase(instr_iterator I)

Remove an instruction from the instruction list and delete it.

std::string getFullName() const

Return a formatted string to identify this block and its parent function.

bool isBeginSection() const

Returns true if this block begins any section.

unsigned getCallFrameSize() const

Return the call frame size on entry to this basic block.

DebugLoc findBranchDebugLoc()

Find and return the merged DebugLoc of the branch instructions of the block.

iterator_range< succ_iterator > successors()

instr_iterator getFirstInstrTerminator()

Same getFirstTerminator but it ignores bundles and return an instr_iterator instead.

reverse_iterator rbegin()

bool isMachineBlockAddressTaken() const

Test whether this block is used as something other than the target of a terminator,...

void printName(raw_ostream &os, unsigned printNameFlags=PrintNameIr, ModuleSlotTracker *moduleSlotTracker=nullptr) const

Print the basic block's name as:

bool isSuccessor(const MachineBasicBlock *MBB) const

Return true if the specified MBB is a successor of this block.

iterator_range< pred_iterator > predecessors()

void splice(iterator Where, MachineBasicBlock *Other, iterator From)

Take an instruction from MBB 'Other' at the position From, and insert it into this MBB right before '...

Align getAlignment() const

Return alignment of the basic block.

bool canSplitCriticalEdge(const MachineBasicBlock *Succ) const

Check if the edge between this block and the given successor Succ, can be split.

bool isLegalToHoistInto() const

Returns true if it is legal to hoist instructions into this block.

StringRef getName() const

Return the name of the corresponding LLVM basic block, or an empty string.

bool mayHaveInlineAsmBr() const

Returns true if this block may have an INLINEASM_BR (overestimate, by checking if any of the successo...

LivenessQueryResult

Possible outcome of a register liveness query to computeRegisterLiveness()

@ LQR_Dead

@ LQR_Live

@ LQR_Unknown

void moveAfter(MachineBasicBlock *NewBefore)

const uint32_t * getEndClobberMask(const TargetRegisterInfo *TRI) const

Get the clobber mask for the end of the basic block.

bool sizeWithoutDebugLargerThan(unsigned Limit) const

bool isLiveIn(MCRegister Reg, LaneBitmask LaneMask=LaneBitmask::getAll()) const

Return true if the specified register is in the live in set.

MachineBasicBlock * removeFromParent()

This method unlinks 'this' from the containing function, and returns it, but does not delete it.

Instructions::reverse_iterator reverse_instr_iterator

bool hasProperty(Property P) const

unsigned addToMBBNumbering(MachineBasicBlock *MBB)

Adds the MBB to the internal numbering.

unsigned getFunctionNumber() const

getFunctionNumber - Return a unique ID for the current function.

const TargetSubtargetInfo & getSubtarget() const

getSubtarget - Return the subtarget for which this machine code is being compiled.

StringRef getName() const

getName - Return the name of the corresponding LLVM function.

bool hasBBSections() const

Returns true if this function has basic block sections enabled.

MCContext & getContext() const

MachineRegisterInfo & getRegInfo()

getRegInfo - Return information about the registers currently in use.

void resetDelegate(Delegate *delegate)

Reset the currently registered delegate - otherwise assert.

Function & getFunction()

Return the LLVM function that this machine code represents.

void remove(iterator MBBI)

const MachineFunctionProperties & getProperties() const

Get the function properties.

void setDelegate(Delegate *delegate)

Set the delegate.

const MachineJumpTableInfo * getJumpTableInfo() const

getJumpTableInfo - Return the jump table info object for the current function.

void splice(iterator InsertPt, iterator MBBI)

MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *BB=nullptr, std::optional< UniqueBBID > BBID=std::nullopt)

CreateMachineBasicBlock - Allocate a new MachineBasicBlock.

void erase(iterator MBBI)

void insert(iterator MBBI, MachineBasicBlock *MBB)

const TargetMachine & getTarget() const

getTarget - Return the target machine this machine code is compiled with

BasicBlockListType::const_iterator const_iterator

const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const

Add a new virtual register operand.

reverse_iterator getReverse() const

Get a reverse iterator to the same node.

Representation of each machine instruction.

bool ReplaceMBBInJumpTable(unsigned Idx, MachineBasicBlock *Old, MachineBasicBlock *New)

ReplaceMBBInJumpTable - If Old is a target of the jump tables, update the jump table to branch to New...

const std::vector< MachineJumpTableEntry > & getJumpTables() const

MachineOperand class - Representation of each machine instruction operand.

MachineBasicBlock * getMBB() const

void setMBB(MachineBasicBlock *MBB)

getReg - Returns the register number.

MachineRegisterInfo - Keep track of information for virtual and physical registers,...

Manage lifetime of a slot tracker for printing IR.

int getLocalSlot(const Value *V)

Return the slot number of the specified local value.

void incorporateFunction(const Function &F)

Incorporate the given function.

A Module instance is used to store all the information related to an LLVM module.

Pass interface - Implemented by all 'passes'.

virtual void print(raw_ostream &OS, const Module *M) const

print - Print out the internal state of the pass.

Simple wrapper around std::function<void(raw_ostream&)>.

Wrapper class representing virtual and physical registers.

static Register index2VirtReg(unsigned Index)

Convert a 0-based index to a virtual register number.

bool remove(const value_type &X)

Remove an item from the set vector.

bool insert(const value_type &X)

Insert a new element into the SetVector.

SlotIndex - An opaque wrapper around machine indexes.

SlotIndex getPrevSlot() const

Returns the previous slot in the index list.

SlotIndex insertMachineInstrInMaps(MachineInstr &MI, bool Late=false)

Insert the given machine instruction into the mapping.

void removeMachineInstrFromMaps(MachineInstr &MI, bool AllowBundled=false)

Removes machine instruction (bundle) MI from the mapping.

void insertMBBInMaps(MachineBasicBlock *mbb)

Add the given MachineBasicBlock into the maps.

SlotIndex getMBBEndIdx(unsigned Num) const

Returns the last index in the given basic block number.

SlotIndex getInstructionIndex(const MachineInstr &MI, bool IgnoreBundle=false) const

Returns the base index for the given instruction.

SlotIndex getMBBStartIdx(unsigned Num) const

Returns the first index in the given basic block number.

bool hasIndex(const MachineInstr &instr) const

Returns true if the given machine instr is mapped to an index, otherwise returns false.

A SetVector that performs no allocations if smaller than a certain size.

SmallSet - This maintains a set of unique values, optimizing for the case when the set is small (less...

size_type count(const T &V) const

count - Return 1 if the element is in the set, 0 otherwise.

std::pair< const_iterator, bool > insert(const T &V)

insert - Insert an element into the set if it isn't already there.

SmallString - A SmallString is just a SmallVector with methods and accessors that make it work better...

void push_back(const T &Elt)

This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.

StringRef - Represent a constant reference to a string, i.e.

TargetInstrInfo - Interface to description of machine instruction set.

virtual Register getExceptionPointerRegister(const Constant *PersonalityFn) const

If a physical register, this returns the register that receives the exception address on entry to an ...

virtual Register getExceptionSelectorRegister(const Constant *PersonalityFn) const

If a physical register, this returns the register that receives the exception typeid on entry to a la...

This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...

bool requiresStructuredCFG() const

TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...

virtual const TargetRegisterInfo * getRegisterInfo() const

getRegisterInfo - If register information is available, return it.

virtual const TargetInstrInfo * getInstrInfo() const

virtual const TargetLowering * getTargetLowering() const

Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...

VNInfo - Value Number Information.

StringRef getName() const

Return a constant reference to the value's name.

self_iterator getIterator()

MachineBasicBlock * getNextNode()

Get the next node, or nullptr for the list tail.

iterator erase(iterator where)

pointer remove(iterator &IT)

iterator insert(iterator where, pointer New)

This class implements an extremely fast bulk output stream that can only output to a stream.

raw_ostream & indent(unsigned NumSpaces)

indent - Insert 'NumSpaces' spaces.

A raw_ostream that writes to an SmallVector or SmallString.

#define llvm_unreachable(msg)

Marks that the current location is not supposed to be reachable.

@ Kill

The last use of a register.

initializer< Ty > init(const Ty &Val)

This is an optimization pass for GlobalISel generic memory operations.

IterT next_nodbg(IterT It, IterT End, bool SkipPseudoOp=true)

Increment It, then continue incrementing it while it points to a debug instruction.

auto find(R &&Range, const T &Val)

Provide wrappers to std::find which take ranges instead of having to pass begin/end explicitly.

MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)

Builder interface. Specify how to create the initial instruction itself.

iterator_range< T > make_range(T x, T y)

Convenience function for iterating over sub-ranges.

PhysRegInfo AnalyzePhysRegInBundle(const MachineInstr &MI, Register Reg, const TargetRegisterInfo *TRI)

AnalyzePhysRegInBundle - Analyze how the current instruction or bundle uses a physical register.

Printable PrintLaneMask(LaneBitmask LaneMask)

Create Printable object to print LaneBitmasks on a raw_ostream.

IterT skipDebugInstructionsForward(IterT It, IterT End, bool SkipPseudoOp=true)

Increment It until it points to a non-debug instruction or to End and return the resulting iterator.

void sort(IteratorTy Start, IteratorTy End)

raw_ostream & dbgs()

dbgs() - This returns a reference to a raw_ostream for debugging messages.

auto instructionsWithoutDebug(IterT It, IterT End, bool SkipPseudoOp=true)

Construct a range iterator which begins at It and moves forwards until End is reached,...

IterT skipDebugInstructionsBackward(IterT It, IterT Begin, bool SkipPseudoOp=true)

Decrement It until it points to a non-debug instruction or to Begin and return the resulting iterator...

format_object< Ts... > format(const char *Fmt, const Ts &... Vals)

These are helper functions used to produce formatted output.

@ First

Helpers to iterate all locations in the MemoryEffectsBase class.

raw_ostream & operator<<(raw_ostream &OS, const APFixedPoint &FX)

auto find_if(R &&Range, UnaryPredicate P)

Provide wrappers to std::find_if which take ranges instead of having to pass begin/end explicitly.

bool is_contained(R &&Range, const E &Element)

Returns true if Element is found in Range.

IterT prev_nodbg(IterT It, IterT Begin, bool SkipPseudoOp=true)

Decrement It, then continue decrementing it while it points to a debug instruction.

Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)

Prints virtual and physical registers with or without a TRI instance.

Printable printMBBReference(const MachineBasicBlock &MBB)

Prints a machine basic block reference.

void addLiveIns(MachineBasicBlock &MBB, const LivePhysRegs &LiveRegs)

Adds registers contained in LiveRegs to the block live-in list of MBB.

void swap(llvm::BitVector &LHS, llvm::BitVector &RHS)

Implement std::swap in terms of BitVector swap.

This struct is a compact representation of a valid (non-zero power of two) alignment.

uint64_t value() const

This is a hole in the type system and should not be abused.

This represents a simple continuous liveness interval for a value.

bool removeKill(MachineInstr &MI)

removeKill - Delete a kill corresponding to the specified machine instruction.

std::vector< MachineInstr * > Kills

Kills - List of MachineInstruction's which are the last use of this virtual register (kill it) in the...

static const MBBSectionID ExceptionSectionID

static const MBBSectionID ColdSectionID

enum llvm::MBBSectionID::SectionType Type

Pair of physical register and lane mask.

MachineJumpTableEntry - One jump table in the jump table info.

std::vector< MachineBasicBlock * > MBBs

MBBs - The vector of basic blocks from which to create the jump table.

Information about how a physical register Reg is used by a set of operands.

static void deleteNode(NodeTy *V)

void removeNodeFromList(NodeTy *)

void addNodeToList(NodeTy *)

void transferNodesFromList(ilist_callback_traits &OldList, Iterator, Iterator)

Callback before transferring nodes to this list.

Template traits for intrusive list.