LLVM: lib/CodeGen/MachineCycleAnalysis.cpp Source File (original) (raw)

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17using namespace llvm;

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30 "Machine Cycle Info Analysis", true, true)

32 "Machine Cycle Info Analysis", true, true)

33

35 AU.setPreservesAll();

37}

38

40 CI.clear();

41

42 F = &Func;

43 CI.compute(Func);

44 return false;

45}

46

48 OS << "MachineCycleInfo for function: " << F->getName() << "\n";

49 CI.print(OS);

50}

51

53 CI.clear();

54 F = nullptr;

55}

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58

66

67namespace {

69public:

70 static char ID;

71

72 MachineCycleInfoPrinterLegacy();

73

75 void getAnalysisUsage(AnalysisUsage &AU) const override;

76};

77}

78

79char MachineCycleInfoPrinterLegacy::ID = 0;

80

81MachineCycleInfoPrinterLegacy::MachineCycleInfoPrinterLegacy()

84}

85

87 "Print Machine Cycle Info Analysis", true, true)

90 "Print Machine Cycle Info Analysis", true, true)

91

92void MachineCycleInfoPrinterLegacy::getAnalysisUsage(AnalysisUsage &AU) const {

93 AU.setPreservesAll();

96}

97

98bool MachineCycleInfoPrinterLegacy::runOnMachineFunction(MachineFunction &F) {

99 auto &CI = getAnalysis();

100 CI.print(errs());

101 return false;

102}

103

111

118

119

121 if (!MO.isReg())

122 continue;

123

125 if (Reg == 0)

126 continue;

127

128

129

130 if (Reg.isPhysical()) {

131 if (MO.isUse()) {

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135

136

137 if (MRI->isConstantPhysReg(Reg) &&

138 !(TRI->isCallerPreservedPhysReg(Reg.asMCReg(), *I.getMF())) &&

139 TII->isIgnorableUse(MO))

140 return false;

141

142 continue;

143 } else if (!MO.isDead()) {

144

145 return false;

148 return Block->isLiveIn(Reg);

149 })) {

150

151

152 return false;

153 }

154 }

155

156 if (!MO.isUse())

157 continue;

158

159 assert(MRI->getVRegDef(Reg) && "Machine instr not mapped for this vreg?!");

160

161

162

163 if (Cycle->contains(MRI->getVRegDef(Reg)->getParent()))

164 return false;

165 }

166

167

168 return true;

169}

unsigned const MachineRegisterInfo * MRI

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

const TargetInstrInfo & TII

This template implementation resides in a separate file so that it does not get injected into every ....

This file declares a specialization of the GenericSSAContext template class for Machine IR.

Register const TargetRegisterInfo * TRI

#define INITIALIZE_PASS_DEPENDENCY(depName)

#define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis)

#define INITIALIZE_PASS_BEGIN(passName, arg, name, cfg, analysis)

PassT::Result & getResult(IRUnitT &IR, ExtraArgTs... ExtraArgs)

Get the result of an analysis pass for a given IR unit.

Represent the analysis usage information of a pass.

Cycle information for a function.

void compute(FunctionT &F)

Compute the cycle info for a function.

A possibly irreducible generalization of a Loop.

LLVM_ABI Result run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM)

Definition MachineCycleAnalysis.cpp:60

LLVM_ABI PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM)

Definition MachineCycleAnalysis.cpp:105

Legacy analysis pass which computes a MachineCycleInfo.

void releaseMemory() override

releaseMemory() - This member can be implemented by a pass if it wants to be able to release its memo...

Definition MachineCycleAnalysis.cpp:52

MachineCycleInfoWrapperPass()

Definition MachineCycleAnalysis.cpp:24

void print(raw_ostream &OS, const Module *M=nullptr) const override

print - Print out the internal state of the pass.

Definition MachineCycleAnalysis.cpp:47

bool runOnMachineFunction(MachineFunction &F) override

runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...

Definition MachineCycleAnalysis.cpp:39

void getAnalysisUsage(AnalysisUsage &AU) const override

getAnalysisUsage - This function should be overriden by passes that need analysis information to do t...

Definition MachineCycleAnalysis.cpp:34

MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...

MachineFunctionPass(char &ID)

void getAnalysisUsage(AnalysisUsage &AU) const override

getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.

const TargetSubtargetInfo & getSubtarget() const

getSubtarget - Return the subtarget for which this machine code is being compiled.

MachineRegisterInfo & getRegInfo()

getRegInfo - Return information about the registers currently in use.

Representation of each machine instruction.

MachineOperand class - Representation of each machine instruction operand.

MachineRegisterInfo - Keep track of information for virtual and physical registers,...

A Module instance is used to store all the information related to an LLVM module.

static LLVM_ABI PassRegistry * getPassRegistry()

getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...

A set of analyses that are preserved following a run of a transformation pass.

static PreservedAnalyses all()

Construct a special preserved set that preserves all passes.

Wrapper class representing virtual and physical registers.

TargetInstrInfo - Interface to description of machine instruction set.

TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...

TargetSubtargetInfo - Generic base class for all target subtargets.

This class implements an extremely fast bulk output stream that can only output to a stream.

unsigned ID

LLVM IR allows to use arbitrary numbers as calling convention identifiers.

This is an optimization pass for GlobalISel generic memory operations.

LLVM_ABI bool isCycleInvariant(const MachineCycle *Cycle, MachineInstr &I)

Definition MachineCycleAnalysis.cpp:112

AnalysisManager< MachineFunction > MachineFunctionAnalysisManager

LLVM_ABI void initializeMachineCycleInfoWrapperPassPass(PassRegistry &)

bool any_of(R &&range, UnaryPredicate P)

Provide wrappers to std::any_of which take ranges instead of having to pass begin/end explicitly.

LLVM_ABI raw_fd_ostream & errs()

This returns a reference to a raw_ostream for standard error.

LLVM_ABI void initializeMachineCycleInfoPrinterLegacyPass(PassRegistry &)

GenericCycleInfo< MachineSSAContext > MachineCycleInfo

MachineCycleInfo::CycleT MachineCycle

A special type used by analysis passes to provide an address that identifies that particular analysis...