LLVM: include/llvm/CodeGen/MachineInstrBuilder.h Source File (original) (raw)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19#ifndef LLVM_CODEGEN_MACHINEINSTRBUILDER_H
20#define LLVM_CODEGEN_MACHINEINSTRBUILDER_H
21
33#include
34#include
35
36namespace llvm {
37
38class MCInstrDesc;
39class MDNode;
40
41namespace RegState {
42
43
44enum {
45
47
49
51
53
55
57
59
60
62
68
69}
70
74
75public:
77
78
79
83
84
88
89
90
92
93
94
95
97
98
100 unsigned SubReg = 0) const {
101 assert((flags & 0x1) == 0 &&
102 "Passing in 'true' to addReg is forbidden! Use enums instead.");
114 return *this;
115 }
116
117
119 unsigned SubReg = 0) const {
121 }
122
123
124
126 unsigned SubReg = 0) const {
128 "Misleading addUse defines register, use addReg instead.");
130 }
131
132
135 return *this;
136 }
137
140 return *this;
141 }
142
145 return *this;
146 }
147
149 unsigned TargetFlags = 0) const {
151 return *this;
152 }
153
156 return *this;
157 }
158
161 unsigned TargetFlags = 0) const {
163 return *this;
164 }
165
167 unsigned TargetFlags = 0) const {
169 TargetFlags));
170 return *this;
171 }
172
174 unsigned TargetFlags = 0) const {
176 return *this;
177 }
178
181 unsigned TargetFlags = 0) const {
183 return *this;
184 }
185
187 unsigned TargetFlags = 0) const {
189 return *this;
190 }
191
194 unsigned TargetFlags = 0) const {
196 return *this;
197 }
198
201 return *this;
202 }
203
205 MI->addMemOperand(*MF, MMO);
206 return *this;
207 }
208
211 MI->setMemRefs(*MF, MMOs);
212 return *this;
213 }
214
216 MI->cloneMemRefs(*MF, OtherMI);
217 return *this;
218 }
219
222 MI->cloneMergedMemRefs(*MF, OtherMIs);
223 return *this;
224 }
225
227 MI->addOperand(*MF, MO);
228 return *this;
229 }
230
233 MI->addOperand(*MF, MO);
234 }
235 return *this;
236 }
237
240 assert((MI->isDebugValueLike() ? static_cast<bool>(MI->getDebugVariable())
241 : true) &&
242 "first MDNode argument of a DBG_VALUE not a variable");
243 assert((MI->isDebugLabel() ? static_cast<bool>(MI->getDebugLabel())
244 : true) &&
245 "first MDNode argument of a DBG_LABEL not a label");
246 return *this;
247 }
248
251 return *this;
252 }
253
256 return *this;
257 }
258
261 return *this;
262 }
263
266 return *this;
267 }
268
270 unsigned char TargetFlags = 0) const {
272 return *this;
273 }
274
276 MI->setFlags(Flags);
277 return *this;
278 }
279
281 MI->setFlag(Flag);
282 return *this;
283 }
284
286 MI->getOperand(OpIdx).setIsDead();
287 return *this;
288 }
289
290
292 unsigned char TargetFlags = 0) const {
293
294
295
296
297 if (0 == TargetFlags)
299
300 switch (Disp.getType()) {
301 default:
307 TargetFlags);
310 TargetFlags);
313 TargetFlags);
315 assert(off == 0 && "cannot create offset into jump tables");
317 }
318 }
319
321 if (MD)
322 MI->setPCSections(*MF, MD);
323 return *this;
324 }
325
327 if (MMRA)
328 MI->setMMRAMetadata(*MF, MMRA);
329 return *this;
330 }
331
332
335 MI->copyImplicitOps(*MF, OtherMI);
336 return *this;
337 }
338
343 }
344};
345
346
347
349public:
352 : DL(std::move(DL)), PCSections(PCSections), MMRA(MMRA) {}
354 MDNode *MMRA = nullptr)
355 : DL(DI), PCSections(PCSections), MMRA(MMRA) {}
358 PCSections(From.getMetadata(LLVMContext::MD_pcsections)) {}
361
365
366private:
368 MDNode *PCSections = nullptr;
369 MDNode *MMRA = nullptr;
370};
371
372
378}
379
380
381
388}
389
390
391
392
404}
405
406
407
408
409
410
411
423}
424
428
429
430 if (I.isInsideBundle())
432 DestReg);
434}
435
439 return BuildMI(BB, *I, MIMD, MCID, DestReg);
440}
441
442
443
444
455}
456
467}
468
472
473
474 if (I.isInsideBundle())
477}
478
482 return BuildMI(BB, *I, MIMD, MCID);
483}
484
485
486
490 return BuildMI(*BB, BB->end(), MIMD, MCID);
491}
492
493
494
495
499 return BuildMI(*BB, BB->end(), MIMD, MCID, DestReg);
500}
501
502
503
504
505
506MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL,
507 const MCInstrDesc &MCID, bool IsIndirect,
508 Register Reg, const MDNode *Variable,
509 const MDNode *Expr);
510
511
512
513MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL,
514 const MCInstrDesc &MCID, bool IsIndirect,
515 ArrayRef MOs,
516 const MDNode *Variable, const MDNode *Expr);
517
518
519
520
521MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
523 const MCInstrDesc &MCID, bool IsIndirect,
524 Register Reg, const MDNode *Variable,
525 const MDNode *Expr);
526
527
528
529MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
531 const MCInstrDesc &MCID, bool IsIndirect,
532 ArrayRef MOs,
533 const MDNode *Variable, const MDNode *Expr);
534
535
538 const MachineInstr &Orig, int FrameIndex,
539 Register SpillReg);
542 const MachineInstr &Orig, int FrameIndex,
543 const SmallVectorImpl<const MachineOperand *> &SpilledOperands);
544
545
546
548
551}
554}
557}
560}
563}
566}
569}
572}
573
574
576 assert(RegOp.isReg() && "Not a register operand");
584}
585
586
587
588
589
590
595
596public:
597
598
600 : MBB(BB), Begin(Pos.getInstrIterator()), End(Begin) {}
601
602
605 : MBB(BB), Begin(B.getInstrIterator()), End(E.getInstrIterator()) {
606 assert(B != E && "No instructions to bundle");
607 ++B;
610 ++B;
611 MI.bundleWithPred();
612 }
613 }
614
615
616
620
621
623
624
625
626 bool empty() const { return Begin == End; }
627
628
630
631
633
634
635
639 if (I == Begin) {
641 MI->bundleWithSucc();
642 Begin = MI->getIterator();
643 return *this;
644 }
646 MI->bundleWithPred();
647 return *this;
648 }
649
650
653 return *this;
654 }
655
656
657
660 }
661
662
663
666 }
667};
668
669}
670
671#endif
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
static const Function * getParent(const Value *V)
BlockVerifier::State From
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
const HexagonInstrInfo * TII
static DebugLoc getDebugLoc(MachineBasicBlock::instr_iterator FirstMI, MachineBasicBlock::instr_iterator LastMI)
Return the first found DebugLoc that has a DILocation, given a range of instructions.
unsigned const TargetRegisterInfo * TRI
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
The address of a basic block.
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
ConstantFP - Floating Point Values [float, double].
This is the shared class of boolean and integer constants.
This is an important class for using LLVM in a threaded context.
Describe properties that are true of each instruction in the target description file.
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Helper class for constructing bundles of MachineInstrs.
MachineBasicBlock::instr_iterator end() const
Return an iterator beyond the last bundled instruction.
MachineBasicBlock::instr_iterator begin() const
Return an iterator to the first bundled instruction.
MIBundleBuilder & append(MachineInstr *MI)
Insert MI into MBB by appending it to the instructions in the bundle.
MIBundleBuilder(MachineBasicBlock &BB, MachineBasicBlock::iterator B, MachineBasicBlock::iterator E)
Create a bundle from the sequence of instructions between B and E.
MIBundleBuilder(MachineBasicBlock &BB, MachineBasicBlock::iterator Pos)
Create an MIBundleBuilder that inserts instructions into a new bundle in BB above the bundle or instr...
MIBundleBuilder & insert(MachineBasicBlock::instr_iterator I, MachineInstr *MI)
Insert MI into this bundle before I which must point to an instruction in the bundle,...
MachineBasicBlock & getMBB() const
Return a reference to the basic block containing this bundle.
MIBundleBuilder & prepend(MachineInstr *MI)
Insert MI into MBB by prepending it to the instructions in the bundle.
bool empty() const
Return true if no instructions have been inserted in this bundle yet.
MIBundleBuilder(MachineInstr *MI)
Create an MIBundleBuilder representing an existing instruction or bundle that has MI as its head.
instr_iterator insert(instr_iterator I, MachineInstr *M)
Insert MI into the instruction list before I, possibly inside a bundle.
Instructions::iterator instr_iterator
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
MachineInstrBundleIterator< MachineInstr > iterator
MachineInstr * CreateMachineInstr(const MCInstrDesc &MCID, DebugLoc DL, bool NoImplicit=false)
CreateMachineInstr - Allocate a new MachineInstr.
const MachineInstrBuilder & cloneMergedMemRefs(ArrayRef< const MachineInstr * > OtherMIs) const
const MachineInstrBuilder & addTargetIndex(unsigned Idx, int64_t Offset=0, unsigned TargetFlags=0) const
Register getReg(unsigned Idx) const
Get the register for the operand index.
const MachineInstrBuilder & setMemRefs(ArrayRef< MachineMemOperand * > MMOs) const
const MachineInstrBuilder & addExternalSymbol(const char *FnName, unsigned TargetFlags=0) const
const MachineInstrBuilder & addCImm(const ConstantInt *Val) const
const MachineInstrBuilder & addCFIIndex(unsigned CFIIndex) const
const MachineInstrBuilder & setOperandDead(unsigned OpIdx) const
MachineInstrBuilder()=default
MachineInstrBuilder(MachineFunction &F, MachineInstr *I)
Create a MachineInstrBuilder for manipulating an existing instruction.
const MachineInstrBuilder & setMIFlag(MachineInstr::MIFlag Flag) const
MachineInstr * operator->() const
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
const MachineInstrBuilder & addPredicate(CmpInst::Predicate Pred) const
const MachineInstrBuilder & addBlockAddress(const BlockAddress *BA, int64_t Offset=0, unsigned TargetFlags=0) const
const MachineInstrBuilder & add(const MachineOperand &MO) const
const MachineInstrBuilder & setMMRAMetadata(MDNode *MMRA) const
const MachineInstrBuilder & addIntrinsicID(Intrinsic::ID ID) const
const MachineInstrBuilder & addMetadata(const MDNode *MD) const
const MachineInstrBuilder & addSym(MCSymbol *Sym, unsigned char TargetFlags=0) const
const MachineInstrBuilder & addShuffleMask(ArrayRef< int > Val) const
MachineInstrBuilder(MachineFunction &F, MachineBasicBlock::iterator I)
const MachineInstrBuilder & addFrameIndex(int Idx) const
const MachineInstrBuilder & addConstantPoolIndex(unsigned Idx, int Offset=0, unsigned TargetFlags=0) const
const MachineInstrBuilder & addRegMask(const uint32_t *Mask) const
const MachineInstrBuilder & add(ArrayRef< MachineOperand > MOs) const
const MachineInstrBuilder & addGlobalAddress(const GlobalValue *GV, int64_t Offset=0, unsigned TargetFlags=0) const
const MachineInstrBuilder & addDisp(const MachineOperand &Disp, int64_t off, unsigned char TargetFlags=0) const
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
const MachineInstrBuilder & addFPImm(const ConstantFP *Val) const
bool constrainAllUses(const TargetInstrInfo &TII, const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI) const
const MachineInstrBuilder & addJumpTableIndex(unsigned Idx, unsigned TargetFlags=0) const
const MachineInstrBuilder & setPCSections(MDNode *MD) const
const MachineInstrBuilder & addMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0) const
const MachineInstrBuilder & cloneMemRefs(const MachineInstr &OtherMI) const
const MachineInstrBuilder & addUse(Register RegNo, unsigned Flags=0, unsigned SubReg=0) const
Add a virtual register use operand.
const MachineInstrBuilder & setMIFlags(unsigned Flags) const
const MachineInstrBuilder & copyImplicitOps(const MachineInstr &OtherMI) const
Copy all the implicit operands from OtherMI onto this one.
const MachineInstrBuilder & addMemOperand(MachineMemOperand *MMO) const
MachineInstr * getInstr() const
If conversion operators fail, use this method to get the MachineInstr explicitly.
const MachineInstrBuilder & addDef(Register RegNo, unsigned Flags=0, unsigned SubReg=0) const
Add a virtual register definition operand.
Representation of each machine instruction.
A description of a memory reference used in the backend.
MachineOperand class - Representation of each machine instruction operand.
static MachineOperand CreateMCSymbol(MCSymbol *Sym, unsigned TargetFlags=0)
const GlobalValue * getGlobal() const
static MachineOperand CreateES(const char *SymName, unsigned TargetFlags=0)
static MachineOperand CreateFPImm(const ConstantFP *CFP)
static MachineOperand CreateCFIIndex(unsigned CFIIndex)
static MachineOperand CreateRegMask(const uint32_t *Mask)
CreateRegMask - Creates a register mask operand referencing Mask.
bool isReg() const
isReg - Tests if this is a MO_Register operand.
static MachineOperand CreateCImm(const ConstantInt *CI)
bool isRenamable() const
isRenamable - Returns true if this register may be renamed, i.e.
static MachineOperand CreateMetadata(const MDNode *Meta)
const BlockAddress * getBlockAddress() const
static MachineOperand CreatePredicate(unsigned Pred)
unsigned getTargetFlags() const
static MachineOperand CreateImm(int64_t Val)
static MachineOperand CreateShuffleMask(ArrayRef< int > Mask)
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
static MachineOperand CreateJTI(unsigned Idx, unsigned TargetFlags=0)
Register getReg() const
getReg - Returns the register number.
static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset, unsigned TargetFlags=0)
bool isInternalRead() const
static MachineOperand CreateBA(const BlockAddress *BA, int64_t Offset, unsigned TargetFlags=0)
static MachineOperand CreateCPI(unsigned Idx, int Offset, unsigned TargetFlags=0)
@ MO_Immediate
Immediate operand.
@ MO_ConstantPoolIndex
Address of indexed Constant in Constant Pool.
@ MO_GlobalAddress
Address of a global value.
@ MO_BlockAddress
Address of a basic block.
@ MO_JumpTableIndex
Address of indexed Jump Table for switch.
static MachineOperand CreateReg(Register Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false, bool isRenamable=false)
static MachineOperand CreateTargetIndex(unsigned Idx, int64_t Offset, unsigned TargetFlags=0)
static MachineOperand CreateMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0)
int64_t getOffset() const
Return the offset from the symbol in this operand.
static MachineOperand CreateIntrinsicID(Intrinsic::ID ID)
static MachineOperand CreateFI(int Idx)
Holds all the information related to register banks.
Wrapper class representing virtual and physical registers.
constexpr bool isPhysical() const
Return true if the specified register number is in the physical register namespace.
TargetInstrInfo - Interface to description of machine instruction set.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ Implicit
Not emitted register (e.g. carry, or temporary result).
@ Debug
Register 'use' is for debugging purpose.
@ Renamable
Register that may be renamed.
@ Define
Register definition.
@ InternalRead
Register reads a value that is defined inside the same instruction or bundle.
@ Kill
The last use of a register.
@ Undef
Value of the register doesn't matter.
@ EarlyClobber
Register definition happens before uses.
This is an optimization pass for GlobalISel generic memory operations.
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
void updateDbgValueForSpill(MachineInstr &Orig, int FrameIndex, Register Reg)
Update a DBG_VALUE whose value has been spilled to FrameIndex.
bool constrainSelectedInstRegOperands(MachineInstr &I, const TargetInstrInfo &TII, const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI)
Mutate the newly-selected instruction I to constrain its (possibly generic) virtual register operands...
unsigned getDeadRegState(bool B)
unsigned getImplRegState(bool B)
MachineBasicBlock::instr_iterator getBundleEnd(MachineBasicBlock::instr_iterator I)
Returns an iterator pointing beyond the bundle containing I.
unsigned getInternalReadRegState(bool B)
unsigned getDebugRegState(bool B)
unsigned getUndefRegState(bool B)
unsigned getRegState(const MachineOperand &RegOp)
Get all register state flags from machine operand RegOp.
unsigned getDefRegState(bool B)
unsigned getKillRegState(bool B)
unsigned getRenamableRegState(bool B)
OutputIt move(R &&Range, OutputIt Out)
Provide wrappers to std::move which take ranges instead of having to pass begin/end explicitly.
MachineInstr * buildDbgValueForSpill(MachineBasicBlock &BB, MachineBasicBlock::iterator I, const MachineInstr &Orig, int FrameIndex, Register SpillReg)
Clone a DBG_VALUE whose value has been spilled to FrameIndex.
Implement std::hash so that hash_code can be used in STL containers.