MachineOperand.cpp Source File (original) (raw)

24#include "llvm/Config/llvm-config.h"

31#include

33using namespace llvm;

37 cl::desc("Number of registers to limit to when "

38 "printing regmask operands in IR dumps. "

39 "unlimited = -1"),

46 return MF;

47 return nullptr;

48}

56 assert(getParent() && "Operand does not belong to any instruction!");

58}

62 return;

65 IsRenamable = false;

72 MRI.removeRegOperandFromUseList(this);

73 SmallContents.RegNo = Reg.id();

74 MRI.addRegOperandToUseList(this);

75 return;

76 }

79 SmallContents.RegNo = Reg.id();

80}

84 assert(Reg.isVirtual());

86 SubIdx = TRI.composeSubRegIndices(SubIdx, getSubReg());

88 if (SubIdx)

90}

93 assert(Reg.isPhysical());

101 }

103}

104

105

107 assert(isReg() && "Wrong MachineOperand accessor");

108 assert((!Val || isDebug ()) && "Marking a debug operation as def");

109 if (IsDef == Val)

110 return;

111 assert(!IsDeadOrKill && "Changing def/use with dead/kill set not supported");

112

115 MRI.removeRegOperandFromUseList(this);

116 IsDef = Val;

117 MRI.addRegOperandToUseList(this);

118 return;

119 }

120 IsDef = Val;

121}

122

124 assert(isReg() && "Wrong MachineOperand accessor");

126 "isRenamable should only be checked on physical registers");

127 if (!IsRenamable)

128 return false;

129

131 if ()

132 return true;

133

136

137 assert(isUse() && "Reg is not def or use");

139}

140

142 assert(isReg() && "Wrong MachineOperand accessor");

144 "setIsRenamable should only be called on physical registers");

145 IsRenamable = Val;

146}

147

148

149

150void MachineOperand::removeRegFromUses() {

151 if ( isReg () || !isOnRegUseList())

152 return;

153

155 MF->getRegInfo().removeRegOperandFromUseList(this);

156}

157

158

159

160

162 assert(( isReg () || isTied ()) && "Cannot change a tied operand into an imm");

163

164 removeRegFromUses();

165

167 Contents.ImmVal = ImmVal;

169}

170

172 unsigned TargetFlags) {

173 assert(( isReg () || isTied ()) && "Cannot change a tied operand into an imm");

174

175 removeRegFromUses();

176

178 Contents.CFP = FPImm;

180}

181

183 unsigned TargetFlags) {

185 "Cannot change a tied operand into an external symbol");

186

187 removeRegFromUses();

188

190 Contents.OffsetedInfo.Val.SymbolName = SymName;

191 setOffset(0);

193}

194

196 unsigned TargetFlags) {

198 "Cannot change a tied operand into a global address");

199

200 removeRegFromUses();

201

203 Contents.OffsetedInfo.Val.GV = GV;

206}

207

209 unsigned TargetFlags) {

211 "Cannot change a tied operand into a block address");

212

213 removeRegFromUses();

214

216 Contents.OffsetedInfo.Val.BA = BA;

219}

220

222 unsigned TargetFlags) {

224 "Cannot change a tied operand into a constant pool index");

225

226 removeRegFromUses();

227

232}

233

236 "Cannot change a tied operand into an MCSymbol");

237

238 removeRegFromUses();

239

241 Contents.Sym = Sym;

243}

244

247 "Cannot change a tied operand into a FrameIndex");

248

249 removeRegFromUses();

250

254}

255

257 unsigned TargetFlags) {

259 "Cannot change a tied operand into a FrameIndex");

260

261 removeRegFromUses();

262

267}

268

270 unsigned TargetFlags) {

272 "Cannot change a tied operand into a DbgInstrRef");

273

274 removeRegFromUses();

275

280}

281

282

283

284

290 RegInfo = &MF->getRegInfo();

291

292

293 bool WasReg = isReg();

294 if (RegInfo && WasReg)

295 RegInfo->removeRegOperandFromUseList(this);

296

297

299 if ( isDef && MI && MI->isDebugInstr())

301

302

306 SmallContents.RegNo = Reg.id();

307 SubReg_TargetFlags = 0;

309 IsImp = isImp;

311 IsRenamable = false;

313 IsInternalRead = false;

314 IsEarlyClobber = false;

316

317 Contents.Reg.Prev = nullptr;

318

319 if (!WasReg)

320 TiedTo = 0;

321

322

323

324 if (RegInfo)

325 RegInfo->addRegOperandToUseList(this);

326}

327

328

329

330

334 return false;

335

365

367 const uint32_t *OtherRegMask =

369 if (RegMask == OtherRegMask)

370 return true;

371

375

376 return std::equal(RegMask, RegMask + RegMaskSize, OtherRegMask);

377 }

378

379

380 return false;

381 }

399 }

401}

402

403

407

442 std::vector<stable_hash> RegMaskHashes(RegMask, RegMask + RegMaskSize);

445 }

446

447 assert(0 && "MachineOperand not associated with any MachineFunction");

449 }

468 }

470}

471

472

476 TRI = MF->getSubtarget().getRegisterInfo();

477 }

478}

479

482 assert(TII && "expected instruction info");

483 auto Indices = TII->getSerializableTargetIndices();

484 auto Found = find_if(Indices, [&](const std::pair<int, const char *> &I) {

485 return I.first == Index;

486 });

487 if (Found != Indices.end())

488 return Found->second;

489 return nullptr;

490}

491

496

498 auto Flags = TII->getSerializableDirectMachineOperandTargetFlags();

499 for (const auto &I : Flags) {

500 if (I.first == TF) {

501 return I.second;

502 }

503 }

504 return nullptr;

505}

506

509 if ( TRI ) {

510 OS << "%dwarfreg." << DwarfReg;

511 return;

512 }

513

514 if (std::optional Reg = TRI->getLLVMRegNum(DwarfReg, true))

516 else

517 OS << "";

518}

519

522 OS << "%ir-block.";

525 return;

526 }

527 std::optional Slot;

531 } else if (const Module *M = F->getParent()) {

532 ModuleSlotTracker CustomMST(M, false);

535 }

536 }

537 if (Slot)

539 else

540 OS << "";

541}

542

546 switch (SSID) {

548 break;

549 default:

550 if (SSNs.empty())

551 Context.getSyncScopeNames(SSNs);

552

553 OS << "syncscope(\"";

555 OS << "\") ";

556 break;

557 }

558}

559

561 unsigned TMMOFlag) {

562 auto Flags = TII.getSerializableMachineMemOperandTargetFlags();

563 for (const auto &I : Flags) {

564 if (I.first == TMMOFlag) {

565 return I.second;

566 }

567 }

568 return nullptr;

569}

570

574 if (MFI) {

577 if (Alloca->hasName())

578 Name = Alloca->getName();

579 if (IsFixed)

581 }

583}

584

587 OS << "%subreg.";

588 if (TRI && Index != 0 && Index < TRI->getNumSubRegIndices())

589 OS << TRI->getSubRegIndexName(Index);

590 else

591 OS << Index;

592}

593

595 const MachineOperand &Op) {

596 if (.getTargetFlags())

597 return;

599 if (!MF)

600 return;

601

603 assert(TII && "expected instruction info");

604 auto Flags = TII->decomposeMachineOperandsTargetFlags(Op.getTargetFlags());

605 OS << "target-flags(";

606 const bool HasDirectFlags = Flags.first;

607 const bool HasBitmaskFlags = Flags.second;

608 if (!HasDirectFlags && !HasBitmaskFlags) {

609 OS << ") ";

610 return;

611 }

612 if (HasDirectFlags) {

614 OS << Name;

615 else

616 OS << "";

617 }

618 if (!HasBitmaskFlags) {

619 OS << ") ";

620 return;

621 }

622 bool IsCommaNeeded = HasDirectFlags;

623 unsigned BitMask = Flags.second;

624 auto BitMasks = TII->getSerializableBitmaskMachineOperandTargetFlags();

625 for (const auto &Mask : BitMasks) {

626

627 if ((BitMask & Mask.first) == Mask.first) {

628 if (IsCommaNeeded)

629 OS << ", ";

630 IsCommaNeeded = true;

631 OS << Mask.second;

632

633 BitMask &= ~(Mask.first);

634 }

635 }

636 if (BitMask) {

637

638

639 if (IsCommaNeeded)

640 OS << ", ";

641 OS << "";

642 }

643 OS << ") ";

644}

645

647 OS << "<mcsymbol " << Sym << ">";

648}

649

651 unsigned FrameIndex,

653 if (IsFixed) {

654 OS << "%fixed-stack." << FrameIndex;

655 return;

656 }

657

658 OS << "%stack." << FrameIndex;

659 if (!Name.empty())

660 OS << '.' << Name;

661}

662

665 return;

667 OS << " - " << -Offset;

668 return;

669 }

670 OS << " + " << Offset;

671}

672

674 if (Slot == -1)

675 OS << "";

676 else

677 OS << Slot;

678}

679

684 OS << "same_value ";

688 break;

690 OS << "remember_state ";

693 break;

695 OS << "restore_state ";

698 break;

700 OS << "offset ";

705 break;

707 OS << "def_cfa_register ";

711 break;

713 OS << "def_cfa_offset ";

717 break;

719 OS << "def_cfa ";

724 break;

726 OS << "llvm_def_aspace_cfa ";

732 break;

734 OS << "rel_offset ";

739 break;

741 OS << "adjust_cfa_offset ";

745 break;

747 OS << "restore ";

751 break;

753 OS << "escape ";

758 for (size_t i = 0; i < e; ++i)

761 }

762 break;

763 }

765 OS << "undefined ";

769 break;

771 OS << "register ";

775 OS << ", ";

777 break;

779 OS << "window_save ";

782 break;

784 OS << "negate_ra_sign_state ";

787 break;

789 OS << "negate_ra_sign_state_with_pc ";

792 break;

793 default:

794

795 OS << "";

796 break;

797 }

798}

799

804

809 print(OS, DummyMST, TypeToPrint, std::nullopt, false,

810 true,

811 true,

812 0, TRI);

813}

814

816 LLT TypeToPrint, std::optional OpIdx,

817 bool PrintDef, bool IsStandalone,

818 bool ShouldPrintRegisterTies,

819 unsigned TiedOperandIdx,

826 OS << (isDef() ? "implicit-def " : "implicit ");

827 else if (PrintDef && isDef())

828

829 OS << "def ";

831 OS << "internal ";

833 OS << "dead ";

835 OS << "killed ";

837 OS << "undef ";

839 OS << "early-clobber ";

841 OS << "renamable ";

842

843

844

846 if (Reg.isVirtual()) {

848 MRI = &MF->getRegInfo();

849 }

850 }

851

853

856 OS << '.' << TRI->getSubRegIndexName(SubReg);

857 else

858 OS << ".subreg" << SubReg;

859 }

860

861 if (Reg.isVirtual()) {

864 if (IsStandalone || !PrintDef || MRI.def_empty(Reg)) {

865 OS << ':';

867 }

868 }

869 }

870

871 if (ShouldPrintRegisterTies && isTied() && isDef ())

872 OS << "(tied-def " << TiedOperandIdx << ")";

873

874 if (TypeToPrint.isValid())

875 OS << '(' << TypeToPrint << ')';

876 break;

877 }

881 const auto *TII = MF->getSubtarget().getInstrInfo();

882 assert(TII && "expected instruction info");

883 Formatter = TII->getMIRFormatter();

884 }

885 if (Formatter)

887 else

889 break;

890 }

893 break;

896 break;

899 break;

902 bool IsFixed = false;

905 MFI = &MF->getFrameInfo();

907 break;

908 }

910 OS << "%const." << getIndex();

912 break;

914 OS << "target-index(";

915 const char *Name = "";

918 Name = TargetIndexName;

919 OS << Name << ')';

921 break;

922 }

925 break;

928 GV->printAsOperand(OS, false, MST);

929 else

930 OS << "globaladdress(null)";

931

933 break;

936 OS << '&';

937 if (Name.empty()) {

938 OS << "\"\"";

939 } else {

941 }

943 break;

944 }

946 OS << "blockaddress(";

948 MST);

949 OS << ", ";

951 OS << ')';

953 break;

954 }

956 OS << "<regmask";

957 if (TRI) {

958 unsigned NumRegsInMask = 0;

959 unsigned NumRegsEmitted = 0;

960 for (unsigned i = 0; i < TRI->getNumRegs(); ++i) {

961 unsigned MaskWord = i / 32;

962 unsigned MaskBit = i % 32;

963 if (getRegMask()[MaskWord] & (1 << MaskBit)) {

967 NumRegsEmitted++;

968 }

969 NumRegsInMask++;

970 }

971 }

972 if (NumRegsEmitted != NumRegsInMask)

973 OS << " and " << (NumRegsInMask - NumRegsEmitted) << " more...";

974 } else {

975 OS << " ...";

976 }

977 OS << ">";

978 break;

979 }

982 OS << "liveout(";

983 if ( TRI ) {

984 OS << "";

985 } else {

986 bool IsCommaNeeded = false;

987 for (unsigned Reg = 0, E = TRI->getNumRegs(); Reg < E; ++Reg) {

988 if (RegMask[Reg / 32] & (1U << (Reg % 32))) {

989 if (IsCommaNeeded)

990 OS << ", ";

992 IsCommaNeeded = true;

993 }

994 }

995 }

996 OS << ")";

997 break;

998 }

1001 break;

1004 break;

1008 break;

1009 }

1013 else

1014 OS << "";

1015 break;

1016 }

1019 if (ID < Intrinsic::num_intrinsics)

1021 else

1022 OS << "intrinsic(" << ID << ')';

1023 break;

1024 }

1028 << ')';

1029 break;

1030 }

1032 OS << "shufflemask(";

1035 for (int Elt : Mask) {

1036 if (Elt == -1)

1037 OS << Separator << "undef";

1038 else

1039 OS << Separator << Elt;

1040 Separator = ", ";

1041 }

1042

1043 OS << ')';

1044 break;

1045 }

1047 OS << "lanemask(";

1050 OS << ')';

1051 break;

1052 }

1053 }

1054}

1055

1056#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)

1058#endif

1059

1060

1061

1062

1063

1064

1065

1067

1068

1069

1073 return false;

1074

1076 if (BasePtr == nullptr)

1077 return false;

1078

1082}

1083

1084

1085

1089

1090

1091

1093 int FI, int64_t Offset) {

1095}

1096

1100

1104

1109

1113

1119 : PtrInfo(ptrinfo), MemoryType(type), FlagVals(f), BaseAlign(a),

1120 AAInfo(AAInfo), Ranges(Ranges) {

1123 "invalid pointer value");

1125

1126 AtomicInfo.SSID = static_cast<unsigned>(SSID);

1128 AtomicInfo.Ordering = static_cast<unsigned>(Ordering);

1130 AtomicInfo.FailureOrdering = static_cast<unsigned>(FailureOrdering);

1132}

1133

1141 ptrinfo, F,

1142 !TS.hasValue() ? LLT()

1143 : TS.isScalable()

1144 ? LLT::scalable_vector(1, 8 * TS.getValue().getKnownMinValue())

1145 : LLT::scalar(8 * TS.getValue().getKnownMinValue()),

1146 BaseAlignment, AAInfo, Ranges, SSID, Ordering, FailureOrdering) {}

1147

1149

1150

1154 "Size mismatch!");

1156

1158

1159

1160 PtrInfo = MMO->PtrInfo;

1161 }

1162}

1163

1164

1165

1169

1175 OS << '(';

1177 OS << "volatile ";

1179 OS << "non-temporal ";

1181 OS << "dereferenceable ";

1183 OS << "invariant ";

1184 if (TII) {

1187 << "\" ";

1190 << "\" ";

1193 << "\" ";

1196 << "\" ";

1197 } else {

1199 OS << "\"MOTargetFlag1\" ";

1201 OS << "\"MOTargetFlag2\" ";

1203 OS << "\"MOTargetFlag3\" ";

1205 OS << "\"MOTargetFlag4\" ";

1206 }

1207

1209 "machine memory operand must be a load or store (or both)");

1211 OS << "load ";

1213 OS << "store ";

1214

1216

1221

1224 else

1225 OS << "unknown-size";

1226

1228 OS << ((isLoad() && isStore()) ? " on " : isLoad() ? " from " : " into ");

1231 OS << ((isLoad() && isStore()) ? " on " : isLoad() ? " from " : " into ");

1232 assert(PVal && "Expected a pseudo source value");

1233 switch (PVal->kind()) {

1235 OS << "stack";

1236 break;

1238 OS << "got";

1239 break;

1241 OS << "jump-table";

1242 break;

1244 OS << "constant-pool";

1245 break;

1248 bool IsFixed = true;

1250 break;

1251 }

1253 OS << "call-entry ";

1255 OS, false, MST);

1256 break;

1258 OS << "call-entry &";

1261 break;

1262 default: {

1263

1264

1265

1266

1267 OS << "custom \"";

1268 if (TII) {

1271 } else {

1272 PVal->printCustom(OS);

1273 }

1274 OS << '\"';

1275 break;

1276 }

1277 }

1280 : isLoad() ? " from "

1281 : " into ")

1282 << "unknown-address";

1283 }

1285 if ( getSize ().hasValue() ||

1292 if (AAInfo.TBAA) {

1293 OS << ", !tbaa ";

1294 AAInfo.TBAA->printAsOperand(OS, MST);

1295 }

1296 if (AAInfo.Scope) {

1297 OS << ", !alias.scope ";

1298 AAInfo.Scope->printAsOperand(OS, MST);

1299 }

1300 if (AAInfo.NoAlias) {

1301 OS << ", !noalias ";

1302 AAInfo.NoAlias->printAsOperand(OS, MST);

1303 }

1304 if (AAInfo.NoAliasAddrSpace) {

1305 OS << ", !noalias.addrspace ";

1306 AAInfo.NoAliasAddrSpace->printAsOperand(OS, MST);

1307 }

1309 OS << ", !range ";

1311 }

1312

1313

1315 OS << ", addrspace " << AS;

1316

1317 OS << ')';

1318}

unsigned const MachineRegisterInfo * MRI

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

const TargetInstrInfo & TII

MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL

#define LLVM_DUMP_METHOD

Mark debug helper function definitions like dump() that should not be stripped from debug builds.

This file contains the declarations for the subclasses of Constant, which represent the different fla...

This file contains an interface for creating legacy passes to print out IR in various granularities.

static bool isZero(Value *V, const DataLayout &DL, DominatorTree *DT, AssumptionCache *AC)

static void tryToGetTargetInfo(const MachineInstr &MI, const TargetRegisterInfo *&TRI, const MachineRegisterInfo *&MRI, const TargetInstrInfo *&TII)

static const MachineFunction * getMFIfAvailable(const MachineInstr &MI)

static void printSyncScope(raw_ostream &OS, const LLVMContext &Context, SyncScope::ID SSID, SmallVectorImpl< StringRef > &SSNs)

Definition MachineOperand.cpp:543

static const MachineFunction * getMFIfAvailable(const MachineOperand &MO)

Definition MachineOperand.cpp:42

static const char * getTargetIndexName(const MachineFunction &MF, int Index)

Definition MachineOperand.cpp:480

static void printFrameIndex(raw_ostream &OS, int FrameIndex, bool IsFixed, const MachineFrameInfo *MFI)

Definition MachineOperand.cpp:571

static cl::opt< int > PrintRegMaskNumRegs("print-regmask-num-regs", cl::desc("Number of registers to limit to when " "printing regmask operands in IR dumps. " "unlimited = -1"), cl::init(32), cl::Hidden)

static void printIRBlockReference(raw_ostream &OS, const BasicBlock &BB, ModuleSlotTracker &MST)

Definition MachineOperand.cpp:520

static const char * getTargetFlagName(const TargetInstrInfo *TII, unsigned TF)

Definition MachineOperand.cpp:497

static void printCFIRegister(unsigned DwarfReg, raw_ostream &OS, const TargetRegisterInfo *TRI)

Definition MachineOperand.cpp:507

static const char * getTargetMMOFlagName(const TargetInstrInfo &TII, unsigned TMMOFlag)

Definition MachineOperand.cpp:560

static void printCFI(raw_ostream &OS, const MCCFIInstruction &CFI, const TargetRegisterInfo *TRI)

Definition MachineOperand.cpp:680

MachineInstr unsigned OpIdx

static bool isPhysical(const MachineOperand &MO)

static bool isValid(const char C)

Returns true if C is a valid mangled character: <0-9a-zA-Z_>.

Class for arbitrary precision integers.

an instruction to allocate memory on the stack

ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...

LLVM Basic Block Representation.

const Function * getParent() const

Return the enclosing method, or null if none.

The address of a basic block.

Function * getFunction() const

Predicate

This enumeration lists the possible predicates for CmpInst subclasses.

bool isIntPredicate() const

ConstantFP - Floating Point Values [float, double].

A parsed version of the target data layout string in and methods for querying it.

unsigned getAllocaAddrSpace() const

constexpr bool isValid() const

This is an important class for using LLVM in a threaded context.

MCSymbol * getLabel() const

unsigned getAddressSpace() const

unsigned getRegister2() const

unsigned getRegister() const

OpType getOperation() const

StringRef getValues() const

int64_t getOffset() const

Wrapper class representing physical registers. Should be passed by value.

MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...

MIRFormater - Interface to format MIR operand based on target.

virtual void printImm(raw_ostream &OS, const MachineInstr &MI, std::optional< unsigned > OpIdx, int64_t Imm) const

Implement target specific printing for machine operand immediate value, so that we can have more mean...

virtual void printCustomPseudoSourceValue(raw_ostream &OS, ModuleSlotTracker &MST, const PseudoSourceValue &PSV) const

Implement target specific printing of target custom pseudo source value.

static LLVM_ABI void printIRValue(raw_ostream &OS, const Value &V, ModuleSlotTracker &MST)

Helper functions to print IR value as MIR serialization format which will be useful for target specif...

The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.

const AllocaInst * getObjectAllocation(int ObjectIdx) const

Return the underlying Alloca of the specified stack object if it exists.

bool isFixedObjectIndex(int ObjectIdx) const

Returns true if the specified index corresponds to a fixed stack object.

int getObjectIndexBegin() const

Return the minimum frame object index.

PseudoSourceValueManager & getPSVManager() const

const TargetSubtargetInfo & getSubtarget() const

getSubtarget - Return the subtarget for which this machine code is being compiled.

const DataLayout & getDataLayout() const

Return the DataLayout attached to the Module associated to this MF.

Representation of each machine instruction.

unsigned getOperandNo(const_mop_iterator I) const

Returns the number of the operand iterator I points to.

LocationSize getSize() const

Return the size in bytes of the memory reference.

AtomicOrdering getFailureOrdering() const

For cmpxchg atomic operations, return the atomic ordering requirements when store does not occur.

const PseudoSourceValue * getPseudoValue() const

LLT getMemoryType() const

Return the memory type of the memory reference.

unsigned getAddrSpace() const

LLVM_ABI void print(raw_ostream &OS, ModuleSlotTracker &MST, SmallVectorImpl< StringRef > &SSNs, const LLVMContext &Context, const MachineFrameInfo *MFI, const TargetInstrInfo *TII) const

Support for operator<<.

Definition MachineOperand.cpp:1170

bool isNonTemporal() const

const MDNode * getRanges() const

Return the range tag for the memory reference.

LLVM_ABI void refineAlignment(const MachineMemOperand *MMO)

Update this MachineMemOperand to reflect the alignment of MMO, if it has a greater alignment.

Definition MachineOperand.cpp:1148

SyncScope::ID getSyncScopeID() const

Returns the synchronization scope ID for this memory operation.

const void * getOpaqueValue() const

LLVM_ABI MachineMemOperand(MachinePointerInfo PtrInfo, Flags flags, LocationSize TS, Align a, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr, SyncScope::ID SSID=SyncScope::System, AtomicOrdering Ordering=AtomicOrdering::NotAtomic, AtomicOrdering FailureOrdering=AtomicOrdering::NotAtomic)

Construct a MachineMemOperand object with the specified PtrInfo, flags, size, and base alignment.

Definition MachineOperand.cpp:1134

Flags

Flags values. These may be or'd together.

AtomicOrdering getSuccessOrdering() const

Return the atomic ordering requirements for this memory operation.

Flags getFlags() const

Return the raw flags of the source value,.

LLVM_ABI Align getAlign() const

Return the minimum known alignment in bytes of the actual memory reference.

Definition MachineOperand.cpp:1166

bool isDereferenceable() const

AAMDNodes getAAInfo() const

Return the AA tags for the memory reference.

const Value * getValue() const

Return the base address of the memory access.

Align getBaseAlign() const

Return the minimum known alignment in bytes of the base address, without the offset.

int64_t getOffset() const

For normal values, this is a byte offset added to the base address.

MachineOperand class - Representation of each machine instruction operand.

void setSubReg(unsigned subReg)

unsigned getSubReg() const

unsigned getInstrRefOpIndex() const

void setInstrRefInstrIndex(unsigned InstrIdx)

LLVM_ABI unsigned getOperandNo() const

Returns the index of this operand in the instruction that it belongs to.

Definition MachineOperand.cpp:55

const GlobalValue * getGlobal() const

LLVM_ABI void substVirtReg(Register Reg, unsigned SubIdx, const TargetRegisterInfo &)

substVirtReg - Substitute the current register with the virtual subregister Reg:SubReg.

Definition MachineOperand.cpp:82

LLVM_ABI void ChangeToFrameIndex(int Idx, unsigned TargetFlags=0)

Replace this operand with a frame index.

Definition MachineOperand.cpp:245

const uint32_t * getRegLiveOut() const

getRegLiveOut - Returns a bit mask of live-out registers.

void setInstrRefOpIndex(unsigned OpIdx)

const ConstantInt * getCImm() const

LLVM_ABI const char * getTargetIndexName() const

getTargetIndexName - If this MachineOperand is a TargetIndex that has a name, attempt to get the name...

Definition MachineOperand.cpp:492

static LLVM_ABI void printStackObjectReference(raw_ostream &OS, unsigned FrameIndex, bool IsFixed, StringRef Name)

Print a stack object reference.

Definition MachineOperand.cpp:650

static LLVM_ABI void printSubRegIdx(raw_ostream &OS, uint64_t Index, const TargetRegisterInfo *TRI)

Print a subreg index operand.

Definition MachineOperand.cpp:585

unsigned getInstrRefInstrIndex() const

static LLVM_ABI void printTargetFlags(raw_ostream &OS, const MachineOperand &Op)

Print operand target flags.

Definition MachineOperand.cpp:594

LLVM_ABI void ChangeToFPImmediate(const ConstantFP *FPImm, unsigned TargetFlags=0)

ChangeToFPImmediate - Replace this operand with a new FP immediate operand of the specified value.

Definition MachineOperand.cpp:171

LLVM_ABI void setIsRenamable(bool Val=true)

Definition MachineOperand.cpp:141

bool isReg() const

isReg - Tests if this is a MO_Register operand.

bool isRegMask() const

isRegMask - Tests if this is a MO_RegisterMask operand.

const MDNode * getMetadata() const

MachineBasicBlock * getMBB() const

ArrayRef< int > getShuffleMask() const

LLVM_ABI void ChangeToMCSymbol(MCSymbol *Sym, unsigned TargetFlags=0)

ChangeToMCSymbol - Replace this operand with a new MC symbol operand.

Definition MachineOperand.cpp:234

LLVM_ABI void ChangeToTargetIndex(unsigned Idx, int64_t Offset, unsigned TargetFlags=0)

Replace this operand with a target index.

Definition MachineOperand.cpp:256

LLVM_ABI void setReg(Register Reg)

Change the register this operand corresponds to.

Definition MachineOperand.cpp:60

LLVM_ABI void dump() const

Definition MachineOperand.cpp:1057

LLVM_ABI void ChangeToImmediate(int64_t ImmVal, unsigned TargetFlags=0)

ChangeToImmediate - Replace this operand with a new immediate operand of the specified value.

Definition MachineOperand.cpp:161

LLVM_ABI void ChangeToES(const char *SymName, unsigned TargetFlags=0)

ChangeToES - Replace this operand with a new external symbol operand.

Definition MachineOperand.cpp:182

LLVM_ABI void ChangeToGA(const GlobalValue *GV, int64_t Offset, unsigned TargetFlags=0)

ChangeToGA - Replace this operand with a new global address operand.

Definition MachineOperand.cpp:195

LLVM_ABI void print(raw_ostream &os, const TargetRegisterInfo *TRI=nullptr) const

Print the MachineOperand to os.

Definition MachineOperand.cpp:800

LaneBitmask getLaneMask() const

unsigned getCFIIndex() const

LLVM_ABI bool isRenamable() const

isRenamable - Returns true if this register may be renamed, i.e.

Definition MachineOperand.cpp:123

LLVM_ABI void ChangeToBA(const BlockAddress *BA, int64_t Offset, unsigned TargetFlags=0)

ChangeToBA - Replace this operand with a new block address operand.

Definition MachineOperand.cpp:208

static LLVM_ABI void printOperandOffset(raw_ostream &OS, int64_t Offset)

Print the offset with explicit +/- signs.

Definition MachineOperand.cpp:663

LLVM_ABI void ChangeToDbgInstrRef(unsigned InstrIdx, unsigned OpIdx, unsigned TargetFlags=0)

Replace this operand with an Instruction Reference.

Definition MachineOperand.cpp:269

LLVM_ABI void ChangeToRegister(Register Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isDebug=false)

ChangeToRegister - Replace this operand with a new register operand of the specified value.

Definition MachineOperand.cpp:285

const BlockAddress * getBlockAddress() const

MachineInstr * getParent()

getParent - Return the instruction that this operand belongs to.

LLVM_ABI void substPhysReg(MCRegister Reg, const TargetRegisterInfo &)

substPhysReg - Substitute the current register with the physical register Reg, taking any existing Su...

Definition MachineOperand.cpp:92

static unsigned getRegMaskSize(unsigned NumRegs)

Returns number of elements needed for a regmask array.

void setOffset(int64_t Offset)

static LLVM_ABI void printIRSlotNumber(raw_ostream &OS, int Slot)

Print an IRSlotNumber.

Definition MachineOperand.cpp:673

unsigned getTargetFlags() const

MachineOperandType getType() const

getType - Returns the MachineOperandType for this operand.

const char * getSymbolName() const

void setIsUndef(bool Val=true)

bool isEarlyClobber() const

getReg - Returns the register number.

Intrinsic::ID getIntrinsicID() const

bool isInternalRead() const

void setTargetFlags(unsigned F)

LLVM_ABI bool isIdenticalTo(const MachineOperand &Other) const

Returns true if this operand is identical to the specified operand except for liveness related flags ...

Definition MachineOperand.cpp:331

LLVM_ABI void ChangeToCPI(unsigned Idx, int Offset, unsigned TargetFlags=0)

ChangeToCPI - Replace this operand with a new constant pool index operand.

Definition MachineOperand.cpp:221

friend class MachineRegisterInfo

const uint32_t * getRegMask() const

getRegMask - Returns a bit mask of registers preserved by this RegMask operand.

friend class MachineInstr

LLVM_ABI void setIsDef(bool Val=true)

Change a def to a use, or a use to a def.

Definition MachineOperand.cpp:106

const ConstantFP * getFPImm() const

static LLVM_ABI void printSymbol(raw_ostream &OS, MCSymbol &Sym)

Print a MCSymbol as an operand.

Definition MachineOperand.cpp:646

unsigned getPredicate() const

MCSymbol * getMCSymbol() const

@ MO_CFIIndex

MCCFIInstruction index.

@ MO_Immediate

Immediate operand.

@ MO_ConstantPoolIndex

Address of indexed Constant in Constant Pool.

@ MO_MCSymbol

MCSymbol reference (for debug/eh info)

@ MO_Predicate

Generic predicate for ISel.

@ MO_GlobalAddress

Address of a global value.

@ MO_RegisterMask

Mask of preserved registers.

@ MO_ShuffleMask

Other IR Constant for ISel (shuffle masks)

@ MO_CImmediate

Immediate >64bit operand.

@ MO_BlockAddress

Address of a basic block.

@ MO_DbgInstrRef

Integer indices referring to an instruction+operand.

@ MO_MachineBasicBlock

MachineBasicBlock reference.

@ MO_LaneMask

Mask to represent active parts of registers.

@ MO_FrameIndex

Abstract Stack Frame Index.

@ MO_Register

@ MO_ExternalSymbol

Name of external global symbol.

@ MO_IntrinsicID

Intrinsic ID for ISel.

@ MO_JumpTableIndex

Address of indexed Jump Table for switch.

@ MO_TargetIndex

Target-dependent index+offset operand.

@ MO_Metadata

Metadata reference (for debug info)

@ MO_FPImmediate

Floating-point immediate operand.

@ MO_RegisterLiveOut

Mask of live-out registers.

int64_t getOffset() const

Return the offset from the symbol in this operand.

Manage lifetime of a slot tracker for printing IR.

int getLocalSlot(const Value *V)

Return the slot number of the specified local value.

const Function * getCurrentFunction() const

void incorporateFunction(const Function &F)

Incorporate the given function.

A Module instance is used to store all the information related to an LLVM module.

LLVM_ABI const PseudoSourceValue * getJumpTable()

Return a pseudo source value referencing a jump table.

LLVM_ABI const PseudoSourceValue * getFixedStack(int FI)

Return a pseudo source value referencing a fixed stack frame entry, e.g., a spill slot.

LLVM_ABI const PseudoSourceValue * getGOT()

Return a pseudo source value referencing the global offset table (or something the like).

LLVM_ABI const PseudoSourceValue * getStack()

Return a pseudo source value referencing the area below the stack frame of a function,...

LLVM_ABI const PseudoSourceValue * getConstantPool()

Return a pseudo source value referencing the constant pool.

Special value supplied for machine level alias analysis.

@ ExternalSymbolCallEntry

Wrapper class representing virtual and physical registers.

constexpr unsigned id() const

This class consists of common code factored out of the SmallVector class to reduce code duplication b...

StringRef - Represent a constant reference to a string, i.e.

constexpr bool empty() const

empty - Check if the string is empty.

constexpr size_t size() const

size - Get the string size.

TargetInstrInfo - Interface to description of machine instruction set.

TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...

virtual const TargetInstrInfo * getInstrInfo() const

LLVM Value Representation.

LLVM_ABI void printAsOperand(raw_ostream &O, bool PrintType=true, const Module *M=nullptr) const

Print the name of this Value out to the specified raw_ostream.

LLVM_ABI StringRef getName() const

Return a constant reference to the value's name.

An opaque object representing a hash code.

This class implements an extremely fast bulk output stream that can only output to a stream.

#define llvm_unreachable(msg)

Marks that the current location is not supposed to be reachable.

unsigned ID

LLVM IR allows to use arbitrary numbers as calling convention identifiers.

@ C

The default llvm calling convention, compatible with C.

LLVM_ABI StringRef getBaseName(ID id)

Return the LLVM name for an intrinsic, without encoded types for overloading, such as "llvm....

@ System

Synchronized with respect to all concurrently executing threads.

initializer< Ty > init(const Ty &Val)

This is an optimization pass for GlobalISel generic memory operations.

hash_code hash_value(const FixedPointSemantics &Val)

decltype(auto) dyn_cast(const From &Val)

dyn_cast - Return the argument parameter cast to the specified type.

LLVM_ABI bool isDereferenceableAndAlignedPointer(const Value *V, Type *Ty, Align Alignment, const DataLayout &DL, const Instruction *CtxI=nullptr, AssumptionCache *AC=nullptr, const DominatorTree *DT=nullptr, const TargetLibraryInfo *TLI=nullptr)

Returns true if V is always a dereferenceable pointer with alignment greater or equal than requested.

Printable PrintLaneMask(LaneBitmask LaneMask)

Create Printable object to print LaneBitmasks on a raw_ostream.

LLVM_ABI Printable printJumpTableEntryReference(unsigned Idx)

Prints a jump table entry reference.

LLVM_ABI void printEscapedString(StringRef Name, raw_ostream &Out)

Print each character of the specified string, escaping it if it is not printable or if it is an escap...

const char * toIRString(AtomicOrdering ao)

String used by LLVM IR to represent atomic ordering.

LLVM_ABI raw_ostream & dbgs()

dbgs() - This returns a reference to a raw_ostream for debugging messages.

LLVM_ABI Printable printRegClassOrBank(Register Reg, const MachineRegisterInfo &RegInfo, const TargetRegisterInfo *TRI)

Create Printable object to print register classes or register banks on a raw_ostream.

bool isa(const From &Val)

isa - Return true if the parameter to the template is an instance of one of the template type argu...

format_object< Ts... > format(const char *Fmt, const Ts &... Vals)

These are helper functions used to produce formatted output.

AtomicOrdering

Atomic ordering for LLVM's memory model.

DWARFExpression::Operation Op

decltype(auto) cast(const From &Val)

cast - Return the argument parameter cast to the specified type.

auto find_if(R &&Range, UnaryPredicate P)

Provide wrappers to std::find_if which take ranges instead of having to pass begin/end explicitly.

Align commonAlignment(Align A, uint64_t Offset)

Returns the alignment that satisfies both alignments.

hash_code hash_combine(const Ts &...args)

Combine values into a single hash_code.

stable_hash stable_hash_combine(ArrayRef< stable_hash > Buffer)

LLVM_ABI void printLLVMNameWithoutPrefix(raw_ostream &OS, StringRef Name)

Print out a name of an LLVM value without any prefixes.

LLVM_ABI Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)

Prints virtual and physical registers with or without a TRI instance.

LLVM_ABI Printable printMBBReference(const MachineBasicBlock &MBB)

Prints a machine basic block reference.

A collection of metadata nodes that might be associated with a memory access used by the alias-analys...

This struct is a compact representation of a valid (non-zero power of two) alignment.

constexpr uint64_t value() const

This is a hole in the type system and should not be abused.

constexpr Type getAsInteger() const

This class contains a discriminated union of information about pointers in memory operands,...

static LLVM_ABI MachinePointerInfo getJumpTable(MachineFunction &MF)

Return a MachinePointerInfo record that refers to a jump table entry.

Definition MachineOperand.cpp:1097

LLVM_ABI bool isDereferenceable(unsigned Size, LLVMContext &C, const DataLayout &DL) const

Return true if memory region [V, V+Offset+Size) is known to be dereferenceable.

Definition MachineOperand.cpp:1070

LLVM_ABI unsigned getAddrSpace() const

Return the LLVM IR address space number that this pointer points into.

Definition MachineOperand.cpp:1066

static LLVM_ABI MachinePointerInfo getStack(MachineFunction &MF, int64_t Offset, uint8_t ID=0)

Stack pointer relative access.

Definition MachineOperand.cpp:1105

int64_t Offset

Offset - This is an offset from the base Value*.

PointerUnion< const Value *, const PseudoSourceValue * > V

This is the IR pointer value for the access, or it is null if unknown.

static LLVM_ABI MachinePointerInfo getConstantPool(MachineFunction &MF)

Return a MachinePointerInfo record that refers to the constant pool.

Definition MachineOperand.cpp:1086

static LLVM_ABI MachinePointerInfo getUnknownStack(MachineFunction &MF)

Stack memory without other information.

Definition MachineOperand.cpp:1110

static LLVM_ABI MachinePointerInfo getGOT(MachineFunction &MF)

Return a MachinePointerInfo record that refers to a GOT entry.

Definition MachineOperand.cpp:1101

MachinePointerInfo(const Value *v, int64_t offset=0, uint8_t ID=0)

static LLVM_ABI MachinePointerInfo getFixedStack(MachineFunction &MF, int FI, int64_t Offset=0)

Return a MachinePointerInfo record that refers to the specified FrameIndex.

Definition MachineOperand.cpp:1092