LLVM: lib/CodeGen/MachineSSAUpdater.cpp Source File (original) (raw)
1
2
3
4
5
6
7
8
9
10
11
12
13
31#include
32
33using namespace llvm;
34
35#define DEBUG_TYPE "machine-ssaupdater"
36
38
42
45 : InsertedPHIs(NewPHI), TII(MF.getSubtarget().getInstrInfo()),
46 MRI(&MF.getRegInfo()) {}
47
51
52
53
55 if (!AV)
57 else
59
60 RegAttrs = MRI->getVRegAttrs(V);
61}
62
63
64
68
69
70
74
75
76
78 return GetValueAtEndOfBlockInternal(BB);
79}
80
81static
83 SmallVectorImpl<std::pair<MachineBasicBlock *, Register>> &PredValues) {
86
88 if (->isPHI())
90
92 for (const auto &[SrcBB, SrcReg] : PredValues)
93 AVals[SrcBB] = SrcReg;
94 while (I != BB->end() && I->isPHI()) {
95 bool Same = true;
96 for (unsigned i = 1, e = I->getNumOperands(); i != e; i += 2) {
97 Register SrcReg = I->getOperand(i).getReg();
99 if (AVals[SrcBB] != SrcReg) {
100 Same = false;
101 break;
102 }
103 }
104 if (Same)
105 return I->getOperand(0).getReg();
106 ++I;
107 }
109}
110
111
112
113
119 Register NewVR = MRI->createVirtualRegister(RegAttrs);
121}
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
144 bool ExistingValueOnly) {
145
146
148 return GetValueAtEndOfBlockInternal(BB, ExistingValueOnly);
149
150
152
153 if (ExistingValueOnly)
155
158 RegAttrs, MRI, TII);
160 }
161
162
163
166
167 bool isFirstPred = true;
169 Register PredVal = GetValueAtEndOfBlockInternal(PredBB, ExistingValueOnly);
170 PredValues.push_back(std::make_pair(PredBB, PredVal));
171
172
173 if (isFirstPred) {
174 SingularValue = PredVal;
175 isFirstPred = false;
176 } else if (PredVal != SingularValue)
178 }
179
180
181 if (SingularValue)
182 return SingularValue;
183
184
186 if (DupPHI)
187 return DupPHI;
188
189
190 if (ExistingValueOnly)
192
193
196 InsertNewDef(TargetOpcode::PHI, BB, Loc, RegAttrs, MRI, TII);
197
198
199 for (const auto &[SrcBB, SrcReg] : PredValues)
201
202
203
206 return ConstVal;
207 }
208
209
210 if (InsertedPHIs) InsertedPHIs->push_back(InsertedPHI);
211
212 LLVM_DEBUG(dbgs() << " Inserted PHI: " << *InsertedPHI);
213 return InsertedPHI.getReg(0);
214}
215
216static
219 for (unsigned i = 1, e = MI->getNumOperands(); i != e; i += 2) {
220 if (&MI->getOperand(i) == U)
221 return MI->getOperand(i+1).getMBB();
222 }
223
225}
226
227
228
232 if (UseMI->isPHI()) {
234 NewVR = GetValueAtEndOfBlockInternal(SourceBB);
235 } else {
237 }
238
239
240
241
242 if (NewVR) {
245 if (UseRC && !MRI->constrainRegClass(NewVR, UseRC)) {
249 RegAttrs, MRI, TII)
252 LLVM_DEBUG(dbgs() << " Inserted COPY: " << *InsertedCopy);
253 }
254 }
255 U.setReg(NewVR);
256}
257
258namespace llvm {
259
260
261
262template<>
264public:
269
272
273
275 private:
277 unsigned idx;
278
279 public:
283 : PHI(P), idx(PHI->getNumOperands()) {}
284
288
290
292 return PHI->getOperand(idx+1).getMBB();
293 }
294 };
295
297
301
302
303
308
309
310
313
316 Updater->RegAttrs, Updater->MRI, Updater->TII);
318 }
319
320
321
326 InsertNewDef(TargetOpcode::PHI, BB, Loc, Updater->RegAttrs,
327 Updater->MRI, Updater->TII);
328 return PHI->getOperand(0).getReg();
329 }
330
331
332
337
338
341 return I;
342 return nullptr;
343 }
344
345
346
350
351
352
355 if (PHI && PHI->getNumOperands() <= 1)
356 return PHI;
357 return nullptr;
358 }
359
360
361
363 return PHI->getOperand(0).getReg();
364 }
365};
366
367}
368
369
370
371
372
374MachineSSAUpdater::GetValueAtEndOfBlockInternal(MachineBasicBlock *BB,
375 bool ExistingValueOnly) {
378 if (ExistingVal || ExistingValueOnly)
379 return ExistingVal;
380
381 SSAUpdaterImpl Impl(this, &AvailableVals, InsertedPHIs);
382 return Impl.GetValue(BB);
383}
unsigned const MachineRegisterInfo * MRI
MachineInstrBuilder & UseMI
const TargetInstrInfo & TII
This file defines the DenseMap class.
static MachineInstrBuilder InsertNewDef(unsigned Opcode, MachineBasicBlock *BB, MachineBasicBlock::iterator I, MachineRegisterInfo::VRegAttrs RegAttrs, MachineRegisterInfo *MRI, const TargetInstrInfo *TII)
InsertNewDef - Insert an empty PHI or IMPLICIT_DEF instruction which define a value of the given regi...
Definition MachineSSAUpdater.cpp:114
static MachineBasicBlock * findCorrespondingPred(const MachineInstr *MI, MachineOperand *U)
Definition MachineSSAUpdater.cpp:217
static Register LookForIdenticalPHI(MachineBasicBlock *BB, SmallVectorImpl< std::pair< MachineBasicBlock *, Register > > &PredValues)
Definition MachineSSAUpdater.cpp:82
static AvailableValsTy & getAvailableVals(void *AV)
Definition MachineSSAUpdater.cpp:39
DenseMap< MachineBasicBlock *, Register > AvailableValsTy
Definition MachineSSAUpdater.cpp:37
Promote Memory to Register
This file defines the SmallVector class.
ValueT lookup(const_arg_type_t< KeyT > Val) const
lookup - Return the entry for the specified key, or a default constructed value if no such entry exis...
size_type count(const_arg_type_t< KeyT > Val) const
Return 1 if the specified key is in the map, 0 otherwise.
succ_iterator succ_begin()
LLVM_ABI iterator getFirstTerminator()
Returns an iterator to the first terminator instruction of this basic block.
SmallVectorImpl< MachineBasicBlock * >::iterator succ_iterator
LLVM_ABI iterator getFirstNonPHI()
Returns a pointer to the first instruction in this block that is not a PHINode instruction.
iterator_range< pred_iterator > predecessors()
MachineInstrBundleIterator< MachineInstr > iterator
Register getReg(unsigned Idx) const
Get the register for the operand index.
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
const MachineInstrBuilder & addMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0) const
Representation of each machine instruction.
LLVM_ABI Register isConstantValuePHI() const
If the specified instruction is a PHI that always merges together the same virtual register,...
LLVM_ABI void eraseFromParent()
Unlink 'this' from the containing basic block and delete it.
const MachineOperand & getOperand(unsigned i) const
MachineOperand class - Representation of each machine instruction operand.
Register getReg() const
getReg - Returns the register number.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
LLVM_ABI MachineInstr * getVRegDef(Register Reg) const
getVRegDef - Return the machine instr that defines the specified virtual register or null if none is ...
MachineSSAUpdater - This class updates SSA form for a set of virtual registers defined in multiple bl...
void Initialize(Register V)
Initialize - Reset this object to get ready for a new set of SSA updates.
Definition MachineSSAUpdater.cpp:54
~MachineSSAUpdater()
Definition MachineSSAUpdater.cpp:48
Register GetValueInMiddleOfBlock(MachineBasicBlock *BB, bool ExistingValueOnly=false)
GetValueInMiddleOfBlock - Construct SSA form, materializing a value that is live in the middle of the...
Definition MachineSSAUpdater.cpp:143
void RewriteUse(MachineOperand &U)
RewriteUse - Rewrite a use of the symbolic value.
Definition MachineSSAUpdater.cpp:229
Register GetValueAtEndOfBlock(MachineBasicBlock *BB)
GetValueAtEndOfBlock - Construct SSA form, materializing a value that is live at the end of the speci...
Definition MachineSSAUpdater.cpp:77
void AddAvailableValue(MachineBasicBlock *BB, Register V)
AddAvailableValue - Indicate that a rewritten value is available at the end of the specified block wi...
Definition MachineSSAUpdater.cpp:71
bool HasValueForBlock(MachineBasicBlock *BB) const
HasValueForBlock - Return true if the MachineSSAUpdater already has a value for the specified block.
Definition MachineSSAUpdater.cpp:65
MachineSSAUpdater(MachineFunction &MF, SmallVectorImpl< MachineInstr * > *NewPHI=nullptr)
MachineSSAUpdater constructor.
Definition MachineSSAUpdater.cpp:43
Wrapper class representing virtual and physical registers.
Iterator for PHI operands.
Definition MachineSSAUpdater.cpp:274
bool operator!=(const PHI_iterator &x) const
Definition MachineSSAUpdater.cpp:287
bool operator==(const PHI_iterator &x) const
Definition MachineSSAUpdater.cpp:286
PHI_iterator & operator++()
Definition MachineSSAUpdater.cpp:285
Register getIncomingValue()
Definition MachineSSAUpdater.cpp:289
PHI_iterator(MachineInstr *P, bool)
Definition MachineSSAUpdater.cpp:282
MachineBasicBlock * getIncomingBlock()
Definition MachineSSAUpdater.cpp:291
PHI_iterator(MachineInstr *P)
Definition MachineSSAUpdater.cpp:280
static MachineInstr * ValueIsNewPHI(Register Val, MachineSSAUpdater *Updater)
ValueIsNewPHI - Like ValueIsPHI but also check if the PHI has no source operands, i....
Definition MachineSSAUpdater.cpp:353
static Register CreateEmptyPHI(MachineBasicBlock *BB, unsigned NumPreds, MachineSSAUpdater *Updater)
CreateEmptyPHI - Create a PHI instruction that defines a new register.
Definition MachineSSAUpdater.cpp:322
static PHI_iterator PHI_begin(PhiT *PHI)
Definition MachineSSAUpdater.cpp:296
static Register GetPHIValue(MachineInstr *PHI)
GetPHIValue - For the specified PHI instruction, return the register that it defines.
Definition MachineSSAUpdater.cpp:362
MachineInstr PhiT
Definition MachineSSAUpdater.cpp:267
static void FindPredecessorBlocks(MachineBasicBlock *BB, SmallVectorImpl< MachineBasicBlock * > *Preds)
FindPredecessorBlocks - Put the predecessors of BB into the Preds vector.
Definition MachineSSAUpdater.cpp:304
MachineBasicBlock::succ_iterator BlkSucc_iterator
Definition MachineSSAUpdater.cpp:268
static MachineInstr * ValueIsPHI(Register Val, MachineSSAUpdater *Updater)
ValueIsPHI - Check if the instruction that defines the specified register is a PHI instruction.
Definition MachineSSAUpdater.cpp:347
static Register GetPoisonVal(MachineBasicBlock *BB, MachineSSAUpdater *Updater)
GetPoisonVal - Create an IMPLICIT_DEF instruction with a new register.
Definition MachineSSAUpdater.cpp:311
static MachineInstr * InstrIsPHI(MachineInstr *I)
InstrIsPHI - Check if an instruction is a PHI.
Definition MachineSSAUpdater.cpp:339
static BlkSucc_iterator BlkSucc_begin(BlkT *BB)
Definition MachineSSAUpdater.cpp:270
static BlkSucc_iterator BlkSucc_end(BlkT *BB)
Definition MachineSSAUpdater.cpp:271
static void AddPHIOperand(MachineInstr *PHI, Register Val, MachineBasicBlock *Pred)
AddPHIOperand - Add the specified value as an operand of the PHI for the specified predecessor block.
Definition MachineSSAUpdater.cpp:333
MachineBasicBlock BlkT
Definition MachineSSAUpdater.cpp:265
static PHI_iterator PHI_end(PhiT *PHI)
Definition MachineSSAUpdater.cpp:298
Register ValT
Definition MachineSSAUpdater.cpp:266
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
TargetInstrInfo - Interface to description of machine instruction set.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
This is an optimization pass for GlobalISel generic memory operations.
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
void append_range(Container &C, Range &&R)
Wrapper function to append range R to container C.
bool operator==(const AddressRangeValuePair &LHS, const AddressRangeValuePair &RHS)
auto dyn_cast_or_null(const Y &Val)
LLVM_ABI raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
All attributes(register class or bank and low-level type) a virtual register can have.