MachineUniformityAnalysis.cpp Source File (original) (raw)

19using namespace llvm;

21template <>

24 for (auto &op : I.all_defs()) {

26 return true;

27 }

28 return false;

29}

31template <>

34 bool insertedDivergent = false;

35 const auto &MRI = F.getRegInfo();

36 const auto &RBI = *F.getSubtarget().getRegBankInfo();

37 const auto &TRI = *MRI.getTargetRegisterInfo();

38 for (auto &op : Instr.all_defs()) {

39 if (.getReg().isVirtual())

40 continue;

42 if (TRI.isUniformReg(MRI, RBI, op.getReg()))

43 continue;

45 }

46 return insertedDivergent;

47}

49template <>

51 const auto &InstrInfo = *F.getSubtarget().getInstrInfo();

55 auto uniformity = InstrInfo.getInstructionUniformity(instr);

58 continue;

59 }

63 }

64 }

65 }

66}

68template <>

69void llvm::GenericUniformityAnalysisImpl::pushUsers(

71 assert(isDivergent(Reg));

72 const auto &RegInfo = F.getRegInfo();

73 for (MachineInstr &UserInstr : RegInfo.use_instructions(Reg)) {

74 markDivergent(UserInstr);

75 }

76}

78template <>

79void llvm::GenericUniformityAnalysisImpl::pushUsers(

81 assert(!isAlwaysUniform(Instr));

82 if (Instr.isTerminator())

83 return;

85 auto Reg = op.getReg();

86 if (isDivergent(Reg))

87 pushUsers(Reg);

88 }

89}

91template <>

92bool llvm::GenericUniformityAnalysisImpl::usesValueFromCycle(

94 assert(!isAlwaysUniform(I));

95 for (auto &Op : I.operands()) {

96 if (.isReg() || .readsReg())

97 continue;

98 auto Reg = Op.getReg();

100

101

102 if (Reg.isPhysical())

103 return true;

104

105 auto *Def = F.getRegInfo().getVRegDef(Reg);

107 return true;

108 }

109 return false;

110}

111

112template <>

116 const auto &RegInfo = F.getRegInfo();

117 for (auto &Op : I.all_defs()) {

118 if (.getReg().isVirtual())

119 continue;

120 auto Reg = Op.getReg();

122 if (DefCycle.contains(UserInstr.getParent()))

123 continue;

124 markDivergent(UserInstr);

125

126 recordTemporalDivergence(Reg, &UserInstr, &DefCycle);

127 }

128 }

129}

130

131template <>

134 if (!U.isReg())

135 return false;

136

137 auto Reg = U.getReg();

139 return true;

140

141 const auto &RegInfo = F.getRegInfo();

142 auto *Def = RegInfo.getOneDef(Reg);

143 if (!Def)

144 return true;

145

146 auto *DefInstr = Def->getParent();

147 auto *UseInstr = U.getParent();

148 return isTemporalDivergent(*UseInstr->getParent(), *DefInstr);

149}

150

151

152

156

160 assert(F.getRegInfo().isSSA() && "Expected to be run on SSA form!");

162 if (HasBranchDivergence)

164 return UI;

165}

166

167namespace {

168

170public:

171 static char ID;

172

173 MachineUniformityInfoPrinterPass();

174

176 void getAnalysisUsage(AnalysisUsage &AU) const override;

177};

178

179}

180

181AnalysisKey MachineUniformityAnalysis::Key;

182

189 .getManager();

193 TTI.hasBranchDivergence(&F));

194}

195

200 OS << "MachineUniformityInfo for function: ";

202 OS << '\n';

203 MUI.print(OS);

205}

206

208

213

215 "Machine Uniformity Info Analysis", false, true)

219 "Machine Uniformity Info Analysis", false, true)

220

222 AU.setPreservesAll();

226}

227

231

232

234 return false;

235}

236

238 const Module *) const {

239 OS << "MachineUniformityInfo for function: ";

240 UI.getFunction().getFunction().printAsOperand(OS, false);

241 OS << '\n';

242 UI.print(OS);

243}

244

245char MachineUniformityInfoPrinterPass::ID = 0;

246

247MachineUniformityInfoPrinterPass::MachineUniformityInfoPrinterPass()

251}

252

254 "print-machine-uniformity",

255 "Print Machine Uniformity Info Analysis", true, true)

258 "print-machine-uniformity",

259 "Print Machine Uniformity Info Analysis", true, true)

260

261void MachineUniformityInfoPrinterPass::getAnalysisUsage(

263 AU.setPreservesAll();

266}

267

268bool MachineUniformityInfoPrinterPass::runOnMachineFunction(

270 auto &UI = getAnalysis();

271 UI.print(errs());

272 return false;

273}

unsigned const MachineRegisterInfo * MRI

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

Implementation of uniformity analysis.

This file declares a specialization of the GenericSSAContext template class for Machine IR.

Machine IR instance of the generic uniformity analysis.

FunctionAnalysisManager FAM

#define INITIALIZE_PASS_DEPENDENCY(depName)

#define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis)

#define INITIALIZE_PASS_BEGIN(passName, arg, name, cfg, analysis)

This pass exposes codegen information to IR-level passes.

unify loop Fixup each natural loop to have a single exit block

PassT::Result & getResult(IRUnitT &IR, ExtraArgTs... ExtraArgs)

Get the result of an analysis pass for a given IR unit.

Represent the analysis usage information of a pass.

bool contains(const BlockT *Block) const

Return whether Block is contained in the cycle.

Analysis that identifies uniform values in a data-parallel execution.

bool isDivergentUse(const UseT &U) const

bool hasDivergentDefs(const InstructionT &I) const

bool markDefsDivergent(const InstructionT &Instr)

Mark outputs of Instr as divergent.

bool isDivergent(const InstructionT &I) const

void markDivergent(const InstructionT &I)

Examine I for divergent outputs and add to the worklist.

void addUniformOverride(const InstructionT &Instr)

Mark UniVal as a value that is always uniform.

Legacy analysis pass which computes a MachineCycleInfo.

Analysis pass which computes a MachineDominatorTree.

DominatorTree Class - Concrete subclass of DominatorTreeBase that is used to compute a normal dominat...

MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...

MachineFunctionPass(char &ID)

void getAnalysisUsage(AnalysisUsage &AU) const override

getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.

Function & getFunction()

Return the LLVM function that this machine code represents.

Representation of each machine instruction.

MachineOperand class - Representation of each machine instruction operand.

Legacy analysis pass which computes a MachineUniformityInfo.

MachineUniformityAnalysisPass()

Definition MachineUniformityAnalysis.cpp:209

void print(raw_ostream &OS, const Module *M=nullptr) const override

print - Print out the internal state of the pass.

Definition MachineUniformityAnalysis.cpp:237

bool runOnMachineFunction(MachineFunction &F) override

runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...

Definition MachineUniformityAnalysis.cpp:228

void getAnalysisUsage(AnalysisUsage &AU) const override

getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.

Definition MachineUniformityAnalysis.cpp:221

Result run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM)

Definition MachineUniformityAnalysis.cpp:184

MachineUniformityInfo Result

PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM)

Definition MachineUniformityAnalysis.cpp:197

A Module instance is used to store all the information related to an LLVM module.

static LLVM_ABI PassRegistry * getPassRegistry()

getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...

AnalysisType & getAnalysis() const

getAnalysis() - This function is used by subclasses to get to the analysis information ...

A set of analyses that are preserved following a run of a transformation pass.

static PreservedAnalyses all()

Construct a special preserved set that preserves all passes.

Wrapper class representing virtual and physical registers.

Analysis pass providing the TargetTransformInfo.

LLVM_ABI void printAsOperand(raw_ostream &O, bool PrintType=true, const Module *M=nullptr) const

Print the name of this Value out to the specified raw_ostream.

This class implements an extremely fast bulk output stream that can only output to a stream.

unsigned ID

LLVM IR allows to use arbitrary numbers as calling convention identifiers.

NodeAddr< DefNode * > Def

NodeAddr< InstrNode * > Instr

This is an optimization pass for GlobalISel generic memory operations.

GenericUniformityInfo< MachineSSAContext > MachineUniformityInfo

LLVM_ABI void initializeMachineUniformityAnalysisPassPass(PassRegistry &)

AnalysisManager< MachineFunction > MachineFunctionAnalysisManager

LLVM_ABI raw_fd_ostream & errs()

This returns a reference to a raw_ostream for standard error.

DWARFExpression::Operation Op

MachineUniformityInfo computeMachineUniformityInfo(MachineFunction &F, const MachineCycleInfo &cycleInfo, const MachineDominatorTree &domTree, bool HasBranchDivergence)

Compute uniformity information for a Machine IR function.

Definition MachineUniformityAnalysis.cpp:157

@ AlwaysUniform

The result values are always uniform.

@ NeverUniform

The result values can never be assumed to be uniform.

GenericCycleInfo< MachineSSAContext > MachineCycleInfo

MachineCycleInfo::CycleT MachineCycle

LLVM_ABI void initializeMachineUniformityInfoPrinterPassPass(PassRegistry &)

A special type used by analysis passes to provide an address that identifies that particular analysis...