LLVM: lib/Target/Mips/Mips16ISelLowering.cpp Source File (original) (raw)

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22using namespace llvm;

23

24#define DEBUG_TYPE "mips-lower"

25

27 "mips16-dont-expand-cond-pseudo",

29 cl::desc("Don't expand conditional move related "

30 "pseudos for Mips 16"),

32

33namespace {

34struct Mips16IntrinsicHelperType{

35 const char* Name;

36 const char* Helper;

37

38 bool operator<(const Mips16IntrinsicHelperType &RHS) const {

39 return std::strcmp(Name, RHS.Name) < 0;

40 }

41 bool operator==(const Mips16IntrinsicHelperType &RHS) const {

42 return std::strcmp(Name, RHS.Name) == 0;

43 }

44};

45}

46

48 {"__fixunsdfsi", "__mips16_call_stub_2" },

49 {"ceil", "__mips16_call_stub_df_2"},

50 {"ceilf", "__mips16_call_stub_sf_1"},

51 {"copysign", "__mips16_call_stub_df_10"},

52 {"copysignf", "__mips16_call_stub_sf_5"},

53 {"cos", "__mips16_call_stub_df_2"},

54 {"cosf", "__mips16_call_stub_sf_1"},

55 {"exp2", "__mips16_call_stub_df_2"},

56 {"exp2f", "__mips16_call_stub_sf_1"},

57 {"floor", "__mips16_call_stub_df_2"},

58 {"floorf", "__mips16_call_stub_sf_1"},

59 {"log2", "__mips16_call_stub_df_2"},

60 {"log2f", "__mips16_call_stub_sf_1"},

61 {"nearbyint", "__mips16_call_stub_df_2"},

62 {"nearbyintf", "__mips16_call_stub_sf_1"},

63 {"rint", "__mips16_call_stub_df_2"},

64 {"rintf", "__mips16_call_stub_sf_1"},

65 {"sin", "__mips16_call_stub_df_2"},

66 {"sinf", "__mips16_call_stub_sf_1"},

67 {"sqrt", "__mips16_call_stub_df_2"},

68 {"sqrtf", "__mips16_call_stub_sf_1"},

69 {"trunc", "__mips16_call_stub_df_2"},

70 {"truncf", "__mips16_call_stub_sf_1"},

71};

72

101

107

112

116 switch (MI.getOpcode()) {

117 default:

119 case Mips::SelBeqZ:

120 return emitSel16(Mips::BeqzRxImm16, MI, BB);

121 case Mips::SelBneZ:

122 return emitSel16(Mips::BnezRxImm16, MI, BB);

123 case Mips::SelTBteqZCmpi:

124 return emitSeliT16(Mips::Bteqz16, Mips::CmpiRxImmX16, MI, BB);

125 case Mips::SelTBteqZSlti:

126 return emitSeliT16(Mips::Bteqz16, Mips::SltiRxImmX16, MI, BB);

127 case Mips::SelTBteqZSltiu:

128 return emitSeliT16(Mips::Bteqz16, Mips::SltiuRxImmX16, MI, BB);

129 case Mips::SelTBtneZCmpi:

130 return emitSeliT16(Mips::Btnez16, Mips::CmpiRxImmX16, MI, BB);

131 case Mips::SelTBtneZSlti:

132 return emitSeliT16(Mips::Btnez16, Mips::SltiRxImmX16, MI, BB);

133 case Mips::SelTBtneZSltiu:

134 return emitSeliT16(Mips::Btnez16, Mips::SltiuRxImmX16, MI, BB);

135 case Mips::SelTBteqZCmp:

136 return emitSelT16(Mips::Bteqz16, Mips::CmpRxRy16, MI, BB);

137 case Mips::SelTBteqZSlt:

138 return emitSelT16(Mips::Bteqz16, Mips::SltRxRy16, MI, BB);

139 case Mips::SelTBteqZSltu:

140 return emitSelT16(Mips::Bteqz16, Mips::SltuRxRy16, MI, BB);

141 case Mips::SelTBtneZCmp:

142 return emitSelT16(Mips::Btnez16, Mips::CmpRxRy16, MI, BB);

143 case Mips::SelTBtneZSlt:

144 return emitSelT16(Mips::Btnez16, Mips::SltRxRy16, MI, BB);

145 case Mips::SelTBtneZSltu:

146 return emitSelT16(Mips::Btnez16, Mips::SltuRxRy16, MI, BB);

147 case Mips::BteqzT8CmpX16:

148 return emitFEXT_T8I816_ins(Mips::Bteqz16, Mips::CmpRxRy16, MI, BB);

149 case Mips::BteqzT8SltX16:

150 return emitFEXT_T8I816_ins(Mips::Bteqz16, Mips::SltRxRy16, MI, BB);

151 case Mips::BteqzT8SltuX16:

152

153

154 return emitFEXT_T8I816_ins(Mips::Bteqz16, Mips::SltuRxRy16, MI, BB);

155 case Mips::BtnezT8CmpX16:

156 return emitFEXT_T8I816_ins(Mips::Btnez16, Mips::CmpRxRy16, MI, BB);

157 case Mips::BtnezT8SltX16:

158 return emitFEXT_T8I816_ins(Mips::Btnez16, Mips::SltRxRy16, MI, BB);

159 case Mips::BtnezT8SltuX16:

160

161

162 return emitFEXT_T8I816_ins(Mips::Btnez16, Mips::SltuRxRy16, MI, BB);

163 case Mips::BteqzT8CmpiX16: return emitFEXT_T8I8I16_ins(

164 Mips::Bteqz16, Mips::CmpiRxImm16, Mips::CmpiRxImmX16, false, MI, BB);

165 case Mips::BteqzT8SltiX16: return emitFEXT_T8I8I16_ins(

166 Mips::Bteqz16, Mips::SltiRxImm16, Mips::SltiRxImmX16, true, MI, BB);

167 case Mips::BteqzT8SltiuX16: return emitFEXT_T8I8I16_ins(

168 Mips::Bteqz16, Mips::SltiuRxImm16, Mips::SltiuRxImmX16, false, MI, BB);

169 case Mips::BtnezT8CmpiX16: return emitFEXT_T8I8I16_ins(

170 Mips::Btnez16, Mips::CmpiRxImm16, Mips::CmpiRxImmX16, false, MI, BB);

171 case Mips::BtnezT8SltiX16: return emitFEXT_T8I8I16_ins(

172 Mips::Btnez16, Mips::SltiRxImm16, Mips::SltiRxImmX16, true, MI, BB);

173 case Mips::BtnezT8SltiuX16: return emitFEXT_T8I8I16_ins(

174 Mips::Btnez16, Mips::SltiuRxImm16, Mips::SltiuRxImmX16, false, MI, BB);

175 break;

176 case Mips::SltCCRxRy16:

177 return emitFEXT_CCRX16_ins(Mips::SltRxRy16, MI, BB);

178 break;

179 case Mips::SltiCCRxImmX16:

180 return emitFEXT_CCRXI16_ins

181 (Mips::SltiRxImm16, Mips::SltiRxImmX16, MI, BB);

182 case Mips::SltiuCCRxImmX16:

183 return emitFEXT_CCRXI16_ins

184 (Mips::SltiuRxImm16, Mips::SltiuRxImmX16, MI, BB);

185 case Mips::SltuCCRxRy16:

186 return emitFEXT_CCRX16_ins

187 (Mips::SltuRxRy16, MI, BB);

188 }

189}

190

191bool Mips16TargetLowering::isEligibleForTailCallOptimization(

192 const CCState &CCInfo, unsigned NextStackOffset,

194

195 return false;

196}

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229unsigned int Mips16TargetLowering::getMips16HelperFunctionStubNumber

230 (ArgListTy &Args) const {

231 unsigned int resultNum = 0;

232 if (Args.size() >= 1) {

233 Type *t = Args[0].Ty;

235 resultNum = 1;

236 }

238 resultNum = 2;

239 }

240 }

241 if (resultNum) {

242 if (Args.size() >=2) {

245 resultNum += 4;

246 }

248 resultNum += 8;

249 }

250 }

251 }

252 return resultNum;

253}

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279#define P_ "__mips16_call_stub_"

280#define MAX_STUB_NUMBER 10

281#define T1 P "1", P "2", 0, 0, P "5", P "6", 0, 0, P "9", P "10"

282#define T P "0" , T1

283#define P P_

286#undef P

287#define P P_ "sf_"

290#undef P

291#define P P_ "df_"

294#undef P

295#define P P_ "sc_"

298#undef P

299#define P P_ "dc_"

302#undef P

303#undef P_

304

305

306const char* Mips16TargetLowering::

307 getMips16HelperFunction

308 (Type* RetTy, ArgListTy &Args, bool &needHelper) const {

309 const unsigned int stubNum = getMips16HelperFunctionStubNumber(Args);

310#ifndef NDEBUG

311 const unsigned int maxStubNum = 10;

312 assert(stubNum <= maxStubNum);

313 const bool validStubNum[maxStubNum+1] =

314 {true, true, true, false, false, true, true, false, false, true, true};

315 assert(validStubNum[stubNum]);

316#endif

317 const char *result;

320 }

321 else if (RetTy ->isDoubleTy()) {

324

325 if (SRetTy->getNumElements() == 2) {

326 if ((SRetTy->getElementType(0)->isFloatTy()) &&

327 (SRetTy->getElementType(1)->isFloatTy())) {

329 } else if ((SRetTy->getElementType(0)->isDoubleTy()) &&

330 (SRetTy->getElementType(1)->isDoubleTy())) {

332 } else {

334 }

335 } else {

337 }

338 } else {

339 if (stubNum == 0) {

340 needHelper = false;

341 return "";

342 }

344 }

345 needHelper = true;

346 return result;

347}

348

350

353 return !ParsedLibcalls.empty() &&

355 *ParsedLibcalls.begin());

356}

357

358void Mips16TargetLowering::

360 std::deque< std::pair<unsigned, SDValue> > &RegsToPass,

361 bool IsPICCall, bool GlobalOrExternal, bool InternalLinkage,

362 bool IsCallReloc, CallLoweringInfo &CLI, SDValue Callee,

364 SelectionDAG &DAG = CLI.DAG;

366 MipsFunctionInfo *FuncInfo = MF.getInfo();

367 const char* Mips16HelperFunction = nullptr;

368 bool NeedMips16Helper = false;

369

370 if (Subtarget.inMips16HardFloat()) {

371

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376 bool LookupHelper = true;

379 LookupHelper = false;

380 else {

381 const char *Symbol = S->getSymbol();

382 Mips16IntrinsicHelperType IntrinsicFind = { Symbol, "" };

383 const Mips16HardFloatInfo::FuncSignature *Signature =

385 if (!IsPICCall && Signature &&

386 FuncInfo->StubsNeeded.try_emplace(Symbol, Signature).second) {

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402 }

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404 const Mips16IntrinsicHelperType *Helper =

407 *Helper == IntrinsicFind) {

408 Mips16HelperFunction = Helper->Helper;

409 NeedMips16Helper = true;

410 LookupHelper = false;

411 }

412

413 }

414 } else if (GlobalAddressSDNode *G =

416

418 LookupHelper = false;

419 }

420 if (LookupHelper)

421 Mips16HelperFunction =

422 getMips16HelperFunction(CLI.RetTy, CLI.getArgs(), NeedMips16Helper);

423 }

424

426

427

428

429 if (IsPICCall || !GlobalOrExternal) {

430 unsigned V0Reg = Mips::V0;

431 if (NeedMips16Helper) {

432 RegsToPass.push_front(std::make_pair(V0Reg, Callee));

439 } else

440 RegsToPass.push_front(std::make_pair((unsigned)Mips::T9, Callee));

441 }

442

443 Ops.push_back(JumpTarget);

444

446 InternalLinkage, IsCallReloc, CLI, Callee,

447 Chain);

448}

449

454 return BB;

455 const TargetInstrInfo *TII = Subtarget.getInstrInfo();

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470 MachineBasicBlock *thisMBB = BB;

471 MachineFunction *F = BB->getParent();

473 MachineBasicBlock *sinkMBB = F->CreateMachineBasicBlock(LLVM_BB);

475 F->insert(It, sinkMBB);

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487 .addReg(MI.getOperand(3).getReg())

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493 BB = copy0MBB;

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501 BB = sinkMBB;

502

504 .addReg(MI.getOperand(1).getReg())

506 .addReg(MI.getOperand(2).getReg())

508

509 MI.eraseFromParent();

510 return BB;

511}

512

514Mips16TargetLowering::emitSelT16(unsigned Opc1, unsigned Opc2, MachineInstr &MI,

517 return BB;

518 const TargetInstrInfo *TII = Subtarget.getInstrInfo();

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533 MachineBasicBlock *thisMBB = BB;

534 MachineFunction *F = BB->getParent();

535 MachineBasicBlock *copy0MBB = F->CreateMachineBasicBlock(LLVM_BB);

536 MachineBasicBlock *sinkMBB = F->CreateMachineBasicBlock(LLVM_BB);

538 F->insert(It, sinkMBB);

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550 .addReg(MI.getOperand(3).getReg())

551 .addReg(MI.getOperand(4).getReg());

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557 BB = copy0MBB;

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565 BB = sinkMBB;

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568 .addReg(MI.getOperand(1).getReg())

570 .addReg(MI.getOperand(2).getReg())

572

573 MI.eraseFromParent();

574 return BB;

575

576}

577

579Mips16TargetLowering::emitSeliT16(unsigned Opc1, unsigned Opc2,

583 return BB;

584 const TargetInstrInfo *TII = Subtarget.getInstrInfo();

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599 MachineBasicBlock *thisMBB = BB;

600 MachineFunction *F = BB->getParent();

601 MachineBasicBlock *copy0MBB = F->CreateMachineBasicBlock(LLVM_BB);

602 MachineBasicBlock *sinkMBB = F->CreateMachineBasicBlock(LLVM_BB);

604 F->insert(It, sinkMBB);

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616 .addReg(MI.getOperand(3).getReg())

617 .addImm(MI.getOperand(4).getImm());

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623 BB = copy0MBB;

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631 BB = sinkMBB;

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634 .addReg(MI.getOperand(1).getReg())

636 .addReg(MI.getOperand(2).getReg())

638

639 MI.eraseFromParent();

640 return BB;

641

642}

643

645Mips16TargetLowering::emitFEXT_T8I816_ins(unsigned BtOpc, unsigned CmpOpc,

649 return BB;

650 const TargetInstrInfo *TII = Subtarget.getInstrInfo();

651 Register regX = MI.getOperand(0).getReg();

652 Register regY = MI.getOperand(1).getReg();

653 MachineBasicBlock *target = MI.getOperand(2).getMBB();

658 MI.eraseFromParent();

659 return BB;

660}

661

663 unsigned BtOpc, unsigned CmpiOpc, unsigned CmpiXOpc, bool ImmSigned,

666 return BB;

667 const TargetInstrInfo *TII = Subtarget.getInstrInfo();

668 Register regX = MI.getOperand(0).getReg();

669 int64_t imm = MI.getOperand(1).getImm();

670 MachineBasicBlock *target = MI.getOperand(2).getMBB();

671 unsigned CmpOpc;

673 CmpOpc = CmpiOpc;

674 else if ((!ImmSigned && isUInt<16>(imm)) ||

676 CmpOpc = CmpiXOpc;

677 else

681 MI.eraseFromParent();

682 return BB;

683}

684

686 (unsigned shortOp, unsigned longOp, int64_t Imm) {

688 return shortOp;

690 return longOp;

691 else

693}

694

696Mips16TargetLowering::emitFEXT_CCRX16_ins(unsigned SltOpc, MachineInstr &MI,

699 return BB;

700 const TargetInstrInfo *TII = Subtarget.getInstrInfo();

701 Register CC = MI.getOperand(0).getReg();

702 Register regX = MI.getOperand(1).getReg();

703 Register regY = MI.getOperand(2).getReg();

707 BuildMI(*BB, MI, MI.getDebugLoc(), TII->get(Mips::MoveR3216), CC)

709 MI.eraseFromParent();

710 return BB;

711}

712

714Mips16TargetLowering::emitFEXT_CCRXI16_ins(unsigned SltiOpc, unsigned SltiXOpc,

718 return BB;

719 const TargetInstrInfo *TII = Subtarget.getInstrInfo();

720 Register CC = MI.getOperand(0).getReg();

721 Register regX = MI.getOperand(1).getReg();

722 int64_t Imm = MI.getOperand(2).getImm();

725 BuildMI(*BB, MI, MI.getDebugLoc(), TII->get(Mips::MoveR3216), CC)

727 MI.eraseFromParent();

728 return BB;

729

730}

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

const TargetInstrInfo & TII

MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL

const AbstractManglingParser< Derived, Alloc >::OperatorInfo AbstractManglingParser< Derived, Alloc >::Ops[]

Promote Memory to Register

static char const * vMips16Helper[MAX_STUB_NUMBER+1]

Definition Mips16ISelLowering.cpp:284

#define T

Definition Mips16ISelLowering.cpp:282

static char const * dcMips16Helper[MAX_STUB_NUMBER+1]

Definition Mips16ISelLowering.cpp:300

static cl::opt< bool > DontExpandCondPseudos16("mips16-dont-expand-cond-pseudo", cl::init(false), cl::desc("Don't expand conditional move related " "pseudos for Mips 16"), cl::Hidden)

static char const * dfMips16Helper[MAX_STUB_NUMBER+1]

Definition Mips16ISelLowering.cpp:292

static const Mips16IntrinsicHelperType Mips16IntrinsicHelper[]

Definition Mips16ISelLowering.cpp:47

#define MAX_STUB_NUMBER

Definition Mips16ISelLowering.cpp:280

static char const * sfMips16Helper[MAX_STUB_NUMBER+1]

Definition Mips16ISelLowering.cpp:288

#define T1

Definition Mips16ISelLowering.cpp:281

static unsigned Mips16WhichOp8uOr16simm(unsigned shortOp, unsigned longOp, int64_t Imm)

Definition Mips16ISelLowering.cpp:686

static char const * scMips16Helper[MAX_STUB_NUMBER+1]

Definition Mips16ISelLowering.cpp:296

static bool isMips16HardFloatLibcall(StringRef Name)

Definition Mips16ISelLowering.cpp:349

CCState - This class holds information needed while lowering arguments and return values.

const char * getSymbol() const

const MCInstrDesc & get(unsigned Opcode) const

Return the machine instruction descriptor that corresponds to the specified instruction opcode.

LLVM_ABI void transferSuccessorsAndUpdatePHIs(MachineBasicBlock *FromMBB)

Transfers all the successors, as in transferSuccessors, and update PHI operands in the successor bloc...

LLVM_ABI instr_iterator insert(instr_iterator I, MachineInstr *M)

Insert MI into the instruction list before I, possibly inside a bundle.

const BasicBlock * getBasicBlock() const

Return the LLVM basic block that this instance corresponded to originally.

LLVM_ABI void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())

Add Succ as a successor of this MachineBasicBlock.

const MachineFunction * getParent() const

Return the MachineFunction containing this basic block.

void splice(iterator Where, MachineBasicBlock *Other, iterator From)

Take an instruction from MBB 'Other' at the position From, and insert it into this MBB right before '...

MachineInstrBundleIterator< MachineInstr > iterator

BasicBlockListType::iterator iterator

Ty * getInfo()

getInfo - Keep track of various per-function pieces of information for backends that would like to do...

MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *BB=nullptr, std::optional< UniqueBBID > BBID=std::nullopt)

CreateMachineInstr - Allocate a new MachineInstr.

const MachineInstrBuilder & addImm(int64_t Val) const

Add a new immediate operand.

const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const

Add a new virtual register operand.

const MachineInstrBuilder & addMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0) const

Representation of each machine instruction.

Flags

Flags values. These may be or'd together.

MachineBasicBlock * EmitInstrWithCustomInserter(MachineInstr &MI, MachineBasicBlock *MBB) const override

This method should be implemented by targets that mark instructions with the 'usesCustomInserter' fla...

Definition Mips16ISelLowering.cpp:114

Mips16TargetLowering(const MipsTargetMachine &TM, const MipsSubtarget &STI)

Definition Mips16ISelLowering.cpp:73

bool allowsMisalignedMemoryAccesses(EVT VT, unsigned AddrSpace, Align Alignment, MachineMemOperand::Flags Flags, unsigned *Fast) const override

Determine if the target supports unaligned memory accesses.

Definition Mips16ISelLowering.cpp:108

MipsFunctionInfo - This class is derived from MachineFunction private Mips target-specific informatio...

MachinePointerInfo callPtrInfo(MachineFunction &MF, const char *ES)

Create a MachinePointerInfo that has an ExternalSymbolPseudoSourceValue object representing a GOT ent...

std::map< const char *, const Mips16HardFloatInfo::FuncSignature * > StubsNeeded

const MipsRegisterInfo * getRegisterInfo() const override

static const RTLIB::LibcallImpl HardFloatLibCalls[34]

SDValue getAddrGlobal(NodeTy *N, const SDLoc &DL, EVT Ty, SelectionDAG &DAG, unsigned Flag, SDValue Chain, const MachinePointerInfo &PtrInfo) const

MipsTargetLowering(const MipsTargetMachine &TM, const MipsSubtarget &STI)

MachineBasicBlock * EmitInstrWithCustomInserter(MachineInstr &MI, MachineBasicBlock *MBB) const override

This method should be implemented by targets that mark instructions with the 'usesCustomInserter' fla...

virtual void getOpndList(SmallVectorImpl< SDValue > &Ops, std::deque< std::pair< unsigned, SDValue > > &RegsToPass, bool IsPICCall, bool GlobalOrExternal, bool InternalLinkage, bool IsCallReloc, CallLoweringInfo &CLI, SDValue Callee, SDValue Chain) const

This function fills Ops, which is the list of operands that will later be used when a function call n...

const MipsSubtarget & Subtarget

Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.

EVT getValueType() const

Return the ValueType of the referenced return value.

const DataLayout & getDataLayout() const

LLVM_ABI SDValue getExternalSymbol(const char *Sym, EVT VT)

MachineFunction & getMachineFunction() const

This class consists of common code factored out of the SmallVector class to reduce code duplication b...

StringRef - Represent a constant reference to a string, i.e.

void setOperationAction(unsigned Op, MVT VT, LegalizeAction Action)

Indicate that the specified operation does not work with the specified type and indicate what to do a...

void computeRegisterProperties(const TargetRegisterInfo *TRI)

Once all of the register classes are added, this allows us to compute derived properties we expose.

void addRegisterClass(MVT VT, const TargetRegisterClass *RC)

Add the specified register class as an available regclass for the specified value type.

virtual MVT getPointerTy(const DataLayout &DL, uint32_t AS=0) const

Return the pointer type for the given address space, defaults to the pointer type from the data layou...

The instances of the Type class are immutable: once they are created, they are never changed.

bool isFloatTy() const

Return true if this is 'float', a 32-bit IEEE fp type.

bool isDoubleTy() const

Return true if this is 'double', a 64-bit IEEE fp type.

self_iterator getIterator()

#define llvm_unreachable(msg)

Marks that the current location is not supposed to be reachable.

constexpr char Args[]

Key for Kernel::Metadata::mArgs.

@ Fast

Attempts to make calls as fast as possible (e.g.

@ BSWAP

Byte Swap and Counting operators.

@ BasicBlock

Various leaf nodes.

FuncSignature const * findFuncSignature(const char *name)

initializer< Ty > init(const Ty &Val)

This is an optimization pass for GlobalISel generic memory operations.

bool operator<(int64_t V1, const APSInt &V2)

MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)

Builder interface. Specify how to create the initial instruction itself.

constexpr bool isInt(int64_t x)

Checks if an integer fits into the given bit width.

decltype(auto) dyn_cast(const From &Val)

dyn_cast - Return the argument parameter cast to the specified type.

auto binary_search(R &&Range, T &&Value)

Provide wrappers to std::binary_search which take ranges instead of having to pass begin/end explicit...

bool operator==(const AddressRangeValuePair &LHS, const AddressRangeValuePair &RHS)

constexpr bool isUInt(uint64_t x)

Checks if an unsigned integer fits into the given bit width.

const MipsTargetLowering * createMips16TargetLowering(const MipsTargetMachine &TM, const MipsSubtarget &STI)

Create MipsTargetLowering objects.

Definition Mips16ISelLowering.cpp:103

auto lower_bound(R &&Range, T &&Value)

Provide wrappers to std::lower_bound which take ranges instead of having to pass begin/end explicitly...

decltype(auto) cast(const From &Val)

cast - Return the argument parameter cast to the specified type.

This struct is a compact representation of a valid (non-zero power of two) alignment.

static LLVM_ABI iota_range< RTLIB::LibcallImpl > lookupLibcallImplName(StringRef Name)

Check if a function name is a recognized runtime call of any kind.