MipsAsmBackend.cpp Source File (original) (raw)

32using namespace llvm;

38 unsigned Kind = Fixup.getKind();

41 switch (Kind) {

42 default:

43 return 0;

62 break;

72 break;

78 if (!isInt<16>(Value)) {

80 return 0;

81 }

82 break;

88 if (!isInt<19>(Value)) {

90 return 0;

91 }

92 break;

98 break;

106

107 Value = ((Value + 0x8000) >> 16) & 0xffff;

108 break;

111

112 Value = ((Value + 0x80008000LL) >> 32) & 0xffff;

113 break;

116

117 Value = ((Value + 0x800080008000LL) >> 48) & 0xffff;

118 break;

121 break;

124

126

127 if (!isInt<7>(Value)) {

129 return 0;

130 }

131 break;

134

136

137 if (!isInt<10>(Value)) {

139 return 0;

140 }

141 break;

144

146

147 if (!isInt<16>(Value)) {

149 return 0;

150 }

151 break;

153

155

156 if (!isInt<18>(Value)) {

158 return 0;

159 }

160 break;

162

163 if ((Value & 7)) {

165 }

166

168

169 if (!isInt<18>(Value)) {

171 return 0;

172 }

173 break;

175

177

178 if (!isInt<21>(Value)) {

180 return 0;

181 }

182 break;

184

186

187 if (!isInt<26>(Value)) {

189 return 0;

190 }

191 break;

193

195

196 if (!isInt<26>(Value)) {

198 return 0;

199 }

200 break;

202

204

205 if (!isInt<21>(Value)) {

207 return 0;

208 }

209 break;

210 }

211

213}

214

215std::unique_ptr

218}

219

220

221

222

223

228}

229

230

232 assert(i <= 3 && "Index out of range!");

233

234 return (1 - i / 2) * 2 + i % 2;

235}

236

237

238

239

243 bool IsResolved,

246 MCContext &Ctx = Asm.getContext();

248

250 return;

251

252

254

256

257 unsigned FullSize;

258

259 switch ((unsigned)Kind) {

263 FullSize = 2;

264 break;

267 FullSize = 8;

268 break;

270 default:

271 FullSize = 4;

272 break;

273 }

274

275

277

279

280 for (unsigned i = 0; i != NumBytes; ++i) {

283 : (FullSize - 1 - i);

285 }

286

289 CurVal |= Value & Mask;

290

291

292 for (unsigned i = 0; i != NumBytes; ++i) {

295 : (FullSize - 1 - i);

297 }

298}

299

302 .Case("BFD_RELOC_NONE", ELF::R_MIPS_NONE)

303 .Case("BFD_RELOC_16", ELF::R_MIPS_16)

304 .Case("BFD_RELOC_32", ELF::R_MIPS_32)

305 .Case("BFD_RELOC_64", ELF::R_MIPS_64)

307 if (Type != -1u)

309

311 .Case("R_MIPS_NONE", FK_NONE)

334 .Case("R_MICROMIPS_TLS_GOTTPREL",

336 .Case("R_MICROMIPS_TLS_DTPREL_HI16",

338 .Case("R_MICROMIPS_TLS_DTPREL_LO16",

342 .Case("R_MICROMIPS_TLS_TPREL_HI16",

344 .Case("R_MICROMIPS_TLS_TPREL_LO16",

349}

350

354

355

356

357

358 { "fixup_Mips_16", 0, 16, 0 },

359 { "fixup_Mips_32", 0, 32, 0 },

360 { "fixup_Mips_REL32", 0, 32, 0 },

361 { "fixup_Mips_26", 0, 26, 0 },

362 { "fixup_Mips_HI16", 0, 16, 0 },

363 { "fixup_Mips_LO16", 0, 16, 0 },

364 { "fixup_Mips_GPREL16", 0, 16, 0 },

365 { "fixup_Mips_LITERAL", 0, 16, 0 },

366 { "fixup_Mips_GOT", 0, 16, 0 },

368 { "fixup_Mips_CALL16", 0, 16, 0 },

369 { "fixup_Mips_GPREL32", 0, 32, 0 },

370 { "fixup_Mips_SHIFT5", 6, 5, 0 },

371 { "fixup_Mips_SHIFT6", 6, 5, 0 },

372 { "fixup_Mips_64", 0, 64, 0 },

373 { "fixup_Mips_TLSGD", 0, 16, 0 },

374 { "fixup_Mips_GOTTPREL", 0, 16, 0 },

375 { "fixup_Mips_TPREL_HI", 0, 16, 0 },

376 { "fixup_Mips_TPREL_LO", 0, 16, 0 },

377 { "fixup_Mips_TLSLDM", 0, 16, 0 },

378 { "fixup_Mips_DTPREL_HI", 0, 16, 0 },

379 { "fixup_Mips_DTPREL_LO", 0, 16, 0 },

381 { "fixup_Mips_GPOFF_HI", 0, 16, 0 },

382 { "fixup_MICROMIPS_GPOFF_HI",0, 16, 0 },

383 { "fixup_Mips_GPOFF_LO", 0, 16, 0 },

384 { "fixup_MICROMIPS_GPOFF_LO",0, 16, 0 },

385 { "fixup_Mips_GOT_PAGE", 0, 16, 0 },

386 { "fixup_Mips_GOT_OFST", 0, 16, 0 },

387 { "fixup_Mips_GOT_DISP", 0, 16, 0 },

388 { "fixup_Mips_HIGHER", 0, 16, 0 },

389 { "fixup_MICROMIPS_HIGHER", 0, 16, 0 },

390 { "fixup_Mips_HIGHEST", 0, 16, 0 },

391 { "fixup_MICROMIPS_HIGHEST", 0, 16, 0 },

392 { "fixup_Mips_GOT_HI16", 0, 16, 0 },

393 { "fixup_Mips_GOT_LO16", 0, 16, 0 },

394 { "fixup_Mips_CALL_HI16", 0, 16, 0 },

395 { "fixup_Mips_CALL_LO16", 0, 16, 0 },

402 { "fixup_MICROMIPS_26_S1", 0, 26, 0 },

403 { "fixup_MICROMIPS_HI16", 0, 16, 0 },

404 { "fixup_MICROMIPS_LO16", 0, 16, 0 },

405 { "fixup_MICROMIPS_GOT16", 0, 16, 0 },

413 { "fixup_MICROMIPS_CALL16", 0, 16, 0 },

414 { "fixup_MICROMIPS_GOT_DISP", 0, 16, 0 },

415 { "fixup_MICROMIPS_GOT_PAGE", 0, 16, 0 },

416 { "fixup_MICROMIPS_GOT_OFST", 0, 16, 0 },

417 { "fixup_MICROMIPS_TLS_GD", 0, 16, 0 },

418 { "fixup_MICROMIPS_TLS_LDM", 0, 16, 0 },

419 { "fixup_MICROMIPS_TLS_DTPREL_HI16", 0, 16, 0 },

420 { "fixup_MICROMIPS_TLS_DTPREL_LO16", 0, 16, 0 },

421 { "fixup_MICROMIPS_GOTTPREL", 0, 16, 0 },

422 { "fixup_MICROMIPS_TLS_TPREL_HI16", 0, 16, 0 },

423 { "fixup_MICROMIPS_TLS_TPREL_LO16", 0, 16, 0 },

424 { "fixup_Mips_SUB", 0, 64, 0 },

425 { "fixup_MICROMIPS_SUB", 0, 64, 0 },

426 { "fixup_Mips_JALR", 0, 32, 0 },

427 { "fixup_MICROMIPS_JALR", 0, 32, 0 }

428 };

430 "Not all MIPS little endian fixup kinds added!");

431

433

434

435

436

437 { "fixup_Mips_16", 16, 16, 0 },

438 { "fixup_Mips_32", 0, 32, 0 },

439 { "fixup_Mips_REL32", 0, 32, 0 },

440 { "fixup_Mips_26", 6, 26, 0 },

441 { "fixup_Mips_HI16", 16, 16, 0 },

442 { "fixup_Mips_LO16", 16, 16, 0 },

443 { "fixup_Mips_GPREL16", 16, 16, 0 },

444 { "fixup_Mips_LITERAL", 16, 16, 0 },

445 { "fixup_Mips_GOT", 16, 16, 0 },

447 { "fixup_Mips_CALL16", 16, 16, 0 },

448 { "fixup_Mips_GPREL32", 0, 32, 0 },

449 { "fixup_Mips_SHIFT5", 21, 5, 0 },

450 { "fixup_Mips_SHIFT6", 21, 5, 0 },

451 { "fixup_Mips_64", 0, 64, 0 },

452 { "fixup_Mips_TLSGD", 16, 16, 0 },

453 { "fixup_Mips_GOTTPREL", 16, 16, 0 },

454 { "fixup_Mips_TPREL_HI", 16, 16, 0 },

455 { "fixup_Mips_TPREL_LO", 16, 16, 0 },

456 { "fixup_Mips_TLSLDM", 16, 16, 0 },

457 { "fixup_Mips_DTPREL_HI", 16, 16, 0 },

458 { "fixup_Mips_DTPREL_LO", 16, 16, 0 },

460 { "fixup_Mips_GPOFF_HI", 16, 16, 0 },

461 { "fixup_MICROMIPS_GPOFF_HI", 16, 16, 0 },

462 { "fixup_Mips_GPOFF_LO", 16, 16, 0 },

463 { "fixup_MICROMIPS_GPOFF_LO", 16, 16, 0 },

464 { "fixup_Mips_GOT_PAGE", 16, 16, 0 },

465 { "fixup_Mips_GOT_OFST", 16, 16, 0 },

466 { "fixup_Mips_GOT_DISP", 16, 16, 0 },

467 { "fixup_Mips_HIGHER", 16, 16, 0 },

468 { "fixup_MICROMIPS_HIGHER", 16, 16, 0 },

469 { "fixup_Mips_HIGHEST", 16, 16, 0 },

470 { "fixup_MICROMIPS_HIGHEST",16, 16, 0 },

471 { "fixup_Mips_GOT_HI16", 16, 16, 0 },

472 { "fixup_Mips_GOT_LO16", 16, 16, 0 },

473 { "fixup_Mips_CALL_HI16", 16, 16, 0 },

474 { "fixup_Mips_CALL_LO16", 16, 16, 0 },

481 { "fixup_MICROMIPS_26_S1", 6, 26, 0 },

482 { "fixup_MICROMIPS_HI16", 16, 16, 0 },

483 { "fixup_MICROMIPS_LO16", 16, 16, 0 },

484 { "fixup_MICROMIPS_GOT16", 16, 16, 0 },

492 { "fixup_MICROMIPS_CALL16", 16, 16, 0 },

493 { "fixup_MICROMIPS_GOT_DISP", 16, 16, 0 },

494 { "fixup_MICROMIPS_GOT_PAGE", 16, 16, 0 },

495 { "fixup_MICROMIPS_GOT_OFST", 16, 16, 0 },

496 { "fixup_MICROMIPS_TLS_GD", 16, 16, 0 },

497 { "fixup_MICROMIPS_TLS_LDM", 16, 16, 0 },

498 { "fixup_MICROMIPS_TLS_DTPREL_HI16", 16, 16, 0 },

499 { "fixup_MICROMIPS_TLS_DTPREL_LO16", 16, 16, 0 },

500 { "fixup_MICROMIPS_GOTTPREL", 16, 16, 0 },

501 { "fixup_MICROMIPS_TLS_TPREL_HI16", 16, 16, 0 },

502 { "fixup_MICROMIPS_TLS_TPREL_LO16", 16, 16, 0 },

503 { "fixup_Mips_SUB", 0, 64, 0 },

504 { "fixup_MICROMIPS_SUB", 0, 64, 0 },

505 { "fixup_Mips_JALR", 0, 32, 0 },

506 { "fixup_MICROMIPS_JALR", 0, 32, 0 }

507 };

509 "Not all MIPS big endian fixup kinds added!");

510

515

517 "Invalid kind!");

518

522}

523

524

525

526

527

528

531

532

533

534

535

536

537

539 return true;

540}

541

548 return true;

549 const unsigned FixupKind = Fixup.getKind();

550 switch (FixupKind) {

551 default:

552 return false;

553

554

585 return true;

586 }

587}

588

590 if (const auto *ElfSym = dyn_cast(Sym)) {

592 return true;

593 }

594 return false;

595}

596

597namespace {

598

600public:

604

605 std::unique_ptr

606 createObjectTargetWriter() const override {

608 }

609};

610

611}

612

619 return new WindowsMipsAsmBackend(T, MRI, STI);

620

624 ABI.IsN32());

625}

unsigned const MachineRegisterInfo * MRI

static uint64_t adjustFixupValue(const MCFixup &Fixup, const MCValue &Target, uint64_t Value, MCContext &Ctx, const Triple &TheTriple, bool IsResolved)

Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx

static unsigned adjustFixupValue(const MCFixup &Fixup, uint64_t Value, MCContext &Ctx)

static unsigned calculateMMLEIndex(unsigned i)

static bool needsMMLEByteOrder(unsigned Kind)

PowerPC TLS Dynamic Call Fixup

assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())

This file implements the StringSwitch template, which mimics a switch() statement whose cases are str...

Generic interface to target specific assembler backends.

const llvm::endianness Endian

virtual const MCFixupKindInfo & getFixupKindInfo(MCFixupKind Kind) const

Get information on a fixup kind.

virtual std::optional< MCFixupKind > getFixupKind(StringRef Name) const

Map a relocation name used in .reloc to a fixup kind.

Context object for machine code objects.

void reportError(SMLoc L, const Twine &Msg)

Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...

MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...

Generic base class for all target subtargets.

const Triple & getTargetTriple() const

MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...

This represents an "assembler immediate".

static MipsABIInfo computeTargetABI(const Triple &TT, StringRef CPU, const MCTargetOptions &Options)

unsigned getNumFixupKinds() const override

Get the number of target specific fixup kinds.

bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup, const MCValue &Target, const uint64_t Value, const MCSubtargetInfo *STI) override

Hook to check if a relocation is needed for some target specific reason.

bool writeNopData(raw_ostream &OS, uint64_t Count, const MCSubtargetInfo *STI) const override

WriteNopData - Write an (optimal) nop sequence of Count bytes to the given output.

void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, const MCValue &Target, MutableArrayRef< char > Data, uint64_t Value, bool IsResolved, const MCSubtargetInfo *STI) const override

ApplyFixup - Apply the Value for given Fixup into the provided data fragment, at the offset specified...

std::optional< MCFixupKind > getFixupKind(StringRef Name) const override

Map a relocation name used in .reloc to a fixup kind.

const MCFixupKindInfo & getFixupKindInfo(MCFixupKind Kind) const override

Get information on a fixup kind.

std::unique_ptr< MCObjectTargetWriter > createObjectTargetWriter() const override

bool isMicroMips(const MCSymbol *Sym) const override

Check whether a given symbol has been flagged with MICROMIPS flag.

MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...

StringRef - Represent a constant reference to a string, i.e.

A switch()-like statement whose cases are string literals.

StringSwitch & Case(StringLiteral S, T Value)

Target - Wrapper for Target specific information.

Triple - Helper class for working with autoconf configuration names.

bool isOSBinFormatCOFF() const

Tests whether the OS uses the COFF binary format.

bool isOSWindows() const

Tests whether the OS is Windows.

The instances of the Type class are immutable: once they are created, they are never changed.

LLVM Value Representation.

This class implements an extremely fast bulk output stream that can only output to a stream.

raw_ostream & write_zeros(unsigned NumZeros)

write_zeros - Insert 'NumZeros' nulls.

@ fixup_MICROMIPS_TLS_TPREL_LO16

@ fixup_MICROMIPS_GOT_PAGE

@ fixup_MICROMIPS_PC16_S1

@ fixup_MICROMIPS_TLS_TPREL_HI16

@ fixup_MICROMIPS_PC21_S1

@ fixup_MICROMIPS_GPOFF_LO

@ fixup_MICROMIPS_PC19_S2

@ fixup_MICROMIPS_TLS_LDM

@ fixup_MICROMIPS_GOT_OFST

@ fixup_MICROMIPS_TLS_DTPREL_HI16

@ fixup_MICROMIPS_PC10_S1

@ fixup_MICROMIPS_HIGHEST

@ fixup_MICROMIPS_GOT_DISP

@ fixup_MICROMIPS_PC18_S3

@ fixup_MICROMIPS_PC26_S1

@ fixup_MICROMIPS_GOTTPREL

@ fixup_MICROMIPS_TLS_DTPREL_LO16

@ fixup_MICROMIPS_GPOFF_HI

This is an optimization pass for GlobalISel generic memory operations.

std::unique_ptr< MCObjectTargetWriter > createMipsELFObjectWriter(const Triple &TT, bool IsN32)

Construct a Mips ELF object writer.

static StringRef getCPU(StringRef CPU)

Processes a CPU name.

std::unique_ptr< MCObjectTargetWriter > createMipsWinCOFFObjectWriter()

Construct a Mips Win COFF object writer.

MCFixupKind

Extensible enumeration to represent the type of a fixup.

@ FirstLiteralRelocationKind

The range [FirstLiteralRelocationKind, MaxTargetFixupKind) is used for relocations coming from ....

@ FK_Data_8

A eight-byte fixup.

@ FK_Data_4

A four-byte fixup.

@ FK_DTPRel_4

A four-byte dtp relative fixup.

@ FK_DTPRel_8

A eight-byte dtp relative fixup.

@ FK_TPRel_4

A four-byte tp relative fixup.

@ FK_GPRel_4

A four-byte gp relative fixup.

@ FK_TPRel_8

A eight-byte tp relative fixup.

@ FK_Data_2

A two-byte fixup.

@ Default

The result values are uniform if and only if all operands are uniform.

MCAsmBackend * createMipsAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)

Target independent information on a fixup kind.

@ FKF_IsPCRel

Is this fixup kind PCrelative? This is used by the assembler backend to evaluate fixup values in a ta...

unsigned TargetSize

The number of bits written by this fixup.