LLVM: lib/Target/Mips/MipsMCInstLower.cpp Source File (original) (raw)
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26using namespace llvm;
27
29 : AsmPrinter(asmprinter) {}
30
34
36 MachineOperandType MOTy,
37 int64_t Offset) const {
39 bool IsGpOff = false;
43
45
46 Name += "__imp_";
47 TargetFlags &= ~MipsII::MO_DLLIMPORT;
48 }
49
50 switch (TargetFlags) {
51 default:
54 break;
57 break;
60 break;
63 break;
66 break;
69 break;
72 break;
75 break;
78 break;
81 break;
84 break;
87 break;
90 break;
93 IsGpOff = true;
94 break;
97 IsGpOff = true;
98 break;
101 break;
104 break;
107 break;
110 break;
113 break;
116 break;
119 break;
122 break;
125 break;
128 }
129
130 switch (MOTy) {
133 break;
134
136 AsmPrinter.getNameWithPrefix(Name, MO.getGlobal());
137 Symbol = Ctx->getOrCreateSymbol(Name);
139 break;
140
144 break;
145
149 break;
150
154 break;
155
158 break;
159
163 break;
164
165 default:
167 }
168
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172
174 *Ctx);
175 }
176
177 if (IsGpOff)
181
183}
184
186 int64_t offset) const {
187 MachineOperandType MOTy = MO.getType();
188
189 switch (MOTy) {
192
204 return LowerSymbolOperand(MO, MOTy, offset);
206 break;
207 }
208
210}
211
218
220}
221
222void MipsMCInstLower::
225
226
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230 unsigned TargetFlags = MI->getOperand(1).getTargetFlags();
231 switch (TargetFlags) {
234 break;
237 break;
240 break;
243 break;
244 default:
246 }
247
248 if (MI->getNumOperands() == 2) {
249 const MCExpr *Expr =
253 } else if (MI->getNumOperands() == 3) {
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255 OutMI.addOperand(createSub(MI->getOperand(1).getMBB(),
256 MI->getOperand(2).getMBB(), Spec));
257 }
258}
259
260void MipsMCInstLower::lowerLongBranchADDiu(const MachineInstr *MI,
261 MCInst &OutMI, int Opcode) const {
263
265 unsigned TargetFlags = MI->getOperand(2).getTargetFlags();
266 switch (TargetFlags) {
269 break;
272 break;
275 break;
278 break;
279 default:
281 }
282
283
284 for (unsigned I = 0, E = 2; I != E; ++I) {
285 const MachineOperand &MO = MI->getOperand(I);
287 }
288
289 if (MI->getNumOperands() == 3) {
290
291 const MCExpr *Expr =
295 } else if (MI->getNumOperands() == 4) {
296
297 OutMI.addOperand(createSub(MI->getOperand(2).getMBB(),
298 MI->getOperand(3).getMBB(), Spec));
299 }
300}
301
302bool MipsMCInstLower::lowerLongBranch(const MachineInstr *MI,
303 MCInst &OutMI) const {
304 switch (MI->getOpcode()) {
305 default:
306 return false;
307 case Mips::LONG_BRANCH_LUi:
308 case Mips::LONG_BRANCH_LUi2Op:
309 case Mips::LONG_BRANCH_LUi2Op_64:
310 lowerLongBranchLUi(MI, OutMI);
311 return true;
312 case Mips::LONG_BRANCH_ADDiu:
313 case Mips::LONG_BRANCH_ADDiu2Op:
314 lowerLongBranchADDiu(MI, OutMI, Mips::ADDiu);
315 return true;
316 case Mips::LONG_BRANCH_DADDiu:
317 case Mips::LONG_BRANCH_DADDiu2Op:
318 lowerLongBranchADDiu(MI, OutMI, Mips::DADDiu);
319 return true;
320 }
321}
322
324 if (lowerLongBranch(MI, OutMI))
325 return;
326
328
331
334 }
335}
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
Binary assembler expressions.
static const MCBinaryExpr * createAdd(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx, SMLoc Loc=SMLoc())
static const MCBinaryExpr * createSub(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx)
static LLVM_ABI const MCConstantExpr * create(int64_t Value, MCContext &Ctx, bool PrintInHex=false, unsigned SizeInBytes=0)
Context object for machine code objects.
Instances of this class represent a single low-level machine instruction.
void addOperand(const MCOperand Op)
void setOpcode(unsigned Op)
Instances of this class represent operands of the MCInst class.
static MCOperand createExpr(const MCExpr *Val)
static MCOperand createReg(MCRegister Reg)
static MCOperand createImm(int64_t Val)
static const MCSpecifierExpr * create(const MCExpr *Expr, Spec S, MCContext &Ctx, SMLoc Loc=SMLoc())
Represent a reference to a symbol from inside an expression.
static const MCSymbolRefExpr * create(const MCSymbol *Symbol, MCContext &Ctx, SMLoc Loc=SMLoc())
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
LLVM_ABI MCSymbol * getSymbol() const
Return the MCSymbol for this basic block.
Representation of each machine instruction.
MachineOperand class - Representation of each machine instruction operand.
const GlobalValue * getGlobal() const
MachineBasicBlock * getMBB() const
const BlockAddress * getBlockAddress() const
unsigned getTargetFlags() const
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
const char * getSymbolName() const
Register getReg() const
getReg - Returns the register number.
MCSymbol * getMCSymbol() const
@ MO_Immediate
Immediate operand.
@ MO_ConstantPoolIndex
Address of indexed Constant in Constant Pool.
@ MO_MCSymbol
MCSymbol reference (for debug/eh info)
@ MO_GlobalAddress
Address of a global value.
@ MO_RegisterMask
Mask of preserved registers.
@ MO_BlockAddress
Address of a basic block.
@ MO_MachineBasicBlock
MachineBasicBlock reference.
@ MO_Register
Register operand.
@ MO_ExternalSymbol
Name of external global symbol.
@ MO_JumpTableIndex
Address of indexed Jump Table for switch.
int64_t getOffset() const
Return the offset from the symbol in this operand.
void Lower(const MachineInstr *MI, MCInst &OutMI) const
Definition MipsMCInstLower.cpp:323
MCOperand LowerOperand(const MachineOperand &MO, int64_t offset=0) const
Definition MipsMCInstLower.cpp:185
void Initialize(MCContext *C)
Definition MipsMCInstLower.cpp:31
MipsMCInstLower(MipsAsmPrinter &asmprinter)
Definition MipsMCInstLower.cpp:28
SmallString - A SmallString is just a SmallVector with methods and accessors that make it work better...
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ C
The default llvm calling convention, compatible with C.
MipsII - This namespace holds all of the target specific flags that instruction info tracks.
const MCSpecifierExpr * createGpOff(const MCExpr *Expr, Specifier S, MCContext &Ctx)
This is an optimization pass for GlobalISel generic memory operations.
LLVM_ABI void report_fatal_error(Error Err, bool gen_crash_diag=true)
@ Sub
Subtraction of integers.