MipsMachineFunction.cpp Source File (original) (raw)

20using namespace llvm;

24 cl::desc("Always use $gp as the global base register."));

29 &Src2DstMBB) const {

31}

36 return GlobalBaseReg;

37}

43 if (STI.inMips16Mode())

44 return Mips::CPU16RegsRegClass;

46 if (STI.inMicroMipsMode())

47 return Mips::GPRMM16RegClass;

49 if (TM.getABI().IsN64())

50 return Mips::GPR64RegClass;

52 return Mips::GPR32RegClass;

53}

56 if (!GlobalBaseReg)

57 GlobalBaseReg =

59 return GlobalBaseReg;

60}

63 if (!GlobalBaseReg) {

66 }

67 return GlobalBaseReg;

68}

71 if (!GlobalBaseReg)

72 return;

82 RC = (ABI.IsN64()) ? &Mips::GPR64RegClass : &Mips::GPR32RegClass;

87 if (ABI.IsN64()) {

101 return;

102 }

103

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113 return;

114 }

115

118

119 if (ABI.IsN32()) {

120

121

122

129 return;

130 }

131

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155}

156

159 for (int &I : EhDataRegFI) {

162 ? Mips::GPR64RegClass

163 : Mips::GPR32RegClass;

164

166 TRI.getSpillAlign(RC), false);

167 }

168}

169

171

172

173

174

177

178 for (int &I : ISRDataRegFI)

180 TRI.getSpillAlign(RC), false);

181}

182

184 return CallsEhReturn && (FI == EhDataRegFI[0] || FI == EhDataRegFI[1]

185 || FI == EhDataRegFI[2] || FI == EhDataRegFI[3]);

186}

187

189 return IsISR && (FI == ISRDataRegFI[0] || FI == ISRDataRegFI[1]);

190}

192 const char *ES) {

194}

195

199}

200

204 if (MoveF64ViaSpillFI == -1) {

206 TRI.getSpillSize(*RC), TRI.getSpillAlign(*RC), false);

207 }

208 return MoveF64ViaSpillFI;

209}

210

211void MipsFunctionInfo::anchor() {}

MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL

const HexagonInstrInfo * TII

unsigned const TargetRegisterInfo * TRI

static cl::opt< bool > FixGlobalBaseReg("mips-fix-global-base-reg", cl::Hidden, cl::init(true), cl::desc("Always use $gp as the global base register."))

static const TargetRegisterClass & getGlobalBaseRegClass(MachineFunction &MF)

assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())

Allocate memory in an ever growing pool, as if by bump-pointer.

void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())

Adds the specified register as a live in.

int CreateStackObject(uint64_t Size, Align Alignment, bool isSpillSlot, const AllocaInst *Alloca=nullptr, uint8_t ID=0)

Create a new statically sized stack object, returning a nonnegative identifier to represent it.

PseudoSourceValueManager & getPSVManager() const

const TargetSubtargetInfo & getSubtarget() const

getSubtarget - Return the subtarget for which this machine code is being compiled.

MachineFrameInfo & getFrameInfo()

getFrameInfo - Return the frame info object for the current function.

MachineRegisterInfo & getRegInfo()

getRegInfo - Return information about the registers currently in use.

Function & getFunction()

Return the LLVM function that this machine code represents.

Ty * cloneInfo(const Ty &Old)

const MachineBasicBlock & front() const

const TargetMachine & getTarget() const

getTarget - Return the target machine this machine code is compiled with

const MachineInstrBuilder & addExternalSymbol(const char *FnName, unsigned TargetFlags=0) const

const MachineInstrBuilder & addGlobalAddress(const GlobalValue *GV, int64_t Offset=0, unsigned TargetFlags=0) const

const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const

Add a new virtual register operand.

MachineRegisterInfo - Keep track of information for virtual and physical registers,...

createVirtualRegister - Create and return a new virtual register in the function with the specified r...

void addLiveIn(MCRegister Reg, Register vreg=Register())

addLiveIn - Add the specified register as a live-in.

MipsFunctionInfo - This class is derived from MachineFunction private Mips target-specific informatio...

bool isISRRegFI(int FI) const

MachinePointerInfo callPtrInfo(MachineFunction &MF, const char *ES)

Create a MachinePointerInfo that has an ExternalSymbolPseudoSourceValue object representing a GOT ent...

int getMoveF64ViaSpillFI(MachineFunction &MF, const TargetRegisterClass *RC)

MachineFunctionInfo * clone(BumpPtrAllocator &Allocator, MachineFunction &DestMF, const DenseMap< MachineBasicBlock *, MachineBasicBlock * > &Src2DstMBB) const override

Make a functionally equivalent copy of this MachineFunctionInfo in MF.

bool globalBaseRegSet() const

bool isEhDataRegFI(int FI) const

void createEhDataRegsFI(MachineFunction &MF)

void initGlobalBaseReg(MachineFunction &MF)

~MipsFunctionInfo() override

void createISRRegFI(MachineFunction &MF)

const PseudoSourceValue * getExternalSymbolCallEntry(const char *ES)

const PseudoSourceValue * getGlobalValueCallEntry(const GlobalValue *GV)

Wrapper class representing virtual and physical registers.

TargetInstrInfo - Interface to description of machine instruction set.

bool isPositionIndependent() const

TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...

virtual const TargetRegisterInfo * getRegisterInfo() const

getRegisterInfo - If register information is available, return it.

virtual const TargetInstrInfo * getInstrInfo() const

@ MO_ABS_HI

MO_ABS_HI/LO - Represents the hi or low part of an absolute symbol address.

initializer< Ty > init(const Ty &Val)

This is an optimization pass for GlobalISel generic memory operations.

MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)

Builder interface. Specify how to create the initial instruction itself.

MachineFunctionInfo - This class can be derived from and used by targets to hold private target-speci...

This class contains a discriminated union of information about pointers in memory operands,...