LLVM: lib/Target/Mips/MipsOptimizePICCall.cpp Source File (original) (raw)
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38#include
39#include
40
41using namespace llvm;
42
43#define DEBUG_TYPE "optimize-mips-pic-call"
44
47 cl::desc("Load target address from GOT"),
49
53
54namespace {
55
57using CntRegP = std::pair<unsigned, unsigned>;
62
63class MBBInfo {
64public:
66
68 bool isVisited() const;
69 void preVisit(ScopedHTType &ScopedHT);
70 void postVisit();
71
72private:
74 ScopedHTType::ScopeTy *HTScope;
75};
76
78public:
79 OptimizePICCall() : MachineFunctionPass(ID) {}
80
81 StringRef getPassName() const override { return "Mips OptimizePICCall"; }
82
83 bool runOnMachineFunction(MachineFunction &F) override;
84
85 void getAnalysisUsage(AnalysisUsage &AU) const override {
86 AU.addRequired();
88 }
89
90private:
91
92 bool visitNode(MBBInfo &MBBI);
93
94
95
96
97
98
99 bool isCallViaRegister(MachineInstr &MI, unsigned &Reg,
101
102
103
104 unsigned getCount(ValueType Entry);
105
106
107
109
110
111 void incCntAndSetReg(ValueType Entry, unsigned Reg);
112
113 ScopedHTType ScopedHT;
114
115 static char ID;
116};
117
118}
119
120char OptimizePICCall::ID = 0;
121
122
124 if (MI.getNumOperands() == 0)
125 return nullptr;
126
128
130 return nullptr;
131
132 return &MO;
133}
134
135
139 assert(TRI.legalclasstypes_end(*RC) - TRI.legalclasstypes_begin(*RC) == 1);
140 return *TRI.legalclasstypes_begin(*RC);
141}
142
143
144
145
146
147
148
153 Register SrcReg = I->getOperand(0).getReg();
154 unsigned DstReg = getRegTy(SrcReg, MF) == MVT::i32 ? Mips::T9 : Mips::T9_64;
155 BuildMI(*MBB, I, I->getDebugLoc(), TII.get(TargetOpcode::COPY), DstReg)
157 I->getOperand(0).setReg(DstReg);
158}
159
160
163 return;
164
167 unsigned Reg = Ty == MVT::i32 ? Mips::GP : Mips::GP_64;
168
169 for (unsigned I = 0; I < MI.getNumOperands(); ++I) {
173 return;
174 }
175 }
176
178}
179
181
183
184bool MBBInfo::isVisited() const { return HTScope; }
185
186void MBBInfo::preVisit(ScopedHTType &ScopedHT) {
187 HTScope = new ScopedHTType::ScopeTy(ScopedHT);
188}
189
190void MBBInfo::postVisit() {
191 delete HTScope;
192}
193
194
195bool OptimizePICCall::runOnMachineFunction(MachineFunction &F) {
196 if (F.getSubtarget().inMips16Mode())
197 return false;
198
199
200 MachineDominatorTree *MDT =
201 &getAnalysis().getDomTree();
203
205
206 while (!WorkList.empty()) {
207 MBBInfo &MBBI = WorkList.back();
208
209
210
211 if (MBBI.isVisited()) {
212 MBBI.postVisit();
214 continue;
215 }
216
217
218 MBBI.preVisit(ScopedHT);
221 WorkList.append(Node->begin(), Node->end());
222 }
223
225}
226
227bool OptimizePICCall::visitNode(MBBInfo &MBBI) {
229 MachineBasicBlock *MBB = MBBI.getNode()->getBlock();
230
232 ++I) {
233 unsigned Reg;
235
236
237 if (!isCallViaRegister(*I, Reg, Entry))
238 continue;
239
241 unsigned N = getCount(Entry);
242
243 if (N != 0) {
244
245
246
249
250
251
252
254 }
255
256 if (Entry)
257 incCntAndSetReg(Entry, Reg);
258
260 }
261
263}
264
265bool OptimizePICCall::isCallViaRegister(MachineInstr &MI, unsigned &Reg,
267 if (.isCall())
268 return false;
269
271
272
273 if (!MO)
274 return false;
275
276
278 Val = nullptr;
279 MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo();
280 MachineInstr *DefMI = MRI.getVRegDef(Reg);
281
283
284
285
287 return true;
288
290
292 return true;
293
294
297 if (!Val)
299 return true;
300}
301
302unsigned OptimizePICCall::getCount(ValueType Entry) {
303 return ScopedHT.lookup(Entry).first;
304}
305
306unsigned OptimizePICCall::getReg(ValueType Entry) {
307 unsigned Reg = ScopedHT.lookup(Entry).second;
309 return Reg;
310}
311
312void OptimizePICCall::incCntAndSetReg(ValueType Entry, unsigned Reg) {
313 CntRegP P = ScopedHT.lookup(Entry);
314 ScopedHT.insert(Entry, std::make_pair(P.first + 1, Reg));
315}
316
317
319 return new OptimizePICCall();
320}
unsigned const MachineRegisterInfo * MRI
MachineInstrBuilder MachineInstrBuilder & DefMI
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
const TargetInstrInfo & TII
static msgpack::DocNode getNode(msgpack::DocNode DN, msgpack::Type Type, MCValue Val)
MachineBasicBlock MachineBasicBlock::iterator MBBI
This file defines the BumpPtrAllocator interface.
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
Register const TargetRegisterInfo * TRI
static MCRegister getReg(const MCDisassembler *D, unsigned RC, unsigned RegNo)
static cl::opt< bool > LoadTargetFromGOT("mips-load-target-from-got", cl::init(true), cl::desc("Load target address from GOT"), cl::Hidden)
static void setCallTargetReg(MachineBasicBlock *MBB, MachineBasicBlock::iterator I)
Do the following transformation:
Definition MipsOptimizePICCall.cpp:149
static void eraseGPOpnd(MachineInstr &MI)
Search MI's operands for register GP and erase it.
Definition MipsOptimizePICCall.cpp:161
static MachineOperand * getCallTargetRegOpnd(MachineInstr &MI)
Return the first MachineOperand of MI if it is a used virtual register.
Definition MipsOptimizePICCall.cpp:123
static cl::opt< bool > EraseGPOpnd("mips-erase-gp-opnd", cl::init(true), cl::desc("Erase GP Operand"), cl::Hidden)
static MVT::SimpleValueType getRegTy(unsigned Reg, MachineFunction &MF)
Return type of register Reg.
Definition MipsOptimizePICCall.cpp:136
This file defines the PointerUnion class, which is a discriminated union of pointer types.
This file defines the SmallVector class.
AnalysisUsage & addRequired()
DomTreeNodeBase< NodeT > * getRootNode()
getRootNode - This returns the entry node for the CFG of the function.
FunctionPass class - This class is used to implement most global optimizations.
MachineInstrBundleIterator< MachineInstr > iterator
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
Representation of each machine instruction.
unsigned getNumOperands() const
Retuns the total number of operands.
bool mayLoad(QueryType Type=AnyInBundle) const
Return true if this instruction could possibly read memory.
bool hasOneMemOperand() const
Return true if this instruction has exactly one MachineMemOperand.
mmo_iterator memoperands_begin() const
Access to memory operands of the instruction.
const MachineOperand & getOperand(unsigned i) const
MachineOperand class - Representation of each machine instruction operand.
bool isReg() const
isReg - Tests if this is a MO_Register operand.
LLVM_ABI void setReg(Register Reg)
Change the register this operand corresponds to.
unsigned getTargetFlags() const
Register getReg() const
getReg - Returns the register number.
const TargetRegisterClass * getRegClass(Register Reg) const
Return the register class of the specified virtual register.
A discriminated union of two or more pointer types, with the discriminator in the low bit of the poin...
RecyclingAllocator - This class wraps an Allocator, adding the functionality of recycling deleted obj...
Wrapper class representing virtual and physical registers.
constexpr bool isVirtual() const
Return true if the specified register number is in the virtual register namespace.
TargetInstrInfo - Interface to description of machine instruction set.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
virtual const TargetInstrInfo * getInstrInfo() const
virtual const TargetRegisterInfo * getRegisterInfo() const =0
Return the target's register information.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
initializer< Ty > init(const Ty &Val)
NodeAddr< NodeBase * > Node
This is an optimization pass for GlobalISel generic memory operations.
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
FunctionPass * createMipsOptimizePICCallPass()
Return an OptimizeCall object.
Definition MipsOptimizePICCall.cpp:318
class LLVM_GSL_OWNER SmallVector
Forward declaration of SmallVector so that calculateSmallVectorDefaultInlinedElements can reference s...
DomTreeNodeBase< MachineBasicBlock > MachineDomTreeNode
PointerUnion< const Value *, const PseudoSourceValue * > ValueType
BumpPtrAllocatorImpl<> BumpPtrAllocator
The standard BumpPtrAllocator which just uses the default template parameters.
An information struct used to provide DenseMap with the various necessary components for a given valu...