LLVM: lib/Target/Mips/MCTargetDesc/MipsOptionRecord.cpp Source File (original) (raw)

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18#include

19

20using namespace llvm;

21

25

26 Streamer->pushSection();

27

28

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39 Streamer->switchSection(Sec);

40

42 Streamer->emitInt8(40);

43 Streamer->emitInt16(0);

44 Streamer->emitInt32(0);

45 Streamer->emitInt32(ri_gprmask);

46 Streamer->emitInt32(0);

47 Streamer->emitInt32(ri_cprmask[0]);

48 Streamer->emitInt32(ri_cprmask[1]);

49 Streamer->emitInt32(ri_cprmask[2]);

50 Streamer->emitInt32(ri_cprmask[3]);

51 Streamer->emitIntValue(ri_gp_value, 8);

52 } else {

56 Streamer->switchSection(Sec);

57

58 Streamer->emitInt32(ri_gprmask);

59 Streamer->emitInt32(ri_cprmask[0]);

60 Streamer->emitInt32(ri_cprmask[1]);

61 Streamer->emitInt32(ri_cprmask[2]);

62 Streamer->emitInt32(ri_cprmask[3]);

63 assert((ri_gp_value & 0xffffffff) == ri_gp_value);

64 Streamer->emitInt32(ri_gp_value);

65 }

66

67 Streamer->popSection();

68}

69

72 unsigned Value = 0;

73

76 Value |= 1 << EncVal;

77

78 if (GPR32RegClass->contains(SubReg) || GPR64RegClass->contains(SubReg))

79 ri_gprmask |= Value;

80 else if (COP0RegClass->contains(SubReg))

81 ri_cprmask[0] |= Value;

82

83 else if (FGR32RegClass->contains(SubReg) ||

84 FGR64RegClass->contains(SubReg) ||

85 AFGR64RegClass->contains(SubReg) ||

86 MSA128BRegClass->contains(SubReg))

87 ri_cprmask[1] |= Value;

88 else if (COP2RegClass->contains(SubReg))

89 ri_cprmask[2] |= Value;

90 else if (COP3RegClass->contains(SubReg))

91 ri_cprmask[3] |= Value;

92 }

93}

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...

uint16_t getEncodingValue(MCRegister Reg) const

Returns the encoding for Reg.

iterator_range< MCSubRegIterator > subregs_inclusive(MCRegister Reg) const

Return an iterator range over all sub-registers of Reg, including Reg.

Wrapper class representing physical registers. Should be passed by value.

This represents a section on linux, lots of unix variants and some bare metal systems.

void setAlignment(Align Value)

void EmitMipsOptionRecord() override

Definition MipsOptionRecord.cpp:22

void SetPhysRegUsed(MCRegister Reg, const MCRegisterInfo *MCRegInfo)

Definition MipsOptionRecord.cpp:70

const MipsABIInfo & getABI() const

LLVM Value Representation.

This is an optimization pass for GlobalISel generic memory operations.

uint16_t MCPhysReg

An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...

This struct is a compact representation of a valid (non-zero power of two) alignment.