MipsTargetMachine.cpp Source File (original) (raw)

43#include

44#include

46using namespace llvm;

48#define DEBUG_TYPE "mips"

70}

72static std::unique_ptr createTLOF(const Triple &TT) {

73 if (TT.isOSBinFormatCOFF())

74 return std::make_unique();

75 return std::make_unique();

76}

80 bool isLittle) {

81 std::string Ret;

85 if (isLittle)

86 Ret += "e";

87 else

88 Ret += "E";

90 if (ABI.IsO32())

91 Ret += "-m:m";

92 else

93 Ret += "-m:e";

96 if (!ABI.IsN64())

97 Ret += "-p:32:32";

100

101 Ret += "-i8:8:32-i16:16:32-i64:64";

102

103

104

105

106 if (ABI.IsN64() || ABI.IsN32())

107 Ret += "-i128:128-n32:64-S128";

108 else

109 Ret += "-n32-S64";

110

111 return Ret;

112}

113

115 std::optionalReloc::Model RM) {

116 if (!RM || JIT)

118 return *RM;

119}

120

121

122

123

124

125

129 std::optionalReloc::Model RM,

130 std::optionalCodeModel::Model CM,

132 bool isLittle)

137 isLittle(isLittle), TLOF(createTLOF(getTargetTriple())),

139 Subtarget(nullptr),

140 DefaultSubtarget(TT, CPU, FS, isLittle, *this, std::nullopt),

141 NoMips16Subtarget(TT, CPU, FS.empty() ? "-mips16" : FS.str() + ",-mips16",

142 isLittle, *this, std::nullopt),

143 Mips16Subtarget(TT, CPU, FS.empty() ? "+mips16" : FS.str() + ",+mips16",

144 isLittle, *this, std::nullopt) {

145 Subtarget = &DefaultSubtarget;

147

148

150}

151

153

154void MipsebTargetMachine::anchor() {}

155

159 std::optionalReloc::Model RM,

160 std::optionalCodeModel::Model CM,

163

164void MipselTargetMachine::anchor() {}

165

169 std::optionalReloc::Model RM,

170 std::optionalCodeModel::Model CM,

173

176 Attribute CPUAttr = F.getFnAttribute("target-cpu");

177 Attribute FSAttr = F.getFnAttribute("target-features");

178

179 std::string CPU =

181 std::string FS =

183 bool hasMips16Attr = F.getFnAttribute("mips16").isValid();

184 bool hasNoMips16Attr = F.getFnAttribute("nomips16").isValid();

185

186 bool HasMicroMipsAttr = F.getFnAttribute("micromips").isValid();

187 bool HasNoMicroMipsAttr = F.getFnAttribute("nomicromips").isValid();

188

189

190

191

192 bool softFloat = F.getFnAttribute("use-soft-float").getValueAsBool();

193

194 if (hasMips16Attr)

195 FS += FS.empty() ? "+mips16" : ",+mips16";

196 else if (hasNoMips16Attr)

197 FS += FS.empty() ? "-mips16" : ",-mips16";

198 if (HasMicroMipsAttr)

199 FS += FS.empty() ? "+micromips" : ",+micromips";

200 else if (HasNoMicroMipsAttr)

201 FS += FS.empty() ? "-micromips" : ",-micromips";

202 if (softFloat)

203 FS += FS.empty() ? "+soft-float" : ",+soft-float";

204

205 auto &I = SubtargetMap[CPU + FS];

206 if () {

207

208

209

211 I = std::make_unique(

213 MaybeAlign(F.getParent()->getOverrideStackAlignment()));

214 }

215 return I.get();

216}

217

220

222}

223

224namespace {

225

226

228public:

231

232

233

234

235 EnableTailMerge = !getMipsSubtarget().enableLongBranchPass();

236 }

237

239 return getTM();

240 }

241

243 return *getMipsTargetMachine().getSubtargetImpl();

244 }

245

246 void addIRPasses() override;

247 bool addInstSelector() override;

248 void addPreEmitPass() override;

249 void addPreRegAlloc() override;

250 bool addIRTranslator() override;

251 void addPreLegalizeMachineIR() override;

252 bool addLegalizeMachineIR() override;

253 void addPreRegBankSelect() override;

254 bool addRegBankSelect() override;

255 bool addGlobalInstructionSelect() override;

256

257 std::unique_ptr getCSEConfig() const override;

258};

259

260}

261

263 return new MipsPassConfig(*this, PM);

264}

265

266std::unique_ptr MipsPassConfig::getCSEConfig() const {

268}

269

270void MipsPassConfig::addIRPasses() {

273 if (getMipsSubtarget().os16())

275 if (getMipsSubtarget().inMips16HardFloat())

277}

278

279

280bool MipsPassConfig::addInstSelector() {

284 return false;

285}

286

287void MipsPassConfig::addPreRegAlloc() {

289}

290

294 LLVM_DEBUG(errs() << "No Target Transform Info Pass Added\n");

295

297 }

298

299 LLVM_DEBUG(errs() << "Target Transform Info Pass Added\n");

301}

302

306 return MipsFunctionInfo::create(Allocator, F, STI);

307}

308

309

310

311void MipsPassConfig::addPreEmitPass() {

312

314

315

316

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319

320

323

324

325

327

328

329

330

331

332

333

334

335

337

339}

340

341bool MipsPassConfig::addIRTranslator() {

343 return false;

344}

345

346void MipsPassConfig::addPreLegalizeMachineIR() {

348}

349

350bool MipsPassConfig::addLegalizeMachineIR() {

352 return false;

353}

354

355void MipsPassConfig::addPreRegBankSelect() {

358}

359

360bool MipsPassConfig::addRegBankSelect() {

362 return false;

363}

364

365bool MipsPassConfig::addGlobalInstructionSelect() {

367 return false;

368}

static ARMBaseTargetMachine::ARMABI computeTargetABI(const Triple &TT, StringRef CPU, const TargetOptions &Options)

This file contains the simple types necessary to represent the attributes associated with functions a...

This file provides a helper that implements much of the TTI interface in terms of the target-independ...

static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")

static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")

Provides analysis for continuously CSEing during GISel passes.

#define LLVM_EXTERNAL_VISIBILITY

static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")

This file declares the IRTranslator pass.

static std::string computeDataLayout()

static Reloc::Model getEffectiveRelocModel(bool JIT, std::optional< Reloc::Model > RM)

LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMipsTarget()

static cl::opt< bool > EnableMulMulFix("mfix4300", cl::init(false), cl::desc("Enable the VR4300 mulmul bug fix."), cl::Hidden)

static GCMetadataPrinterRegistry::Add< OcamlGCMetadataPrinter > Y("ocaml", "ocaml 3.10-compatible collector")

This file describes the interface of the MachineFunctionPass responsible for assigning the generic vi...

Target-Independent Code Generator Pass Configuration Options pass.

This pass exposes codegen information to IR-level passes.

static std::unique_ptr< TargetLoweringObjectFile > createTLOF()

StringRef getValueAsString() const

Return the attribute's value as a string.

bool isValid() const

Return true if the attribute is any kind of attribute.

Allocate memory in an ever growing pool, as if by bump-pointer.

implements a set of functionality in the TargetMachine class for targets that make use of the indepen...

This pass is responsible for selecting generic machine instructions to target-specific instructions.

const TargetSubtargetInfo & getSubtarget() const

getSubtarget - Return the subtarget for which this machine code is being compiled.

static MipsABIInfo computeTargetABI(const Triple &TT, StringRef CPU, const MCTargetOptions &Options)

bool allowMixed16_32() const

TargetTransformInfo getTargetTransformInfo(const Function &F) const override

Get a TargetTransformInfo implementation for the target.

MachineFunctionInfo * createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F, const TargetSubtargetInfo *STI) const override

Create the target's instance of MachineFunctionInfo.

MipsTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, std::optional< Reloc::Model > RM, std::optional< CodeModel::Model > CM, CodeGenOptLevel OL, bool JIT, bool isLittle)

TargetPassConfig * createPassConfig(PassManagerBase &PM) override

Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...

~MipsTargetMachine() override

void resetSubtarget(MachineFunction *MF)

Reset the subtarget for the Mips target.

const MipsSubtarget * getSubtargetImpl() const

MipsebTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, std::optional< Reloc::Model > RM, std::optional< CodeModel::Model > CM, CodeGenOptLevel OL, bool JIT)

MipselTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, std::optional< Reloc::Model > RM, std::optional< CodeModel::Model > CM, CodeGenOptLevel OL, bool JIT)

PassRegistry - This class manages the registration and intitialization of the pass subsystem as appli...

static PassRegistry * getPassRegistry()

getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...

This pass implements the reg bank selector pass used in the GlobalISel pipeline.

StringRef - Represent a constant reference to a string, i.e.

std::string str() const

str - Get the contents as an std::string.

void setSupportsDebugEntryValues(bool Enable)

Triple TargetTriple

Triple string, CPU name, and target feature strings the TargetMachine instance is created with.

std::unique_ptr< const MCSubtargetInfo > STI

void resetTargetOptions(const Function &F) const

Reset the target options based on the function's attributes.

Target-Independent Code Generator Pass Configuration Options.

virtual void addIRPasses()

Add common target configurable passes that perform LLVM IR to IR transforms following machine indepen...

TargetSubtargetInfo - Generic base class for all target subtargets.

This pass provides access to the codegen interfaces that are needed for IR-level transformations.

Target - Wrapper for Target specific information.

Triple - Helper class for working with autoconf configuration names.

PassManagerBase - An abstract interface to allow code to add passes to a pass manager without having ...

initializer< Ty > init(const Ty &Val)

This is an optimization pass for GlobalISel generic memory operations.

Target & getTheMips64Target()

FunctionPass * createMipsConstantIslandPass()

Returns a pass that converts branches to long branches.

void initializeMipsPreLegalizerCombinerPass(PassRegistry &)

void initializeMipsBranchExpansionPass(PassRegistry &)

void initializeMipsDelaySlotFillerPass(PassRegistry &)

void initializeMipsMulMulBugFixPass(PassRegistry &)

FunctionPass * createMipsOptimizePICCallPass()

Return an OptimizeCall object.

void initializeMipsDAGToDAGISelLegacyPass(PassRegistry &)

std::unique_ptr< CSEConfigBase > getStandardCSEConfigForOpt(CodeGenOptLevel Level)

FunctionPass * createMipsModuleISelDagPass()

CodeModel::Model getEffectiveCodeModel(std::optional< CodeModel::Model > CM, CodeModel::Model Default)

Helper method for getting the code model, returning Default if CM does not have a value.

raw_ostream & dbgs()

dbgs() - This returns a reference to a raw_ostream for debugging messages.

FunctionPass * createMipsPreLegalizeCombiner()

void initializeMipsPostLegalizerCombinerPass(PassRegistry &)

FunctionPass * createMicroMipsSizeReducePass()

Returns an instance of the MicroMips size reduction pass.

FunctionPass * createMipsSEISelDag(MipsTargetMachine &TM, CodeGenOptLevel OptLevel)

CodeGenOptLevel

Code generation optimization level.

FunctionPass * createMipsBranchExpansion()

Target & getTheMips64elTarget()

raw_fd_ostream & errs()

This returns a reference to a raw_ostream for standard error.

FunctionPass * createMipsMulMulBugPass()

void initializeMicroMipsSizeReducePass(PassRegistry &)

void initializeGlobalISel(PassRegistry &)

Initialize all passes linked into the GlobalISel library.

Target & getTheMipselTarget()

FunctionPass * createMips16ISelDag(MipsTargetMachine &TM, CodeGenOptLevel OptLevel)

ModulePass * createMips16HardFloatPass()

FunctionPass * createMipsExpandPseudoPass()

createMipsExpandPseudoPass - returns an instance of the pseudo instruction expansion pass.

FunctionPass * createMipsDelaySlotFillerPass()

createMipsDelaySlotFillerPass - Returns a pass that fills in delay slots in Mips MachineFunctions

FunctionPass * createAtomicExpandLegacyPass()

AtomicExpandPass - At IR level this pass replace atomic instructions with __atomic_* library calls,...

Target & getTheMipsTarget()

ModulePass * createMipsOs16Pass()

FunctionPass * createMipsPostLegalizeCombiner(bool IsOptNone)

Implement std::hash so that hash_code can be used in STL containers.

MachineFunctionInfo - This class can be derived from and used by targets to hold private target-speci...

This struct is a compact representation of a valid (power of two) or undefined (0) alignment.

RegisterTargetMachine - Helper template for registering a target machine implementation,...