LLVM: lib/Target/Mips/MipsTargetMachine.cpp Source File (original) (raw)

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44#include

45#include

46

47using namespace llvm;

48

49#define DEBUG_TYPE "mips"

50

54

73

74static std::unique_ptr createTLOF(const Triple &TT) {

75 if (TT.isOSBinFormatCOFF())

76 return std::make_unique();

77 return std::make_unique();

78}

79

81 std::optionalReloc::Model RM) {

82 if (!RM || JIT)

84 return *RM;

85}

86

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90

91

95 std::optionalReloc::Model RM,

96 std::optionalCodeModel::Model CM,

98 bool isLittle)

100 T, TT.computeDataLayout(Options.MCOptions.getABIName()), TT, CPU, FS,

105 Subtarget(nullptr),

106 DefaultSubtarget(TT, CPU, FS, isLittle, *this, std::nullopt),

107 NoMips16Subtarget(TT, CPU, FS.empty() ? "-mips16" : FS.str() + ",-mips16",

108 isLittle, *this, std::nullopt),

109 Mips16Subtarget(TT, CPU, FS.empty() ? "+mips16" : FS.str() + ",+mips16",

110 isLittle, *this, std::nullopt) {

111 Subtarget = &DefaultSubtarget;

113

114

116}

117

119

120void MipsebTargetMachine::anchor() {}

121

125 std::optionalReloc::Model RM,

126 std::optionalCodeModel::Model CM,

129

130void MipselTargetMachine::anchor() {}

131

135 std::optionalReloc::Model RM,

136 std::optionalCodeModel::Model CM,

139

142 Attribute CPUAttr = F.getFnAttribute("target-cpu");

143 Attribute FSAttr = F.getFnAttribute("target-features");

144

145 std::string CPU =

147 std::string FS =

149 bool hasMips16Attr = F.getFnAttribute("mips16").isValid();

150 bool hasNoMips16Attr = F.getFnAttribute("nomips16").isValid();

151

152 bool HasMicroMipsAttr = F.getFnAttribute("micromips").isValid();

153 bool HasNoMicroMipsAttr = F.getFnAttribute("nomicromips").isValid();

154

155

156

157

158 bool softFloat = F.getFnAttribute("use-soft-float").getValueAsBool();

159

160 if (hasMips16Attr)

161 FS += FS.empty() ? "+mips16" : ",+mips16";

162 else if (hasNoMips16Attr)

163 FS += FS.empty() ? "-mips16" : ",-mips16";

164 if (HasMicroMipsAttr)

165 FS += FS.empty() ? "+micromips" : ",+micromips";

166 else if (HasNoMicroMipsAttr)

167 FS += FS.empty() ? "-micromips" : ",-micromips";

168 if (softFloat)

169 FS += FS.empty() ? "+soft-float" : ",+soft-float";

170

171 auto &I = SubtargetMap[CPU + FS];

172 if (I) {

173

174

175

177 I = std::make_unique(

179 MaybeAlign(F.getParent()->getOverrideStackAlignment()));

180 }

181 return I.get();

182}

183

189

190namespace {

191

192

194public:

197

198

199

200

201 EnableTailMerge = !getMipsSubtarget().enableLongBranchPass();

202 EnableLoopTermFold = true;

203 }

204

207 }

208

209 const MipsSubtarget &getMipsSubtarget() const {

210 return *getMipsTargetMachine().getSubtargetImpl();

211 }

212

213 void addIRPasses() override;

214 bool addInstSelector() override;

215 void addPreEmitPass() override;

216 void addPreRegAlloc() override;

217 bool addIRTranslator() override;

218 void addPreLegalizeMachineIR() override;

219 bool addLegalizeMachineIR() override;

220 void addPreRegBankSelect() override;

221 bool addRegBankSelect() override;

222 bool addGlobalInstructionSelect() override;

223

224 std::unique_ptr getCSEConfig() const override;

225};

226

227}

228

230 return new MipsPassConfig(*this, PM);

231}

232

233std::unique_ptr MipsPassConfig::getCSEConfig() const {

235}

236

237void MipsPassConfig::addIRPasses() {

240 if (getMipsSubtarget().os16())

242 if (getMipsSubtarget().inMips16HardFloat())

244}

245

246

247bool MipsPassConfig::addInstSelector() {

251 return false;

252}

253

254void MipsPassConfig::addPreRegAlloc() {

256}

257

260 if (Subtarget->allowMixed16_32()) {

261 LLVM_DEBUG(errs() << "No Target Transform Info Pass Added\n");

262

264 }

265

266 LLVM_DEBUG(errs() << "Target Transform Info Pass Added\n");

268}

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278void MipsPassConfig::addPreEmitPass() {

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306}

307

308bool MipsPassConfig::addIRTranslator() {

310 return false;

311}

312

313void MipsPassConfig::addPreLegalizeMachineIR() {

315}

316

317bool MipsPassConfig::addLegalizeMachineIR() {

319 return false;

320}

321

322void MipsPassConfig::addPreRegBankSelect() {

325}

326

327bool MipsPassConfig::addRegBankSelect() {

329 return false;

330}

331

332bool MipsPassConfig::addGlobalInstructionSelect() {

334 return false;

335}

static std::unique_ptr< TargetLoweringObjectFile > createTLOF(const Triple &TT)

static Reloc::Model getEffectiveRelocModel()

This file contains the simple types necessary to represent the attributes associated with functions a...

This file provides a helper that implements much of the TTI interface in terms of the target-independ...

static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")

static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")

Provides analysis for continuously CSEing during GISel passes.

#define LLVM_EXTERNAL_VISIBILITY

This file declares the IRTranslator pass.

LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMipsTarget()

Definition MipsTargetMachine.cpp:55

static cl::opt< bool > EnableMulMulFix("mfix4300", cl::init(false), cl::desc("Enable the VR4300 mulmul bug fix."), cl::Hidden)

static PPCTargetMachine::PPCABI computeTargetABI(const Triple &TT, const TargetOptions &Options)

This file describes the interface of the MachineFunctionPass responsible for assigning the generic vi...

const GCNTargetMachine & getTM(const GCNSubtarget *STI)

static TableGen::Emitter::Opt Y("gen-skeleton-entry", EmitSkeleton, "Generate example skeleton entry")

static TableGen::Emitter::OptClass< SkeletonEmitter > X("gen-skeleton-class", "Generate example skeleton class")

Target-Independent Code Generator Pass Configuration Options pass.

This pass exposes codegen information to IR-level passes.

static std::unique_ptr< TargetLoweringObjectFile > createTLOF()

Functions, function parameters, and return types can have attributes to indicate how they should be t...

LLVM_ABI StringRef getValueAsString() const

Return the attribute's value as a string.

bool isValid() const

Return true if the attribute is any kind of attribute.

CodeGenTargetMachineImpl(const Target &T, StringRef DataLayoutString, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOptLevel OL)

This pass is responsible for selecting generic machine instructions to target-specific instructions.

const TargetSubtargetInfo & getSubtarget() const

getSubtarget - Return the subtarget for which this machine code is being compiled.

TargetTransformInfo getTargetTransformInfo(const Function &F) const override

Get a TargetTransformInfo implementation for the target.

Definition MipsTargetMachine.cpp:259

MachineFunctionInfo * createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F, const TargetSubtargetInfo *STI) const override

Create the target's instance of MachineFunctionInfo.

Definition MipsTargetMachine.cpp:270

MipsTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, std::optional< Reloc::Model > RM, std::optional< CodeModel::Model > CM, CodeGenOptLevel OL, bool JIT, bool isLittle)

Definition MipsTargetMachine.cpp:92

TargetPassConfig * createPassConfig(PassManagerBase &PM) override

Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...

Definition MipsTargetMachine.cpp:229

~MipsTargetMachine() override

void resetSubtarget(MachineFunction *MF)

Reset the subtarget for the Mips target.

Definition MipsTargetMachine.cpp:184

const MipsSubtarget * getSubtargetImpl() const

MipsebTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, std::optional< Reloc::Model > RM, std::optional< CodeModel::Model > CM, CodeGenOptLevel OL, bool JIT)

Definition MipsTargetMachine.cpp:122

MipselTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, std::optional< Reloc::Model > RM, std::optional< CodeModel::Model > CM, CodeGenOptLevel OL, bool JIT)

Definition MipsTargetMachine.cpp:132

PassRegistry - This class manages the registration and intitialization of the pass subsystem as appli...

static LLVM_ABI PassRegistry * getPassRegistry()

getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...

This pass implements the reg bank selector pass used in the GlobalISel pipeline.

StringRef - Represent a constant reference to a string, i.e.

std::string str() const

str - Get the contents as an std::string.

void setSupportsDebugEntryValues(bool Enable)

Triple TargetTriple

Triple string, CPU name, and target feature strings the TargetMachine instance is created with.

const Triple & getTargetTriple() const

std::unique_ptr< const MCSubtargetInfo > STI

void resetTargetOptions(const Function &F) const

Reset the target options based on the function's attributes.

Target-Independent Code Generator Pass Configuration Options.

virtual void addIRPasses()

Add common target configurable passes that perform LLVM IR to IR transforms following machine indepen...

TargetSubtargetInfo - Generic base class for all target subtargets.

This pass provides access to the codegen interfaces that are needed for IR-level transformations.

Target - Wrapper for Target specific information.

Triple - Helper class for working with autoconf configuration names.

PassManagerBase - An abstract interface to allow code to add passes to a pass manager without having ...

initializer< Ty > init(const Ty &Val)

This is an optimization pass for GlobalISel generic memory operations.

FunctionPass * createMipsPreLegalizeCombiner()

Target & getTheMips64Target()

FunctionPass * createMipsConstantIslandPass()

Returns a pass that converts branches to long branches.

void initializeMipsPreLegalizerCombinerPass(PassRegistry &)

void initializeMipsBranchExpansionPass(PassRegistry &)

void initializeMipsDelaySlotFillerPass(PassRegistry &)

void initializeMipsAsmPrinterPass(PassRegistry &)

void initializeMipsMulMulBugFixPass(PassRegistry &)

FunctionPass * createMipsOptimizePICCallPass()

Return an OptimizeCall object.

void initializeMipsDAGToDAGISelLegacyPass(PassRegistry &)

LLVM_ABI std::unique_ptr< CSEConfigBase > getStandardCSEConfigForOpt(CodeGenOptLevel Level)

FunctionPass * createMipsModuleISelDagPass()

static Reloc::Model getEffectiveRelocModel(std::optional< Reloc::Model > RM)

CodeModel::Model getEffectiveCodeModel(std::optional< CodeModel::Model > CM, CodeModel::Model Default)

Helper method for getting the code model, returning Default if CM does not have a value.

LLVM_ABI raw_ostream & dbgs()

dbgs() - This returns a reference to a raw_ostream for debugging messages.

void initializeMipsPostLegalizerCombinerPass(PassRegistry &)

FunctionPass * createMicroMipsSizeReducePass()

Returns an instance of the MicroMips size reduction pass.

FunctionPass * createMipsSEISelDag(MipsTargetMachine &TM, CodeGenOptLevel OptLevel)

CodeGenOptLevel

Code generation optimization level.

FunctionPass * createMipsBranchExpansion()

Target & getTheMips64elTarget()

LLVM_ABI raw_fd_ostream & errs()

This returns a reference to a raw_ostream for standard error.

FunctionPass * createMipsMulMulBugPass()

void initializeMicroMipsSizeReducePass(PassRegistry &)

LLVM_ABI void initializeGlobalISel(PassRegistry &)

Initialize all passes linked into the GlobalISel library.

Target & getTheMipselTarget()

FunctionPass * createMips16ISelDag(MipsTargetMachine &TM, CodeGenOptLevel OptLevel)

FunctionPass * createMipsPostLegalizeCombiner(bool IsOptNone)

ModulePass * createMips16HardFloatPass()

FunctionPass * createMipsExpandPseudoPass()

createMipsExpandPseudoPass - returns an instance of the pseudo instruction expansion pass.

FunctionPass * createMipsDelaySlotFillerPass()

createMipsDelaySlotFillerPass - Returns a pass that fills in delay slots in Mips MachineFunctions

LLVM_ABI FunctionPass * createAtomicExpandLegacyPass()

AtomicExpandPass - At IR level this pass replace atomic instructions with __atomic_* library calls,...

BumpPtrAllocatorImpl<> BumpPtrAllocator

The standard BumpPtrAllocator which just uses the default template parameters.

Target & getTheMipsTarget()

ModulePass * createMipsOs16Pass()

Implement std::hash so that hash_code can be used in STL containers.

MachineFunctionInfo - This class can be derived from and used by targets to hold private target-speci...

static FuncInfoTy * create(BumpPtrAllocator &Allocator, const Function &F, const SubtargetTy *STI)

Factory function: default behavior is to call new using the supplied allocator.

This struct is a compact representation of a valid (power of two) or undefined (0) alignment.

RegisterTargetMachine - Helper template for registering a target machine implementation,...