NVPTXInstPrinter.cpp Source File (original) (raw)

26#include

27using namespace llvm;

29#define DEBUG_TYPE "asm-printer"

31#include "NVPTXGenAsmWriter.inc"

40 unsigned RCId = (Reg.id() >> 28);

41 switch (RCId) {

43 case 0:

47 return;

48 case 1:

49 OS << "%p";

50 break;

51 case 2:

52 OS << "%rs";

53 break;

54 case 3:

55 OS << "%r";

56 break;

57 case 4:

58 OS << "%rd";

59 break;

60 case 5:

61 OS << "%f";

62 break;

63 case 6:

64 OS << "%fd";

65 break;

66 case 7:

67 OS << "%rq";

68 break;

69 }

71 unsigned VReg = Reg.id() & 0x0FFFFFFF;

72 OS << VReg;

73}

87 if (Op.isReg()) {

90 } else if (Op.isImm()) {

92 } else {

93 assert(Op.isExpr() && "Unknown operand kind in printOperand");

94 MAI.printExpr(O, *Op.getExpr());

95 }

96}

100 const MCOperand &MO = MI->getOperand(OpNum);

101 int64_t Imm = MO.getImm();

102

103 if (Modifier == "ftz") {

104

106 O << ".ftz";

107 return;

108 } else if (Modifier == "sat") {

109

111 O << ".sat";

112 return;

113 } else if (Modifier == "relu") {

114

116 O << ".relu";

117 return;

118 } else if (Modifier == "base") {

119

121 default:

122 return;

124 return;

126 O << ".rni";

127 return;

129 O << ".rzi";

130 return;

132 O << ".rmi";

133 return;

135 O << ".rpi";

136 return;

138 O << ".rn";

139 return;

141 O << ".rz";

142 return;

144 O << ".rm";

145 return;

147 O << ".rp";

148 return;

150 O << ".rna";

151 return;

153 O << ".rs";

154 return;

155 }

156 }

158}

159

162 const MCOperand &MO = MI->getOperand(OpNum);

163 const int Imm = MO.getImm();

164 if (Imm)

165 O << ".ftz";

166}

167

170 const MCOperand &MO = MI->getOperand(OpNum);

171 int64_t Imm = MO.getImm();

172

173 if (Modifier == "FCmp") {

174 switch (Imm) {

175 default:

176 return;

178 O << "eq";

179 return;

181 O << "ne";

182 return;

184 O << "lt";

185 return;

187 O << "le";

188 return;

190 O << "gt";

191 return;

193 O << "ge";

194 return;

196 O << "equ";

197 return;

199 O << "neu";

200 return;

202 O << "ltu";

203 return;

205 O << "leu";

206 return;

208 O << "gtu";

209 return;

211 O << "geu";

212 return;

214 O << "num";

215 return;

217 O << "nan";

218 return;

219 }

220 }

221 if (Modifier == "ICmp") {

222 switch (Imm) {

223 default:

226 O << "eq";

227 return;

229 O << "ne";

230 return;

233 O << "lt";

234 return;

237 O << "le";

238 return;

241 O << "gt";

242 return;

245 O << "ge";

246 return;

247 }

248 }

249 if (Modifier == "IType") {

250 switch (Imm) {

251 default:

255 O << "b";

256 return;

261 O << "s";

262 return;

267 O << "u";

268 return;

269 }

270 }

272}

273

276 const MCOperand &MO = MI->getOperand(OpNum);

277 int Imm = (int)MO.getImm();

278 if (Modifier == "sem") {

280 switch (Ordering) {

282 return;

284 O << ".relaxed";

285 return;

287 O << ".acquire";

288 return;

290 O << ".release";

291 return;

293 O << ".acq_rel";

294 return;

297 "NVPTX AtomicCode Printer does not support \"seq_cst\" ordering.");

298 return;

300 O << ".volatile";

301 return;

303 O << ".mmio.relaxed";

304 return;

305 }

306 } else if (Modifier == "scope") {

308 switch (S) {

311 return;

313 O << ".sys";

314 return;

316 O << ".cta";

317 return;

319 O << ".cluster";

320 return;

322 O << ".gpu";

323 return;

324 }

326 "NVPTX AtomicCode Printer does not support \"{}\" scope modifier.",

327 ScopeToString(S)));

328 } else if (Modifier == "addsp") {

330 switch (A) {

332 return;

339 O << "." << A;

340 return;

341 }

343 "NVPTX AtomicCode Printer does not support \"{}\" addsp modifier.",

344 AddressSpaceToString(A)));

345 } else if (Modifier == "sign") {

346 switch (Imm) {

348 O << "s";

349 return;

351 O << "u";

352 return;

354 O << "b";

355 return;

357 O << "f";

358 return;

359 default:

361 }

362 }

364}

365

368 const MCOperand &MO = MI->getOperand(OpNum);

369 int Imm = (int)MO.getImm();

370 if (Modifier.empty() || Modifier == "version") {

371 O << Imm;

372 return;

373 } else if (Modifier == "aligned") {

374

375 if (Imm >= 63)

376 O << ".aligned";

377 return;

378 }

380}

381

385

386 if (Modifier == "add") {

387 O << ", ";

389 } else {

390 if (MI->getOperand(OpNum + 1).isImm() &&

391 MI->getOperand(OpNum + 1).getImm() == 0)

392 return;

393 O << "+";

395 }

396}

397

400 auto &Op = MI->getOperand(OpNum);

401 assert(Op.isImm() && "Invalid operand");

403 if (Imm != UINT32_MAX) {

404 O << ".pragma \"used_bytes_mask " << format_hex(Imm, 1) << "\";\n\t";

405 }

406}

407

412 O << "_";

413 else

415}

416

419 int64_t Imm = MI->getOperand(OpNum).getImm();

421}

422

426 assert(Op.isExpr() && "Call prototype is not an MCExpr?");

427 const MCExpr *Expr = Op.getExpr();

430}

431

434 const MCOperand &MO = MI->getOperand(OpNum);

435 int64_t Imm = MO.getImm();

436

437 switch (Imm) {

438 default:

439 return;

441 return;

443 O << ".f4e";

444 return;

446 O << ".b4e";

447 return;

449 O << ".rc8";

450 return;

452 O << ".ecl";

453 return;

455 O << ".ecr";

456 return;

458 O << ".rc16";

459 return;

460 }

461}

462

465 const MCOperand &MO = MI->getOperand(OpNum);

467

468 switch (static_cast<RedTy>(MO.getImm())) {

469 case RedTy::ADD:

470 O << ".add";

471 return;

472 case RedTy::MIN:

473 O << ".min";

474 return;

475 case RedTy::MAX:

476 O << ".max";

477 return;

478 case RedTy::INC:

479 O << ".inc";

480 return;

481 case RedTy::DEC:

482 O << ".dec";

483 return;

484 case RedTy::AND:

485 O << ".and";

486 return;

487 case RedTy::OR:

488 O << ".or";

489 return;

490 case RedTy::XOR:

491 O << ".xor";

492 return;

493 }

495 "Invalid Reduction Op in printCpAsyncBulkTensorReductionMode");

496}

497

500 const MCOperand &MO = MI->getOperand(OpNum);

502

503 switch (static_cast<CGTy>(MO.getImm())) {

504 case CGTy::CG_NONE:

505 O << "";

506 return;

507 case CGTy::CG_1:

508 O << ".cta_group::1";

509 return;

510 case CGTy::CG_2:

511 O << ".cta_group::2";

512 return;

513 }

515}

516

519 const MCOperand &MO = MI->getOperand(OpNum);

521 const auto Imm = MO.getImm();

522

523 if (Modifier == "RetList") {

524 assert((Imm == 1 || Imm == 0) && "Invalid return list");

525 if (Imm)

526 O << " (retval0),";

527 return;

528 }

529

530 if (Modifier == "ParamList") {

531 assert(Imm >= 0 && "Invalid parameter list");

533 [&](const auto &I) { O << "param" << I; });

534 return;

535 }

537}

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")

This file contains the definitions of the enumerations and flags associated with NVVM Intrinsics,...

This class is intended to be used as a base class for asm properties and features specific to the tar...

Base class for the full range of assembler expressions which are needed for parsing.

WithMarkup markup(raw_ostream &OS, Markup M)

format_object< int64_t > formatHex(int64_t Value) const

const MCRegisterInfo & MRI

void printAnnotation(raw_ostream &OS, StringRef Annot)

Utility function for printing annotations.

format_object< int64_t > formatImm(int64_t Value) const

Utility function to print immediates in decimal or hex.

MCInstPrinter(const MCAsmInfo &mai, const MCInstrInfo &mii, const MCRegisterInfo &mri)

Instances of this class represent a single low-level machine instruction.

Interface to description of machine instruction set.

Instances of this class represent operands of the MCInst class.

MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...

Wrapper class representing physical registers. Should be passed by value.

static constexpr unsigned NoRegister

Generic base class for all target subtargets.

MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...

StringRef getName() const

getName - Get the symbol name.

void printFTZFlag(const MCInst *MI, int OpNum, raw_ostream &O)

Definition NVPTXInstPrinter.cpp:160

void printCmpMode(const MCInst *MI, int OpNum, raw_ostream &O, StringRef Modifier={})

Definition NVPTXInstPrinter.cpp:168

void printRegName(raw_ostream &OS, MCRegister Reg) override

Print the assembler register name.

Definition NVPTXInstPrinter.cpp:37

void printHexu32imm(const MCInst *MI, int OpNum, raw_ostream &O)

Definition NVPTXInstPrinter.cpp:417

void printCTAGroup(const MCInst *MI, int OpNum, raw_ostream &O)

Definition NVPTXInstPrinter.cpp:498

void printCvtMode(const MCInst *MI, int OpNum, raw_ostream &O, StringRef Modifier={})

Definition NVPTXInstPrinter.cpp:98

void printMmaCode(const MCInst *MI, int OpNum, raw_ostream &O, StringRef Modifier={})

Definition NVPTXInstPrinter.cpp:366

void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O)

void printProtoIdent(const MCInst *MI, int OpNum, raw_ostream &O)

Definition NVPTXInstPrinter.cpp:423

void printAtomicCode(const MCInst *MI, int OpNum, raw_ostream &O, StringRef Modifier={})

Definition NVPTXInstPrinter.cpp:274

static const char * getRegisterName(MCRegister Reg)

void printCallOperand(const MCInst *MI, int OpNum, raw_ostream &O, StringRef Modifier={})

Definition NVPTXInstPrinter.cpp:517

void printTmaReductionMode(const MCInst *MI, int OpNum, raw_ostream &O)

Definition NVPTXInstPrinter.cpp:463

void printUsedBytesMaskPragma(const MCInst *MI, int OpNum, raw_ostream &O)

Definition NVPTXInstPrinter.cpp:398

void printInst(const MCInst *MI, uint64_t Address, StringRef Annot, const MCSubtargetInfo &STI, raw_ostream &OS) override

Print the specified MCInst to the specified raw_ostream.

Definition NVPTXInstPrinter.cpp:75

void printRegisterOrSinkSymbol(const MCInst *MI, int OpNum, raw_ostream &O)

Definition NVPTXInstPrinter.cpp:408

NVPTXInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII, const MCRegisterInfo &MRI)

Definition NVPTXInstPrinter.cpp:33

void printPrmtMode(const MCInst *MI, int OpNum, raw_ostream &O)

Definition NVPTXInstPrinter.cpp:432

void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O)

Definition NVPTXInstPrinter.cpp:84

void printMemOperand(const MCInst *MI, int OpNum, raw_ostream &O, StringRef Modifier={})

Definition NVPTXInstPrinter.cpp:382

StringRef - Represent a constant reference to a string, i.e.

constexpr bool empty() const

empty - Check if the string is empty.

This class implements an extremely fast bulk output stream that can only output to a stream.

#define llvm_unreachable(msg)

Marks that the current location is not supposed to be reachable.

This is an optimization pass for GlobalISel generic memory operations.

SmallVectorImpl< T >::const_pointer c_str(SmallVectorImpl< T > &str)

void interleaveComma(const Container &c, StreamT &os, UnaryFunctor each_fn)

auto formatv(bool Validate, const char *Fmt, Ts &&...Vals)

LLVM_ABI void report_fatal_error(Error Err, bool gen_crash_diag=true)

FormattedNumber format_hex(uint64_t N, unsigned Width, bool Upper=false)

format_hex - Output N as a fixed width hexadecimal.

DWARFExpression::Operation Op

decltype(auto) cast(const From &Val)

cast - Return the argument parameter cast to the specified type.

auto seq(T Begin, T End)

Iterate over an integral type from Begin up to - but not including - End.