LLVM: lib/Target/NVPTX/NVPTXPeephole.cpp Source File (original) (raw)
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43using namespace llvm;
44
45#define DEBUG_TYPE "nvptx-peephole"
46
47namespace {
49 public:
50 static char ID;
52
54
55 StringRef getPassName() const override {
56 return "NVPTX optimize redundant cvta.to.local instruction";
57 }
58
59 void getAnalysisUsage(AnalysisUsage &AU) const override {
61 }
62};
63}
64
65char NVPTXPeephole::ID = 0;
66
67INITIALIZE_PASS(NVPTXPeephole, "nvptx-peephole", "NVPTX Peephole", false, false)
68
70 auto &MBB = *Root.getParent();
71 auto &MF = *MBB.getParent();
72
73 if (Root.getOpcode() != NVPTX::cvta_to_local_64 &&
74 Root.getOpcode() != NVPTX::cvta_to_local)
75 return false;
76
77 auto &Op = Root.getOperand(1);
78 const auto &MRI = MF.getRegInfo();
80 if (Op.isReg() && Op.getReg().isVirtual()) {
81 GenericAddrDef = MRI.getUniqueVRegDef(Op.getReg());
82 }
83
84
85 if (!GenericAddrDef || GenericAddrDef->getParent() != &MBB ||
86 (GenericAddrDef->getOpcode() != NVPTX::LEA_ADDRi64 &&
87 GenericAddrDef->getOpcode() != NVPTX::LEA_ADDRi)) {
88 return false;
89 }
90
93
94
95 auto &BaseAddrOp = GenericAddrDef->getOperand(1);
96 if (BaseAddrOp.isReg() && BaseAddrOp.getReg() == NRI->getFrameRegister(MF)) {
97 return true;
98 }
99
100 return false;
101}
102
105 auto &MF = *MBB.getParent();
106 const auto &MRI = MF.getRegInfo();
109
112
117 .add(Prev.getOperand(2));
118
120
121
122 if (MRI.hasOneNonDBGUse(Prev.getOperand(0).getReg())) {
123 Prev.eraseFromParent();
124 }
126}
127
128bool NVPTXPeephole::runOnMachineFunction(MachineFunction &MF) {
130 return false;
131
133
134 for (auto &MBB : MF) {
135
136 auto BlockIter = MBB.begin();
137
138 while (BlockIter != MBB.end()) {
139 auto &MI = *BlockIter++;
143 }
144 }
145 }
146
147 const NVPTXRegisterInfo *NRI =
148 MF.getSubtarget().getRegisterInfo();
149
150
151 const auto &MRI = MF.getRegInfo();
154 MI->eraseFromParent();
155 }
156 }
157
159}
160
unsigned const MachineRegisterInfo * MRI
const TargetInstrInfo & TII
static bool isCVTAToLocalCombinationCandidate(MachineInstr &Root)
Definition NVPTXPeephole.cpp:69
static void CombineCVTAToLocal(MachineInstr &Root)
Definition NVPTXPeephole.cpp:103
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
Represent the analysis usage information of a pass.
MachineInstrBundleIterator< MachineInstr > iterator
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
Function & getFunction()
Return the LLVM function that this machine code represents.
const MachineInstrBuilder & add(const MachineOperand &MO) const
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
Representation of each machine instruction.
const MachineBasicBlock * getParent() const
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
LLVM_ABI void eraseFromParent()
Unlink 'this' from the containing basic block and delete it.
const MachineOperand & getOperand(unsigned i) const
Register getReg() const
getReg - Returns the register number.
Register getFrameLocalRegister(const MachineFunction &MF) const
Register getFrameRegister(const MachineFunction &MF) const override
const NVPTXRegisterInfo * getRegisterInfo() const override
StringRef - Represent a constant reference to a string, i.e.
TargetInstrInfo - Interface to description of machine instruction set.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
This is an optimization pass for GlobalISel generic memory operations.
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
MachineFunctionPass * createNVPTXPeephole()
Definition NVPTXPeephole.cpp:161
DWARFExpression::Operation Op