LLVM: lib/CodeGen/OptimizePHIs.cpp Source File (original) (raw)

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25#include

26

27using namespace llvm;

28

29#define DEBUG_TYPE "opt-phis"

30

31STATISTIC(NumPHICycles, "Number of PHI cycles replaced");

32STATISTIC(NumDeadPHICycles, "Number of dead PHI cycles");

33

34namespace {

35

36class OptimizePHIs {

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40public:

42

43private:

46

47 bool IsSingleValuePHICycle(MachineInstr *MI, unsigned &SingleValReg,

48 InstrSet &PHIsInCycle);

49 bool IsDeadPHICycle(MachineInstr *MI, InstrSet &PHIsInCycle);

51};

52

54public:

55 static char ID;

58 }

59

62 return false;

63 OptimizePHIs OP;

64 return OP.run(MF);

65 }

66

70 }

71};

72}

73

74char OptimizePHIsLegacy::ID = 0;

75

77

79 "Optimize machine instruction PHIs", false, false)

80

83 OptimizePHIs OP;

84 if (OP.run(MF))

88 return PA;

89}

90

94

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98

99 bool Changed = false;

101 Changed |= OptimizeBB(MBB);

102

103 return Changed;

104}

105

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111bool OptimizePHIs::IsSingleValuePHICycle(MachineInstr *MI,

112 unsigned &SingleValReg,

113 InstrSet &PHIsInCycle) {

114 assert(MI->isPHI() && "IsSingleValuePHICycle expects a PHI instruction");

115 Register DstReg = MI->getOperand(0).getReg();

116

117

118 if (!PHIsInCycle.insert(MI).second)

119 return true;

120

121

122 if (PHIsInCycle.size() == 16)

123 return false;

124

125

126 for (unsigned i = 1; i != MI->getNumOperands(); i += 2) {

127 Register SrcReg = MI->getOperand(i).getReg();

128 if (SrcReg == DstReg)

129 continue;

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137 SrcMI = MRI->getVRegDef(SrcReg);

138 }

139 if (!SrcMI)

140 return false;

141

142 if (SrcMI->isPHI()) {

143 if (!IsSingleValuePHICycle(SrcMI, SingleValReg, PHIsInCycle))

144 return false;

145 } else {

146

147 if (SingleValReg != 0 && SingleValReg != SrcReg)

148 return false;

149 SingleValReg = SrcReg;

150 }

151 }

152 return true;

153}

154

155

156

157bool OptimizePHIs::IsDeadPHICycle(MachineInstr *MI, InstrSet &PHIsInCycle) {

158 assert(MI->isPHI() && "IsDeadPHICycle expects a PHI instruction");

159 Register DstReg = MI->getOperand(0).getReg();

160 assert(DstReg.isVirtual() && "PHI destination is not a virtual register");

161

162

163 if (!PHIsInCycle.insert(MI).second)

164 return true;

165

166

167 if (PHIsInCycle.size() == 16)

168 return false;

169

171 if (UseMI.isPHI() || !IsDeadPHICycle(&UseMI, PHIsInCycle))

172 return false;

173 }

174

175 return true;

176}

177

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181 bool Changed = false;

185 if (MI->isPHI())

186 break;

187

188

189 unsigned SingleValReg = 0;

190 InstrSet PHIsInCycle;

191 if (IsSingleValuePHICycle(MI, SingleValReg, PHIsInCycle) &&

192 SingleValReg != 0) {

193 Register OldReg = MI->getOperand(0).getReg();

194 if (MRI->constrainRegClass(SingleValReg, MRI->getRegClass(OldReg)))

195 continue;

196

197 MRI->replaceRegWith(OldReg, SingleValReg);

198 MI->eraseFromParent();

199

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201 MRI->clearKillFlags(SingleValReg);

202

203 ++NumPHICycles;

204 Changed = true;

205 continue;

206 }

207

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209 PHIsInCycle.clear();

210 if (IsDeadPHICycle(MI, PHIsInCycle)) {

212 if (MII == PhiMI)

213 ++MII;

214 PhiMI->eraseFromParent();

215 }

216 ++NumDeadPHICycles;

217 Changed = true;

218 }

219 }

220 return Changed;

221}

unsigned const MachineRegisterInfo * MRI

MachineInstrBuilder & UseMI

const HexagonInstrInfo * TII

#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)

assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())

This file defines the SmallPtrSet class.

This file defines the 'Statistic' class, which is designed to be an easy way to expose various metric...

#define STATISTIC(VARNAME, DESC)

A container for analyses that lazily runs them and caches their results.

Represent the analysis usage information of a pass.

void setPreservesCFG()

This function should be called by the pass, iff they do not:

Represents analyses that only rely on functions' control flow.

bool skipFunction(const Function &F) const

Optional passes call this function to check whether the pass should be skipped.

MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...

void getAnalysisUsage(AnalysisUsage &AU) const override

getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.

virtual bool runOnMachineFunction(MachineFunction &MF)=0

runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...

const TargetSubtargetInfo & getSubtarget() const

getSubtarget - Return the subtarget for which this machine code is being compiled.

MachineRegisterInfo & getRegInfo()

getRegInfo - Return information about the registers currently in use.

Function & getFunction()

Return the LLVM function that this machine code represents.

Representation of each machine instruction.

const MachineOperand & getOperand(unsigned i) const

unsigned getSubReg() const

Register getReg() const

getReg - Returns the register number.

MachineRegisterInfo - Keep track of information for virtual and physical registers,...

static PassRegistry * getPassRegistry()

getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...

A set of analyses that are preserved following a run of a transformation pass.

static PreservedAnalyses all()

Construct a special preserved set that preserves all passes.

Wrapper class representing virtual and physical registers.

constexpr bool isVirtual() const

Return true if the specified register number is in the virtual register namespace.

SmallPtrSetIterator - This implements a const_iterator for SmallPtrSet.

SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.

TargetInstrInfo - Interface to description of machine instruction set.

virtual const TargetInstrInfo * getInstrInfo() const

unsigned ID

LLVM IR allows to use arbitrary numbers as calling convention identifiers.

This is an optimization pass for GlobalISel generic memory operations.

PreservedAnalyses getMachineFunctionPassPreservedAnalyses()

Returns the minimum set of Analyses that all machine function passes must preserve.

char & OptimizePHIsLegacyID

OptimizePHIs - This pass optimizes machine instruction PHIs to take advantage of opportunities create...

void initializeOptimizePHIsLegacyPass(PassRegistry &)