PPCTargetTransformInfo.h Source File (original) (raw)

16#ifndef LLVM_LIB_TARGET_POWERPC_PPCTARGETTRANSFORMINFO_H

17#define LLVM_LIB_TARGET_POWERPC_PPCTARGETTRANSFORMINFO_H

23#include

25namespace llvm {

30 friend BaseT;

35 const PPCSubtarget *getST() const { return ST; }

38public:

40 : BaseT(TM, F.getDataLayout()), ST(TM->getSubtargetImpl(F)),

41 TLI(ST->getTargetLowering()) {}

43 std::optional<Instruction *>

56 Instruction *Inst = nullptr) const override;

98 Type *Ty = nullptr) const override;

106 Type *Ty2) const;

112 const Instruction *CxtI = nullptr) const override;

117 const Instruction *CxtI = nullptr) const override;

121 const Instruction *I = nullptr) const override;

123 const Instruction *I = nullptr) const override;

129 const Instruction *I = nullptr) const override;

133 unsigned Index, const Value *Op0,

134 const Value *Op1) const override;

136 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace,

139 const Instruction *I = nullptr) const override;

141 unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef Indices,

143 bool UseMaskForCond = false, bool UseMaskForGaps = false) const override;

148 const Function *Callee) const override;

152

153 TargetTransformInfo::VPLegalization

155

156private:

157

159

160

161};

162

163}

164

165#endif

This file provides a helper that implements much of the TTI interface in terms of the target-independ...

Analysis containing CSE Info

static cl::opt< OutputCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(OutputCostKind::RecipThroughput), cl::values(clEnumValN(OutputCostKind::RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(OutputCostKind::Latency, "latency", "Instruction latency"), clEnumValN(OutputCostKind::CodeSize, "code-size", "Code size"), clEnumValN(OutputCostKind::SizeAndLatency, "size-latency", "Code size and latency"), clEnumValN(OutputCostKind::All, "all", "Print all cost kinds")))

uint64_t IntrinsicInst * II

This file describes how to lower LLVM code to machine code.

This pass exposes codegen information to IR-level passes.

Class for arbitrary precision integers.

ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...

A cache of @llvm.assume calls within a function.

InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, const Value *Op0, const Value *Op1) const override

BasicTTIImplBase(const TargetMachine *TM, const DataLayout &DL)

Conditional or Unconditional Branch instruction.

Predicate

This enumeration lists the possible predicates for CmpInst subclasses.

Concrete subclass of DominatorTreeBase that is used to compute a normal dominator tree.

The core instruction combiner logic.

A wrapper class for inspecting calls to intrinsic functions.

Represents a single loop in the control flow graph.

bool isLSRCostLess(const TargetTransformInfo::LSRCost &C1, const TargetTransformInfo::LSRCost &C2) const override

InstructionCost vectorCostAdjustmentFactor(unsigned Opcode, Type *Ty1, Type *Ty2) const

InstructionCost getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Op1Info={TTI::OK_AnyValue, TTI::OP_None}, TTI::OperandValueInfo Op2Info={TTI::OK_AnyValue, TTI::OP_None}, ArrayRef< const Value * > Args={}, const Instruction *CxtI=nullptr) const override

InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, TTI::OperandValueInfo OpInfo={TTI::OK_AnyValue, TTI::OP_None}, const Instruction *I=nullptr) const override

InstructionCost getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, bool UseMaskForCond=false, bool UseMaskForGaps=false) const override

bool enableInterleavedAccessVectorization() const override

unsigned getRegisterClassForType(bool Vector, Type *Ty=nullptr) const override

bool canSaveCmp(Loop *L, BranchInst **BI, ScalarEvolution *SE, LoopInfo *LI, DominatorTree *DT, AssumptionCache *AC, TargetLibraryInfo *LibInfo) const override

TTI::MemCmpExpansionOptions enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const override

unsigned getCacheLineSize() const override

PPCTTIImpl(const PPCTargetMachine *TM, const Function &F)

Definition PPCTargetTransformInfo.h:39

PPCRegisterClass

Definition PPCTargetTransformInfo.h:93

@ VRRC

Definition PPCTargetTransformInfo.h:94

@ VSXRC

Definition PPCTargetTransformInfo.h:94

@ GPRRC

Definition PPCTargetTransformInfo.h:94

@ FPRRC

Definition PPCTargetTransformInfo.h:94

bool useColdCCForColdCall(Function &F) const override

void getUnrollingPreferences(Loop *L, ScalarEvolution &SE, TTI::UnrollingPreferences &UP, OptimizationRemarkEmitter *ORE) const override

bool getTgtMemIntrinsic(IntrinsicInst *Inst, MemIntrinsicInfo &Info) const override

TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const override

bool isNumRegsMajorCostOfLSR() const override

unsigned getPrefetchDistance() const override

TargetTransformInfo::VPLegalization getVPLegalizationStrategy(const VPIntrinsic &PI) const override

bool areInlineCompatible(const Function *Caller, const Function *Callee) const override

unsigned getNumberOfRegisters(unsigned ClassID) const override

bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const override

void getPeelingPreferences(Loop *L, ScalarEvolution &SE, TTI::PeelingPreferences &PP) const override

InstructionCost getIntImmCostInst(unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind, Instruction *Inst=nullptr) const override

InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const override

InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const override

Get intrinsic cost based on arguments.

const char * getRegisterClassName(unsigned ClassID) const override

InstructionCost getInstructionCost(const User *U, ArrayRef< const Value * > Operands, TTI::TargetCostKind CostKind) const override

unsigned getMaxInterleaveFactor(ElementCount VF) const override

bool shouldBuildRelLookupTables() const override

bool supportsTailCallFor(const CallBase *CB) const override

InstructionCost getShuffleCost(TTI::ShuffleKind Kind, VectorType *DstTy, VectorType *SrcTy, ArrayRef< int > Mask, TTI::TargetCostKind CostKind, int Index, VectorType *SubTp, ArrayRef< const Value * > Args={}, const Instruction *CxtI=nullptr) const override

InstructionCost getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind) const override

bool areTypesABICompatible(const Function *Caller, const Function *Callee, ArrayRef< Type * > Types) const override

TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth) const override

InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Op1Info={TTI::OK_AnyValue, TTI::OP_None}, TTI::OperandValueInfo Op2Info={TTI::OK_AnyValue, TTI::OP_None}, const Instruction *I=nullptr) const override

bool enableAggressiveInterleaving(bool LoopHasReductions) const override

InstructionCost getIntImmCost(const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind) const override

InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, const Value *Op0, const Value *Op1) const override

InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const override

std::optional< Instruction * > instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const override

Common code between 32-bit and 64-bit PowerPC targets.

The main scalar evolution driver.

Provides information about what library functions are available for the current target.

virtual const DataLayout & getDataLayout() const

virtual InstructionCost getIntImmCost(const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind) const

This pass provides access to the codegen interfaces that are needed for IR-level transformations.

TargetCostKind

The kind of cost model.

PopcntSupportKind

Flags indicating the kind of support for population count.

ShuffleKind

The various kinds of shuffle patterns for vector queries.

CastContextHint

Represents a hint about the context in which a cast is used.

The instances of the Type class are immutable: once they are created, they are never changed.

constexpr char Args[]

Key for Kernel::Metadata::mArgs.

friend class Instruction

Iterator for Instructions in a `BasicBlock.

This is an optimization pass for GlobalISel generic memory operations.

FunctionAddr VTableAddr Value

ArrayRef(const T &OneElt) -> ArrayRef< T >

Attributes of a target dependent hardware loop.

Information about a load/store intrinsic defined by the target.

Returns options for expansion of memcmp. IsZeroCmp is.

Parameters that control the generic loop unrolling transformation.