ProcessImplicitDefs.cpp Source File (original) (raw)

23using namespace llvm;

25#define DEBUG_TYPE "processimpdefs"

27namespace {

31public:

32 static char ID;

36 }

38 void getAnalysisUsage(AnalysisUsage &AU) const override;

44 }

45};

47class ProcessImplicitDefs {

57public:

59};

60}

62char ProcessImplicitDefsLegacy::ID = 0;

66 "Process Implicit Definitions", false, false)

68void ProcessImplicitDefsLegacy::getAnalysisUsage(AnalysisUsage &AU) const {

69 AU.setPreservesCFG();

72}

74bool ProcessImplicitDefs::canTurnIntoImplicitDef(MachineInstr *MI) {

75 if (->isCopyLike() &&

76 ->isInsertSubreg() &&

77 ->isRegSequence() &&

78 ->isPHI())

79 return false;

80 for (const MachineOperand &MO : MI->all_uses())

81 if (MO.readsReg())

82 return false;

83 return true;

84}

86void ProcessImplicitDefs::processImplicitDef(MachineInstr *MI) {

93 for (MachineOperand &MO : MRI->use_nodbg_operands(Reg)) {

94 MO.setIsUndef();

95 MachineInstr *UserMI = MO.getParent();

96 if (!canTurnIntoImplicitDef(UserMI))

97 continue;

98 LLVM_DEBUG(dbgs() << "Converting to IMPLICIT_DEF: " << *UserMI);

99 UserMI->setDesc(TII->get(TargetOpcode::IMPLICIT_DEF));

100 WorkList.insert(UserMI);

101 }

102 MI->eraseFromParent();

103 return;

104 }

105

106

107

110 bool Found = false;

111 for (++UserMI; UserMI != UserE; ++UserMI) {

112 for (MachineOperand &MO : UserMI->operands()) {

113 if (!MO.isReg())

114 continue;

115 Register UserReg = MO.getReg();

116 if (!UserReg.isPhysical() || TRI ->regsOverlap(Reg, UserReg))

117 continue;

118

119 Found = true;

120 if (MO.isUse())

121 MO.setIsUndef();

122 }

123 if (Found)

124 break;

125 }

126

127

128 if (Found) {

130 MI->eraseFromParent();

131 return;

132 }

133

134

135

136 for (unsigned i = MI->getNumOperands() - 1; i; --i)

137 MI->removeOperand(i);

139}

140

141bool ProcessImplicitDefsLegacy::runOnMachineFunction(MachineFunction &MF) {

142 return ProcessImplicitDefs().run(MF);

143}

144

145PreservedAnalyses

148 if (!ProcessImplicitDefs().run(MF))

150

153 .preserve();

154}

155

156

157

159

160 LLVM_DEBUG(dbgs() << "********** PROCESS IMPLICIT DEFS **********\n"

161 << "********** Function: " << MF.getName() << '\n');

162

164

168 assert(WorkList.empty() && "Inconsistent worklist state");

169

171

173 if (MI.isImplicitDef())

174 WorkList.insert(&MI);

175

176 if (WorkList.empty())

177 continue;

178

180 << " implicit defs.\n");

182

183

184 do processImplicitDef(WorkList.pop_back_val());

185 while (!WorkList.empty());

186 }

188}

unsigned const MachineRegisterInfo * MRI

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

const TargetInstrInfo & TII

Promote Memory to Register

#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)

This file implements a set that has insertion order iteration characteristics.

A wrapper pass to provide the legacy pass manager access to a suitably prepared AAResults object.

Represent the analysis usage information of a pass.

Represents analyses that only rely on functions' control flow.

const MCInstrDesc & get(unsigned Opcode) const

Return the machine instruction descriptor that corresponds to the specified instruction opcode.

Instructions::iterator instr_iterator

MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...

void getAnalysisUsage(AnalysisUsage &AU) const override

getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.

Properties which a MachineFunction may have at a given point in time.

const TargetSubtargetInfo & getSubtarget() const

getSubtarget - Return the subtarget for which this machine code is being compiled.

StringRef getName() const

getName - Return the name of the corresponding LLVM function.

MachineRegisterInfo & getRegInfo()

getRegInfo - Return information about the registers currently in use.

Representation of each machine instruction.

LLVM_ABI void setDesc(const MCInstrDesc &TID)

Replace the instruction descriptor (thus opcode) of the current instruction with a new one.

MachineRegisterInfo - Keep track of information for virtual and physical registers,...

static LLVM_ABI PassRegistry * getPassRegistry()

getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...

static PreservedAnalyses all()

Construct a special preserved set that preserves all passes.

PreservedAnalyses & preserveSet()

Mark an analysis set as preserved.

PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM)

Definition ProcessImplicitDefs.cpp:146

constexpr bool isVirtual() const

Return true if the specified register number is in the virtual register namespace.

constexpr bool isPhysical() const

Return true if the specified register number is in the physical register namespace.

A SetVector that performs no allocations if smaller than a certain size.

TargetInstrInfo - Interface to description of machine instruction set.

TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...

virtual const TargetInstrInfo * getInstrInfo() const

virtual const TargetRegisterInfo * getRegisterInfo() const =0

Return the target's register information.

unsigned ID

LLVM IR allows to use arbitrary numbers as calling convention identifiers.

This is an optimization pass for GlobalISel generic memory operations.

AnalysisManager< MachineFunction > MachineFunctionAnalysisManager

LLVM_ABI PreservedAnalyses getMachineFunctionPassPreservedAnalyses()

Returns the minimum set of Analyses that all machine function passes must preserve.

LLVM_ABI raw_ostream & dbgs()

dbgs() - This returns a reference to a raw_ostream for debugging messages.

LLVM_ABI void initializeProcessImplicitDefsLegacyPass(PassRegistry &)

LLVM_ABI char & ProcessImplicitDefsID

ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs.

Definition ProcessImplicitDefs.cpp:63

LLVM_ABI Printable printMBBReference(const MachineBasicBlock &MBB)

Prints a machine basic block reference.