LLVM: lib/Target/RISCV/RISCVLateBranchOpt.cpp Source File (original) (raw)

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18using namespace llvm;

19

20#define RISCV_LATE_BRANCH_OPT_NAME "RISC-V Late Branch Optimisation Pass"

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22namespace {

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25 static char ID;

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31 void getAnalysisUsage(AnalysisUsage &AU) const override {

33 }

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36

37private:

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41};

42}

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44char RISCVLateBranchOpt::ID = 0;

47

51 if (RII->analyzeBranch(MBB, TBB, FBB, Cond, false))

52 return false;

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55 return false;

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63

64 int64_t C0, C1;

67 return false;

68

71

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73 RII->removeBranch(MBB);

74

75

76 if (Folded) {

78 RII->insertBranch(MBB, Folded, nullptr, {}, DL);

79 }

80

81

82 while (MBB.succ_empty())

83 MBB.removeSuccessor(MBB.succ_end() - 1);

84

85

86 if (!Folded) {

88 if (Fallthrough != MBB.getParent()->end())

89 MBB.addSuccessor(&*Fallthrough);

90 } else

91 MBB.addSuccessor(Folded);

92

93 return true;

94}

95

96bool RISCVLateBranchOpt::runOnMachineFunction(MachineFunction &Fn) {

98 return false;

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101 RII = ST.getInstrInfo();

102

104 for (MachineBasicBlock &MBB : Fn)

107}

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110 return new RISCVLateBranchOpt();

111}

unsigned const MachineRegisterInfo * MRI

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL

static bool runOnBasicBlock(MachineBasicBlock *MBB, unsigned BasicBlockNum, VRegRenamer &Renamer)

#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)

#define RISCV_LATE_BRANCH_OPT_NAME

Definition RISCVLateBranchOpt.cpp:20

const SmallVectorImpl< MachineOperand > MachineBasicBlock * TBB

const SmallVectorImpl< MachineOperand > & Cond

Represent the analysis usage information of a pass.

FunctionPass class - This class is used to implement most global optimizations.

MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...

void getAnalysisUsage(AnalysisUsage &AU) const override

getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.

const TargetSubtargetInfo & getSubtarget() const

getSubtarget - Return the subtarget for which this machine code is being compiled.

Function & getFunction()

Return the LLVM function that this machine code represents.

BasicBlockListType::iterator iterator

MachineRegisterInfo - Keep track of information for virtual and physical registers,...

static RISCVCC::CondCode getCondFromBranchOpc(unsigned Opc)

static bool evaluateCondBranch(RISCVCC::CondCode CC, int64_t C0, int64_t C1)

Return the result of the evaluation of C0 CC C1, where CC is a RISCVCC::CondCode.

static bool isFromLoadImm(const MachineRegisterInfo &MRI, const MachineOperand &Op, int64_t &Imm)

Return true if the operand is a load immediate instruction and sets Imm to the immediate value.

This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.

StringRef - Represent a constant reference to a string, i.e.

unsigned ID

LLVM IR allows to use arbitrary numbers as calling convention identifiers.

This is an optimization pass for GlobalISel generic memory operations.

FunctionPass * createRISCVLateBranchOptPass()

Definition RISCVLateBranchOpt.cpp:109