RISCVRedundantCopyElimination.cpp Source File (original) (raw)

33using namespace llvm;

35#define DEBUG_TYPE "riscv-copyelim"

37 STATISTIC(NumCopiesRemoved, "Number of copies removed.");

39namespace {

45public:

46 static char ID;

50 }

55 MachineFunctionProperties::Property::NoVRegs);

56 }

59 return "RISC-V Redundant Copy Elimination";

60 }

62private:

64};

66}

68char RISCVRedundantCopyElimination::ID = 0;

71 "RISC-V Redundant Copy Elimination", false, false)

73static bool

77 assert(Cond.size() == 3 && "Unexpected number of operands");

78 assert(TBB != nullptr && "Expected branch target basic block");

81 Cond[2].getReg() == RISCV::X0 && TBB == &MBB)

82 return true;

84 Cond[2].getReg() == RISCV::X0 && TBB != &MBB)

85 return true;

86 return false;

87}

92 return false;

98 return false;

103 Cond.empty())

104 return false;

105

106

107 if (!guaranteesZeroRegInBlock(MBB, Cond, TBB))

108 return false;

109

111 if (!TargetReg)

112 return false;

113

114 bool Changed = false;

116

119 ++I;

120 if (MI->isCopy() && MI->getOperand(0).isReg() &&

121 MI->getOperand(1).isReg()) {

122 Register DefReg = MI->getOperand(0).getReg();

123 Register SrcReg = MI->getOperand(1).getReg();

124

125 if (SrcReg == RISCV::X0 && MRI ->isReserved(DefReg) &&

126 TargetReg == DefReg) {

129

130 MI->eraseFromParent();

131 Changed = true;

132 LastChange = I;

133 ++NumCopiesRemoved;

134 continue;

135 }

136 }

137

138 if (MI->modifiesRegister(TargetReg, TRI))

139 break;

140 }

141

142 if (!Changed)

143 return false;

144

146 assert((CondBr->getOpcode() == RISCV::BEQ ||

147 CondBr->getOpcode() == RISCV::BNE) &&

148 "Unexpected opcode");

149 assert(CondBr->getOperand(0).getReg() == TargetReg && "Unexpected register");

150

151

152

153 CondBr->clearRegisterKills(TargetReg, TRI);

154

155

158

159

161 MMI.clearRegisterKills(TargetReg, TRI);

162

163 return true;

164}

165

166bool RISCVRedundantCopyElimination::runOnMachineFunction(MachineFunction &MF) {

168 return false;

169

173

174 bool Changed = false;

177

178 return Changed;

179}

180

182 return new RISCVRedundantCopyElimination();

183}

unsigned const MachineRegisterInfo * MRI

const HexagonInstrInfo * TII

unsigned const TargetRegisterInfo * TRI

static bool isReg(const MCInst &MI, unsigned OpNo)

#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)

const SmallVectorImpl< MachineOperand > MachineBasicBlock * TBB

const SmallVectorImpl< MachineOperand > & Cond

assert(TBB !=nullptr &&"Expected branch target basic block")

static bool optimizeBlock(BasicBlock &BB, bool &ModifiedDT, const TargetTransformInfo &TTI, const DataLayout &DL, bool HasBranchDivergence, DomTreeUpdater *DTU)

This file defines the 'Statistic' class, which is designed to be an easy way to expose various metric...

#define STATISTIC(VARNAME, DESC)

FunctionPass class - This class is used to implement most global optimizations.

bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const override

Analyze the branching code at the end of MBB, returning true if it cannot be understood (e....

unsigned pred_size() const

iterator getFirstTerminator()

Returns an iterator to the first terminator instruction of this basic block.

unsigned succ_size() const

pred_iterator pred_begin()

void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())

Adds the specified register as a live in.

bool isLiveIn(MCRegister Reg, LaneBitmask LaneMask=LaneBitmask::getAll()) const

Return true if the specified register is in the live in set.

MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...

virtual bool runOnMachineFunction(MachineFunction &MF)=0

runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...

virtual MachineFunctionProperties getRequiredProperties() const

Properties which a MachineFunction may have at a given point in time.

MachineFunctionProperties & set(Property P)

const TargetSubtargetInfo & getSubtarget() const

getSubtarget - Return the subtarget for which this machine code is being compiled.

MachineRegisterInfo & getRegInfo()

getRegInfo - Return information about the registers currently in use.

Function & getFunction()

Return the LLVM function that this machine code represents.

Representation of each machine instruction.

MachineOperand class - Representation of each machine instruction operand.

MachineRegisterInfo - Keep track of information for virtual and physical registers,...

static PassRegistry * getPassRegistry()

getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...

virtual void print(raw_ostream &OS, const Module *M) const

print - Print out the internal state of the pass.

virtual StringRef getPassName() const

getPassName - Return a nice clean name for a pass.

Wrapper class representing virtual and physical registers.

This class consists of common code factored out of the SmallVector class to reduce code duplication b...

This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.

StringRef - Represent a constant reference to a string, i.e.

TargetInstrInfo - Interface to description of machine instruction set.

TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...

virtual const TargetRegisterInfo * getRegisterInfo() const

getRegisterInfo - If register information is available, return it.

virtual const TargetInstrInfo * getInstrInfo() const

unsigned ID

LLVM IR allows to use arbitrary numbers as calling convention identifiers.

This is an optimization pass for GlobalISel generic memory operations.

iterator_range< T > make_range(T x, T y)

Convenience function for iterating over sub-ranges.

void initializeRISCVRedundantCopyEliminationPass(PassRegistry &)

FunctionPass * createRISCVRedundantCopyEliminationPass()

raw_ostream & dbgs()

dbgs() - This returns a reference to a raw_ostream for debugging messages.