RISCVTargetTransformInfo.h Source File (original) (raw)

16#ifndef LLVM_LIB_TARGET_RISCV_RISCVTARGETTRANSFORMINFO_H

17#define LLVM_LIB_TARGET_RISCV_RISCVTARGETTRANSFORMINFO_H

24#include

26namespace llvm {

32 friend BaseT;

48 unsigned getEstimatedVLFor(VectorType *Ty) const;

71public:

73 : BaseT(TM, F.getDataLayout()), ST(TM->getSubtargetImpl(F)),

74 TLI(ST->getTargetLowering()) {}

86 Instruction *Inst = nullptr) const override;

102

104 unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType,

108

111 return ST->hasVInstructions();

112 }

115 return ST->hasVInstructions();

116 }

118 return ST->hasVInstructions();

119 }

125 std::optional getMaxVScale() const override;

127

130

132

133 unsigned getMaximumVF(unsigned ElemWidth, unsigned Opcode) const override;

134

136

138

139

140

141 return false;

142 }

143

145

149

152

157

161

164

167

169 return ST->useRVVForFixedLengthVectors() ? 16 : 0;

170 }

171

176 const Instruction *CxtI = nullptr) const override;

177

179 VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract,

182

186

190

192 unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef Indices,

194 bool UseMaskForCond = false, bool UseMaskForGaps = false) const override;

195

198

202

205

208

212 const Instruction *I = nullptr) const override;

213

217

220 std::optional FMF,

222

225 VectorType *ValTy, std::optional FMF,

227

229 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace,

232 const Instruction *I = nullptr) const override;

233

239 const Instruction *I = nullptr) const override;

240

242 const Instruction *I = nullptr) const override;

243

247 unsigned Index, const Value *Op0,

248 const Value *Op1) const override;

249

253 unsigned Index) const override;

254

260 const Instruction *CxtI = nullptr) const override;

261

263 return TLI->isLegalElementTypeForRVV(TLI->getValueType(DL, Ty));

264 }

265

267 if (!ST->hasVInstructions())

268 return false;

269

270 EVT DataTypeVT = TLI->getValueType(DL, DataType);

271

272

273 if (DataTypeVT.isFixedLengthVector() && !ST->useRVVForFixedLengthVectors())

274 return false;

275

277 if (!ST->enableUnalignedVectorMem() && Alignment < ElemType.getStoreSize())

278 return false;

279

280 return TLI->isLegalElementTypeForRVV(ElemType);

281 }

282

293

295 if (!ST->hasVInstructions())

296 return false;

297

298 EVT DataTypeVT = TLI->getValueType(DL, DataType);

299

300

301 if (DataTypeVT.isFixedLengthVector() && !ST->useRVVForFixedLengthVectors())

302 return false;

303

304

305 EVT PointerTypeVT = EVT(TLI->getPointerTy(DL));

307 !TLI->isLegalElementTypeForRVV(PointerTypeVT))

308 return false;

309

311 if (!ST->enableUnalignedVectorMem() && Alignment < ElemType.getStoreSize())

312 return false;

313

314 return TLI->isLegalElementTypeForRVV(ElemType);

315 }

316

323

325 Align Alignment) const override {

326

327 return ST->is64Bit() && !ST->hasVInstructionsI64();

328 }

329

331 Align Alignment) const override {

332

333 return ST->is64Bit() && !ST->hasVInstructionsI64();

334 }

335

337 EVT DataTypeVT = TLI->getValueType(DL, DataType);

338 return TLI->isLegalStridedLoadStore(DataTypeVT, Alignment);

339 }

340

343 unsigned AddrSpace) const override {

344 return TLI->isLegalInterleavedAccessType(VTy, Factor, Alignment, AddrSpace,

346 }

347

349

351

353 return TLI->isVScaleKnownToBeAPowerOfTwo();

354 }

355

356

357

361 if (!ST->hasVInstructions() ||

364 ->getElementType()

365 ->getIntegerBitWidth() != 1))

368 }

369

373 return true;

374

376 if (!TLI->isLegalElementTypeForRVV(TLI->getValueType(DL, Ty)))

377 return false;

378

392 return true;

396

397

398 if (Ty->isBFloatTy() || (Ty->isHalfTy() && !ST->hasVInstructionsF16()))

399 return false;

400 return true;

401 default:

402 return false;

403 }

404 }

405

407

409 return 1;

410

411

412 return VF.isScalar() ? 1 : ST->getMaxInterleaveFactor();

413 }

414

416

418 return ST->hasVInstructions();

419 }

420

422

425 switch (ClassID) {

427

428

429 return 31;

431 if (ST->hasStdExtF())

432 return 32;

433 return 0;

435

436

437

438

439 return ST->hasVInstructions() ? 32 : 0;

440 }

442 }

443

446

448 Type *Ty = nullptr) const override {

451 if (!Ty)

453

455 if ((ScalarTy->isHalfTy() && ST->hasStdExtZfhmin()) ||

456 (ScalarTy->isFloatTy() && ST->hasStdExtF()) ||

457 (ScalarTy->isDoubleTy() && ST->hasStdExtD())) {

459 }

460

462 }

463

465 switch (ClassID) {

467 return "RISCV::GPRRC";

469 return "RISCV::FPRRC";

471 return "RISCV::VRRC";

472 }

474 }

475

478

481 bool &AllowPromotionWithoutCommonHeader) const override;

482 std::optional getMinPageSize() const override { return 4096; }

483

484

486

487

488 bool canSplatOperand(unsigned Opcode, int Operand) const;

489

492

495};

496

497}

498

499#endif

This file provides a helper that implements much of the TTI interface in terms of the target-independ...

Analysis containing CSE Info

static cl::opt< OutputCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(OutputCostKind::RecipThroughput), cl::values(clEnumValN(OutputCostKind::RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(OutputCostKind::Latency, "latency", "Instruction latency"), clEnumValN(OutputCostKind::CodeSize, "code-size", "Code size"), clEnumValN(OutputCostKind::SizeAndLatency, "size-latency", "Code size and latency"), clEnumValN(OutputCostKind::All, "all", "Print all cost kinds")))

TargetTransformInfo::VPLegalization VPLegalization

const AbstractManglingParser< Derived, Alloc >::OperatorInfo AbstractManglingParser< Derived, Alloc >::Ops[]

uint64_t IntrinsicInst * II

This pass exposes codegen information to IR-level passes.

Class for arbitrary precision integers.

ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...

InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, const Value *Op0, const Value *Op1) const override

BasicTTIImplBase(const TargetMachine *TM, const DataLayout &DL)

Value * getArgOperand(unsigned i) const

Predicate

This enumeration lists the possible predicates for CmpInst subclasses.

constexpr bool isScalar() const

Exactly one element.

Class to represent fixed width SIMD vectors.

A wrapper class for inspecting calls to intrinsic functions.

Intrinsic::ID getIntrinsicID() const

Return the intrinsic ID of this intrinsic.

Represents a single loop in the control flow graph.

Information for memory intrinsic cost model.

InstructionCost getExtendedReductionCost(unsigned Opcode, bool IsUnsigned, Type *ResTy, VectorType *ValTy, std::optional< FastMathFlags > FMF, TTI::TargetCostKind CostKind) const override

bool supportsScalableVectors() const override

Definition RISCVTargetTransformInfo.h:110

InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const override

InstructionCost getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Op1Info={TTI::OK_AnyValue, TTI::OP_None}, TTI::OperandValueInfo Op2Info={TTI::OK_AnyValue, TTI::OP_None}, ArrayRef< const Value * > Args={}, const Instruction *CxtI=nullptr) const override

bool isLegalMaskedExpandLoad(Type *DataType, Align Alignment) const override

InstructionCost getStridedMemoryOpCost(const MemIntrinsicCostAttributes &MICA, TTI::TargetCostKind CostKind) const

RISCVRegisterClass

Definition RISCVTargetTransformInfo.h:423

@ GPRRC

Definition RISCVTargetTransformInfo.h:423

@ FPRRC

Definition RISCVTargetTransformInfo.h:423

@ VRRC

Definition RISCVTargetTransformInfo.h:423

bool isLegalMaskedLoadStore(Type *DataType, Align Alignment) const

Definition RISCVTargetTransformInfo.h:266

InstructionCost getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind) const override

unsigned getMinTripCountTailFoldingThreshold() const override

unsigned getRegisterClassForType(bool Vector, Type *Ty=nullptr) const override

Definition RISCVTargetTransformInfo.h:447

TTI::AddressingModeKind getPreferredAddressingMode(const Loop *L, ScalarEvolution *SE) const override

bool preferEpilogueVectorization() const override

Definition RISCVTargetTransformInfo.h:137

InstructionCost getAddressComputationCost(Type *PTy, ScalarEvolution *SE, const SCEV *Ptr, TTI::TargetCostKind CostKind) const override

InstructionCost getStoreImmCost(Type *VecTy, TTI::OperandValueInfo OpInfo, TTI::TargetCostKind CostKind) const

Return the cost of materializing an immediate for a value operand of a store instruction.

bool isLegalMaskedStore(Type *DataType, Align Alignment, unsigned, TTI::MaskKind) const override

Definition RISCVTargetTransformInfo.h:288

bool getTgtMemIntrinsic(IntrinsicInst *Inst, MemIntrinsicInfo &Info) const override

bool isElementTypeLegalForScalableVector(Type *Ty) const override

Definition RISCVTargetTransformInfo.h:262

bool enableMaskedInterleavedAccessVectorization() const override

Definition RISCVTargetTransformInfo.h:417

bool isLegalInterleavedAccessType(VectorType *VTy, unsigned Factor, Align Alignment, unsigned AddrSpace) const override

Definition RISCVTargetTransformInfo.h:341

std::optional< unsigned > getMinPageSize() const override

Definition RISCVTargetTransformInfo.h:482

InstructionCost getCostOfKeepingLiveOverCall(ArrayRef< Type * > Tys) const override

bool preferPredicateOverEpilogue(TailFoldingInfo *TFI) const override

Definition RISCVTargetTransformInfo.h:117

bool hasActiveVectorLength() const override

InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const override

bool shouldConsiderVectorizationRegPressure() const override

Definition RISCVTargetTransformInfo.h:144

InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Op1Info={TTI::OK_AnyValue, TTI::OP_None}, TTI::OperandValueInfo Op2Info={TTI::OK_AnyValue, TTI::OP_None}, const Instruction *I=nullptr) const override

InstructionCost getIndexedVectorInstrCostFromEnd(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index) const override

void getUnrollingPreferences(Loop *L, ScalarEvolution &SE, TTI::UnrollingPreferences &UP, OptimizationRemarkEmitter *ORE) const override

bool forceScalarizeMaskedScatter(VectorType *VTy, Align Alignment) const override

Definition RISCVTargetTransformInfo.h:330

const char * getRegisterClassName(unsigned ClassID) const override

Definition RISCVTargetTransformInfo.h:464

InstructionCost getIntImmCostInst(unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind, Instruction *Inst=nullptr) const override

InstructionCost getMinMaxReductionCost(Intrinsic::ID IID, VectorType *Ty, FastMathFlags FMF, TTI::TargetCostKind CostKind) const override

Try to calculate op costs for min/max reduction operations.

bool canSplatOperand(Instruction *I, int Operand) const

Return true if the (vector) instruction I will be lowered to an instruction with a scalar splat opera...

bool enableInterleavedAccessVectorization() const override

Definition RISCVTargetTransformInfo.h:415

bool isLegalMaskedGatherScatter(Type *DataType, Align Alignment) const

Definition RISCVTargetTransformInfo.h:294

bool isLSRCostLess(const TargetTransformInfo::LSRCost &C1, const TargetTransformInfo::LSRCost &C2) const override

bool isLegalStridedLoadStore(Type *DataType, Align Alignment) const override

Definition RISCVTargetTransformInfo.h:336

unsigned getRegUsageForType(Type *Ty) const override

InstructionCost getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, bool UseMaskForCond=false, bool UseMaskForGaps=false) const override

InstructionCost getScalarizationOverhead(VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract, TTI::TargetCostKind CostKind, bool ForPoisonSrc=true, ArrayRef< Value * > VL={}) const override

Estimate the overhead of scalarizing an instruction.

TailFoldingStyle getPreferredTailFoldingStyle(bool IVUpdateMayOverflow) const override

Definition RISCVTargetTransformInfo.h:121

unsigned getMinVectorRegisterBitWidth() const override

Definition RISCVTargetTransformInfo.h:168

bool isLegalMaskedScatter(Type *DataType, Align Alignment) const override

Definition RISCVTargetTransformInfo.h:320

bool isLegalMaskedCompressStore(Type *DataTy, Align Alignment) const override

unsigned getMaxInterleaveFactor(ElementCount VF) const override

Definition RISCVTargetTransformInfo.h:406

InstructionCost getGatherScatterOpCost(const MemIntrinsicCostAttributes &MICA, TTI::TargetCostKind CostKind) const

bool enableOrderedReductions() const override

Definition RISCVTargetTransformInfo.h:113

InstructionCost getExpandCompressMemoryOpCost(const MemIntrinsicCostAttributes &MICA, TTI::TargetCostKind CostKind) const

RISCVTTIImpl(const RISCVTargetMachine *TM, const Function &F)

Definition RISCVTargetTransformInfo.h:72

TargetTransformInfo::VPLegalization getVPLegalizationStrategy(const VPIntrinsic &PI) const override

Definition RISCVTargetTransformInfo.h:359

bool preferAlternateOpcodeVectorization() const override

bool isVScaleKnownToBeAPowerOfTwo() const override

Definition RISCVTargetTransformInfo.h:352

bool isProfitableToSinkOperands(Instruction *I, SmallVectorImpl< Use * > &Ops) const override

Check if sinking I's operands to I's basic block is profitable, because the operands can be folded in...

unsigned getNumberOfRegisters(unsigned ClassID) const override

Definition RISCVTargetTransformInfo.h:424

InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, const Value *Op0, const Value *Op1) const override

std::optional< unsigned > getMaxVScale() const override

bool shouldExpandReduction(const IntrinsicInst *II) const override

std::optional< unsigned > getVScaleForTuning() const override

InstructionCost getMemIntrinsicInstrCost(const MemIntrinsicCostAttributes &MICA, TTI::TargetCostKind CostKind) const override

Get memory intrinsic cost based on arguments.

bool isLegalMaskedGather(Type *DataType, Align Alignment) const override

Definition RISCVTargetTransformInfo.h:317

bool isLegalMaskedLoad(Type *DataType, Align Alignment, unsigned, TTI::MaskKind) const override

Definition RISCVTargetTransformInfo.h:283

InstructionCost getShuffleCost(TTI::ShuffleKind Kind, VectorType *DstTy, VectorType *SrcTy, ArrayRef< int > Mask, TTI::TargetCostKind CostKind, int Index, VectorType *SubTp, ArrayRef< const Value * > Args={}, const Instruction *CxtI=nullptr) const override

unsigned getMaximumVF(unsigned ElemWidth, unsigned Opcode) const override

InstructionCost getPointersChainCost(ArrayRef< const Value * > Ptrs, const Value *Base, const TTI::PointersChainInfo &Info, Type *AccessTy, TTI::TargetCostKind CostKind) const override

TTI::MemCmpExpansionOptions enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const override

InstructionCost getPartialReductionCost(unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType, ElementCount VF, TTI::PartialReductionExtendKind OpAExtend, TTI::PartialReductionExtendKind OpBExtend, std::optional< unsigned > BinOp, TTI::TargetCostKind CostKind) const override

InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, TTI::OperandValueInfo OpdInfo={TTI::OK_AnyValue, TTI::OP_None}, const Instruction *I=nullptr) const override

bool isLegalToVectorizeReduction(const RecurrenceDescriptor &RdxDesc, ElementCount VF) const override

Definition RISCVTargetTransformInfo.h:370

bool enableScalableVectorization() const override

Definition RISCVTargetTransformInfo.h:114

InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const override

Get intrinsic cost based on arguments.

InstructionCost getMaskedMemoryOpCost(const MemIntrinsicCostAttributes &MICA, TTI::TargetCostKind CostKind) const

InstructionCost getArithmeticReductionCost(unsigned Opcode, VectorType *Ty, std::optional< FastMathFlags > FMF, TTI::TargetCostKind CostKind) const override

TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const override

void getPeelingPreferences(Loop *L, ScalarEvolution &SE, TTI::PeelingPreferences &PP) const override

bool shouldConsiderAddressTypePromotion(const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const override

See if I should be considered for address type promotion.

InstructionCost getIntImmCost(const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind) const override

bool forceScalarizeMaskedGather(VectorType *VTy, Align Alignment) const override

Definition RISCVTargetTransformInfo.h:324

TargetTransformInfo::PopcntSupportKind getPopcntSupport(unsigned TyWidth) const override

The RecurrenceDescriptor is used to identify recurrences variables in a loop.

Type * getRecurrenceType() const

Returns the type of the recurrence.

RecurKind getRecurrenceKind() const

The main scalar evolution driver.

This class consists of common code factored out of the SmallVector class to reduce code duplication b...

virtual const DataLayout & getDataLayout() const

This pass provides access to the codegen interfaces that are needed for IR-level transformations.

MaskKind

Some targets only support masked load/store with a constant mask.

TargetCostKind

The kind of cost model.

PopcntSupportKind

Flags indicating the kind of support for population count.

PartialReductionExtendKind

AddressingModeKind

Which addressing mode Loop Strength Reduction will try to generate.

ShuffleKind

The various kinds of shuffle patterns for vector queries.

CastContextHint

Represents a hint about the context in which a cast is used.

The instances of the Type class are immutable: once they are created, they are never changed.

bool isFloatTy() const

Return true if this is 'float', a 32-bit IEEE fp type.

Type * getScalarType() const

If this is a vector type, return the element type, otherwise return 'this'.

bool isHalfTy() const

Return true if this is 'half', a 16-bit IEEE fp type.

bool isDoubleTy() const

Return true if this is 'double', a 64-bit IEEE fp type.

This is the common base class for vector predication intrinsics.

LLVM Value Representation.

Type * getType() const

All values are typed, get the type of this value.

Base class of all SIMD vector types.

constexpr bool isScalable() const

Returns whether the quantity is scaled by a runtime quantity (vscale).

#define llvm_unreachable(msg)

Marks that the current location is not supposed to be reachable.

constexpr char Args[]

Key for Kernel::Metadata::mArgs.

friend class Instruction

Iterator for Instructions in a `BasicBlock.

This is an optimization pass for GlobalISel generic memory operations.

FunctionAddr VTableAddr Value

@ UMin

Unsigned integer min implemented in terms of select(cmp()).

@ Or

Bitwise or logical OR of integers.

@ AnyOf

AnyOf reduction with select(cmp(),x,y) where one of (x,y) is loop invariant, and both x and y are int...

@ Xor

Bitwise or logical XOR of integers.

@ FMax

FP max implemented in terms of select(cmp()).

@ FMulAdd

Sum of float products with llvm.fmuladd(a * b + sum).

@ SMax

Signed integer max implemented in terms of select(cmp()).

@ And

Bitwise or logical AND of integers.

@ SMin

Signed integer min implemented in terms of select(cmp()).

@ FMin

FP min implemented in terms of select(cmp()).

@ Sub

Subtraction of integers.

@ AddChainWithSubs

A chain of adds and subs.

@ UMax

Unsigned integer max implemented in terms of select(cmp()).

ArrayRef(const T &OneElt) -> ArrayRef< T >

decltype(auto) cast(const From &Val)

cast - Return the argument parameter cast to the specified type.

@ None

Don't use tail folding.

@ DataWithEVL

Use predicated EVL instructions for tail-folding.

This struct is a compact representation of a valid (non-zero power of two) alignment.

TypeSize getStoreSize() const

Return the number of bytes overwritten by a store of the specified value type.

bool isFixedLengthVector() const

EVT getScalarType() const

If this is a vector type, return the element type, otherwise return this.

bool isScalableVector() const

Return true if this is a vector type where the runtime length is machine dependent.

Information about a load/store intrinsic defined by the target.

Returns options for expansion of memcmp. IsZeroCmp is.

Describe known properties for a set of pointers.

Parameters that control the generic loop unrolling transformation.