RegAllocBase.cpp Source File (original) (raw)

34#include

36using namespace llvm;

38#define DEBUG_TYPE "regalloc"

40 STATISTIC(NumNewQueued, "Number of new live ranges queued");

57void RegAllocBase::anchor() {}

63 VRM = &vrm;

64 LIS = &lis;

66 MRI->freezeReservedRegs();

69}

74void RegAllocBase::seedLiveRegs() {

77 for (unsigned i = 0, e = MRI->getNumVirtRegs(); i != e; ++i) {

79 if (MRI->reg_nodbg_empty(Reg))

80 continue;

82 }

83}

88 seedLiveRegs();

92 assert( VRM ->hasPhys(VirtReg->reg()) && "Register already assigned");

95 if (MRI->reg_nodbg_empty(VirtReg->reg())) {

96 LLVM_DEBUG(dbgs() << "Dropping unused " << *VirtReg << '\n');

98 LIS->removeInterval(VirtReg->reg());

99 continue;

100 }

101

102

103 Matrix->invalidateVirtRegs();

104

105

106

107

109 << TRI->getRegClassName(MRI->getRegClass(VirtReg->reg()))

110 << ':' << *VirtReg << '\n');

111

113

114 VirtRegVec SplitVRegs;

116

117 if (AvailablePhysReg == ~0u) {

118

119

121 for (MachineInstr &MIR : MRI->reg_instructions(VirtReg->reg())) {

122 MI = &MIR;

123 if (MI->isInlineAsm())

124 break;

125 }

126

129

130

132 } else if (AvailablePhysReg)

133 Matrix->assign(*VirtReg, AvailablePhysReg);

134

135 for (Register Reg : SplitVRegs) {

137

139 assert( VRM ->hasPhys(SplitVirtReg->reg()) && "Register already assigned");

140 if (MRI->reg_nodbg_empty(SplitVirtReg->reg())) {

141 assert(SplitVirtReg->empty() && "Non-empty but used interval");

142 LLVM_DEBUG(dbgs() << "not queueing unused " << *SplitVirtReg << '\n');

144 LIS->removeInterval(SplitVirtReg->reg());

145 continue;

146 }

147 LLVM_DEBUG(dbgs() << "queuing new interval: " << *SplitVirtReg << "\n");

149 "expect split value in virtual register");

151 ++NumNewQueued;

152 }

153 }

154}

155

159 LIS->RemoveMachineInstrFromMaps(*DeadInst);

160 DeadInst->eraseFromParent();

161 }

163}

164

167

168

169

171 if (MO.readsReg())

172 MO.setIsUndef(true);

173 }

174

175 if ( MRI ->isReserved(PhysReg)) {

176

177

179 ++Aliases) {

181 if (MO.readsReg())

182 MO.setIsUndef(true);

183 }

184 }

185 }

186

187

188

189

190 MRI->replaceRegWith(FailedReg, PhysReg);

191 LIS->removeInterval(FailedReg);

192}

193

196

197 assert(Reg.isVirtual() && "Can only enqueue virtual registers");

198

199 if (VRM->hasPhys(Reg))

200 return;

201

205 } else {

207 << " in skipped register class\n");

208 }

209}

210

214

215

216

217 bool EmitError = !MF.getProperties().hasFailedRegAlloc();

218 if (EmitError)

220

223

225 if (AllocOrder.empty()) {

226

227

228

230

231 if (EmitError) {

233 "no registers from class available to allocate", Fn,

235 }

236

237 assert(!RawRegs.empty() && "register classes cannot have no registers");

238 return RawRegs.front();

239 }

240

241 if (EmitError) {

244 "inline assembly requires more registers than available");

245 } else {

247 "ran out of registers during register allocation", Fn,

249 }

250 }

251

252 return AllocOrder.front();

253}

unsigned const MachineRegisterInfo * MRI

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

Module.h This file contains the declarations for the Module class.

static cl::opt< bool, true > VerifyRegAlloc("verify-regalloc", cl::location(RegAllocBase::VerifyEnabled), cl::Hidden, cl::desc("Verify during register allocation"))

This file defines the SmallVector class.

This file defines the 'Statistic' class, which is designed to be an easy way to expose various metric...

#define STATISTIC(VARNAME, DESC)

ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...

const T & front() const

front - Get the first element.

bool empty() const

empty - Check if the array is empty.

LLVMContext & getContext() const

getContext - Return a reference to the LLVMContext associated with this function.

This is an important class for using LLVM in a threaded context.

LiveInterval - This class represents the liveness of a register, or stack slot.

LiveInterval & getInterval(Register Reg)

MCRegAliasIterator enumerates all registers aliasing Reg.

Wrapper class representing physical registers. Should be passed by value.

Function & getFunction()

Return the LLVM function that this machine code represents.

const MachineFunctionProperties & getProperties() const

Get the function properties.

Representation of each machine instruction.

const DebugLoc & getDebugLoc() const

Returns the debug location id of this MachineInstr.

LLVM_ABI void emitInlineAsmError(const Twine &ErrMsg) const

Emit an error referring to the source location of this instruction.

MachineOperand class - Representation of each machine instruction operand.

virtual void aboutToRemoveInterval(const LiveInterval &LI)

Method called when the allocator is about to remove a LiveInterval.

virtual MCRegister selectOrSplit(const LiveInterval &VirtReg, SmallVectorImpl< Register > &splitLVRs)=0

MCPhysReg getErrorAssignment(const TargetRegisterClass &RC, const MachineInstr *CtxMI=nullptr)

Query a physical register to use as a filler in contexts where the allocation has failed.

Definition RegAllocBase.cpp:211

void enqueue(const LiveInterval *LI)

enqueue - Add VirtReg to the priority queue of unassigned registers.

Definition RegAllocBase.cpp:194

void init(VirtRegMap &vrm, LiveIntervals &lis, LiveRegMatrix &mat)

Definition RegAllocBase.cpp:59

SmallPtrSet< MachineInstr *, 32 > DeadRemats

Inst which is a def of an original reg and whose defs are already all dead after remat is saved in De...

void cleanupFailedVReg(Register FailedVReg, MCRegister PhysReg, SmallVectorImpl< Register > &SplitRegs)

Perform cleanups on registers that failed to allocate.

Definition RegAllocBase.cpp:165

SmallSet< Register, 2 > FailedVRegs

virtual Spiller & spiller()=0

const TargetRegisterInfo * TRI

static const char TimerGroupName[]

static const char TimerGroupDescription[]

virtual const LiveInterval * dequeue()=0

dequeue - Return the next unassigned register, or NULL.

virtual void postOptimization()

Definition RegAllocBase.cpp:156

RegisterClassInfo RegClassInfo

MachineRegisterInfo * MRI

void allocatePhysRegs()

Definition RegAllocBase.cpp:87

virtual void enqueueImpl(const LiveInterval *LI)=0

enqueue - Add VirtReg to the priority queue of unassigned registers.

bool shouldAllocateRegister(Register Reg)

Get whether a given register should be allocated.

static bool VerifyEnabled

VerifyEnabled - True when -verify-regalloc is given.

Wrapper class representing virtual and physical registers.

static Register index2VirtReg(unsigned Index)

Convert a 0-based index to a virtual register number.

constexpr bool isVirtual() const

Return true if the specified register number is in the virtual register namespace.

This class consists of common code factored out of the SmallVector class to reduce code duplication b...

This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.

virtual void postOptimization()

ArrayRef< MCPhysReg > getRegisters() const

MachineRegisterInfo & getRegInfo() const

MachineFunction & getMachineFunction() const

const TargetRegisterInfo & getTargetRegInfo() const

LocationClass< Ty > location(Ty &L)

This is an optimization pass for GlobalISel generic memory operations.

LLVM_ABI bool TimePassesIsEnabled

If the user specifies the -time-passes argument on an LLVM tool command line then the value of this b...

LLVM_ABI raw_ostream & dbgs()

dbgs() - This returns a reference to a raw_ostream for debugging messages.

uint16_t MCPhysReg

An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...

LLVM_ABI Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)

Prints virtual and physical registers with or without a TRI instance.

This class is basically a combination of TimeRegion and Timer.