SPIRVISelLowering.h Source File (original) (raw)

14#ifndef LLVM_LIB_TARGET_SPIRV_SPIRVISELLOWERING_H

15#define LLVM_LIB_TARGET_SPIRV_SPIRVISELLOWERING_H

19#include

21namespace llvm {

28 mutable std::set<const MachineFunction *> ProcessedMF;

30public:

36 EVT) const override {

37 return true;

38 }

48 EVT VT) const override;

50 EVT VT) const override;

53 unsigned Intrinsic) const override;

55 std::pair<unsigned, const TargetRegisterClass *>

58 unsigned

60 std::optional RegisterVT = std::nullopt) const override {

61 return 1;

62 }

70 EVT ConditionVT) const override {

72 }

75 unsigned OpIdx) const;

78};

79}

81#endif

MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL

Analysis containing CSE Info

MachineInstr unsigned OpIdx

This file describes how to lower LLVM code to machine code.

Base class for all callable instructions (InvokeInst and CallInst) Holds everything related to callin...

A parsed version of the target data layout string in and methods for querying it.

This is an important class for using LLVM in a threaded context.

Representation of each machine instruction.

MVT getPreferredSwitchConditionType(LLVMContext &Context, EVT ConditionVT) const override

Returns preferred type for switch condition.

Definition SPIRVISelLowering.h:69

bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallBase &I, MachineFunction &MF, unsigned Intrinsic) const override

Given an intrinsic, checks if on the target the intrinsic will need to map to a MemIntrinsicNode (tou...

bool areJTsAllowed(const Function *) const override

Return true if lowering to a jump table is allowed.

Definition SPIRVISelLowering.h:41

bool enforcePtrTypeCompatibility(MachineInstr &I, unsigned PtrOpIdx, unsigned OpIdx) const

unsigned getVectorIdxWidth(const DataLayout &DL) const override

Returns the type to be used for the index operand vector operations.

Definition SPIRVISelLowering.h:45

unsigned getNumRegisters(LLVMContext &Context, EVT VT, std::optional< MVT > RegisterVT=std::nullopt) const override

Return the number of registers that this ValueType will eventually require.

Definition SPIRVISelLowering.h:59

unsigned getNumRegistersForCallingConv(LLVMContext &Context, CallingConv::ID CC, EVT VT) const override

Certain targets require unusual breakdowns of certain types.

MVT getRegisterTypeForCallingConv(LLVMContext &Context, CallingConv::ID CC, EVT VT) const override

Certain combinations of ABIs, Targets and features require that types are legal for some operations a...

void finalizeLowering(MachineFunction &MF) const override

Execute target specific actions to finalize target lowering.

bool insertLogicalCopyOnResult(MachineInstr &I, SPIRVType *NewResultType) const

SPIRVTargetLowering(const TargetMachine &TM, const SPIRVSubtarget &ST)

std::pair< unsigned, const TargetRegisterClass * > getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, StringRef Constraint, MVT VT) const override

Given a physical register constraint (e.g.

bool isFMAFasterThanFMulAndFAdd(const MachineFunction &MF, EVT) const override

Return true if an FMA operation is faster than a pair of fmul and fadd instructions.

Definition SPIRVISelLowering.h:35

StringRef - Represent a constant reference to a string, i.e.

TargetLowering(const TargetLowering &)=delete

Primary interface to the complete machine description for the target machine.

TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...

unsigned ID

LLVM IR allows to use arbitrary numbers as calling convention identifiers.

This namespace contains an enum with a value for every intrinsic/builtin function known by LLVM.

This is an optimization pass for GlobalISel generic memory operations.

const MachineInstr SPIRVType

MVT getSimpleVT() const

Return the SimpleValueType held in the specified simple EVT.