LLVM: lib/Target/SPIRV/SPIRVModuleAnalysis.h Source File (original) (raw)
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14#ifndef LLVM_LIB_TARGET_SPIRV_SPIRVMODULEANALYSIS_H
15#define LLVM_LIB_TARGET_SPIRV_SPIRVMODULEANALYSIS_H
16
23
24namespace llvm {
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48 const std::optionalCapability::Capability Cap;
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54 std::optionalCapability::Capability Cap = {},
60};
61
63private:
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74 VersionTuple MinVersion;
75 VersionTuple MaxVersion;
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77
78 void recursiveAddCapabilities(const CapabilityList &ToPrune);
79
80 void initAvailableCapabilitiesForOpenCL(const SPIRVSubtarget &ST);
81 void initAvailableCapabilitiesForVulkan(const SPIRVSubtarget &ST);
82
83public:
86 MinimalCaps.clear();
87 AllCaps.clear();
88 AvailableCaps.clear();
89 AllExtensions.clear();
92 }
95 return AllExtensions;
96 }
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103 AllExtensions.insert_range(ToAdd);
104 }
105 void addExtension(Extension::Extension ToAdd) { AllExtensions.insert(ToAdd); }
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120 return AvailableCaps.contains(Cap);
121 }
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125 const Capability::Capability IfPresent);
126};
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132 std::map<const MachineFunction *, LocalToGlobalRegTable>;
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138 MemoryModel::MemoryModel Mem;
139 AddressingModel::AddressingModel Addr;
140 SourceLanguage::SourceLanguage SrcLang;
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171 assert(F && "Function is null");
173 }
186 auto RI = RegTable.find(Reg);
187 if (RI == RegTable.end()) {
189 }
190 return RI->second;
191 }
195 return false;
196 return RI->second.find(Reg) != RI->second.end();
197 }
203 auto Key = std::make_pair(MBB.getParent(), MBB.getNumber());
205 }
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208 auto Key = std::make_pair(MBB.getParent(), MBB.getNumber());
210 if (Inserted)
212 return It->second;
213 }
214};
215}
216
219using InstrGRegsMap = std::map<SmallVector<size_t>, unsigned>;
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223
224public:
226 : ModulePass(ID), ST(nullptr), GR(nullptr), TII(nullptr), MMI(nullptr) {}
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232private:
233 void setBaseInfo(const Module &M);
235 void processOtherInstrs(const Module &M);
236 void numberRegistersGlobally(const Module &M);
237
238
239 void collectDeclarations(const Module &M);
241 std::map<const Value *, unsigned> &GlobalToGReg,
244 std::map<const Value *, unsigned> &GlobalToGReg);
249 std::map<const Value *, unsigned> &GlobalToGReg,
250 bool &IsFunDef);
252 std::map<const Value *, unsigned> &GlobalToGReg,
255
260};
261}
262#endif
unsigned const MachineRegisterInfo * MRI
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
ReachingDefInfo InstSet & ToRemove
This file defines the DenseMap class.
This file defines the SmallSet class.
This file defines the SmallVector class.
Represent the analysis usage information of a pass.
Implements a dense probed hash-table based set.
Wrapper class representing physical registers. Should be passed by value.
Representation of each machine instruction.
This class contains meta information specific to a module.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
A Module instance is used to store all the information related to an LLVM module.
Wrapper class representing virtual and physical registers.
SmallSet - This maintains a set of unique values, optimizing for the case when the set is small (less...
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
StringSet - A wrapper for StringMap that provides set-like functionality.
Represents a version number in the form major[.minor[.subminor[.build]]].
ModuleSectionType
Definition SPIRVModuleAnalysis.h:31
@ MB_DebugModuleProcessed
Definition SPIRVModuleAnalysis.h:37
@ MB_Annotations
Definition SPIRVModuleAnalysis.h:39
@ MB_AliasingInsts
Definition SPIRVModuleAnalysis.h:38
@ MB_NonSemanticGlobalDI
Definition SPIRVModuleAnalysis.h:41
@ MB_TypeConstVars
Definition SPIRVModuleAnalysis.h:40
@ MB_DebugNames
Definition SPIRVModuleAnalysis.h:35
@ MB_DebugStrings
Definition SPIRVModuleAnalysis.h:36
@ NUM_MODULE_SECTIONS
Definition SPIRVModuleAnalysis.h:43
@ MB_ExtFuncDecls
Definition SPIRVModuleAnalysis.h:42
@ MB_EntryPoints
Definition SPIRVModuleAnalysis.h:33
std::map< Register, MCRegister > LocalToGlobalRegTable
Definition SPIRVModuleAnalysis.h:130
SmallVector< const MachineInstr * > InstrList
Definition SPIRVModuleAnalysis.h:128
std::map< const MachineFunction *, LocalToGlobalRegTable > RegisterAliasMapTy
Definition SPIRVModuleAnalysis.h:131
This is an optimization pass for GlobalISel generic memory operations.
SmallVector< SPIRV::Extension::Extension, 8 > ExtensionList
SmallVector< size_t > InstrSignature
Definition SPIRVModuleAnalysis.h:217
LLVM_ATTRIBUTE_VISIBILITY_DEFAULT AnalysisKey InnerAnalysisManagerProxy< AnalysisManagerT, IRUnitT, ExtraArgTs... >::Key
OutputIt move(R &&Range, OutputIt Out)
Provide wrappers to std::move which take ranges instead of having to pass begin/end explicitly.
SmallVector< SPIRV::Capability::Capability, 8 > CapabilityList
std::set< InstrSignature > InstrTraces
Definition SPIRVModuleAnalysis.h:218
std::map< SmallVector< size_t >, unsigned > InstrGRegsMap
Definition SPIRVModuleAnalysis.h:219
Implement std::hash so that hash_code can be used in STL containers.
static struct SPIRV::ModuleAnalysisInfo MAI
Definition SPIRVModuleAnalysis.h:230
static char ID
Definition SPIRVModuleAnalysis.h:222
bool runOnModule(Module &M) override
runOnModule - Virtual method overriden by subclasses to process the module being operated on.
SPIRVModuleAnalysis()
Definition SPIRVModuleAnalysis.h:225
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - This function should be overriden by passes that need analysis information to do t...
unsigned SrcLangVersion
Definition SPIRVModuleAnalysis.h:141
SmallVector< const MachineInstr *, 4 > GlobalVarList
Definition SPIRVModuleAnalysis.h:146
MCRegister getExtInstSetReg(unsigned SetNum)
Definition SPIRVModuleAnalysis.h:174
bool hasMBBRegister(const MachineBasicBlock &MBB)
Definition SPIRVModuleAnalysis.h:202
DenseMap< std::pair< const MachineFunction *, int >, MCRegister > BBNumToRegMap
Definition SPIRVModuleAnalysis.h:161
RequirementHandler Reqs
Definition SPIRVModuleAnalysis.h:137
unsigned MaxID
Definition SPIRVModuleAnalysis.h:157
DenseMap< unsigned, MCRegister > ExtInstSetMap
Definition SPIRVModuleAnalysis.h:144
unsigned getNextID()
Definition SPIRVModuleAnalysis.h:198
void setSkipEmission(const MachineInstr *MI)
Definition SPIRVModuleAnalysis.h:176
DenseSet< const MachineInstr * > InstrsToDelete
Definition SPIRVModuleAnalysis.h:151
bool hasRegisterAlias(const MachineFunction *MF, Register Reg)
Definition SPIRVModuleAnalysis.h:192
RegisterAliasMapTy RegisterAliasTable
Definition SPIRVModuleAnalysis.h:155
DenseMap< const Function *, MCRegister > FuncMap
Definition SPIRVModuleAnalysis.h:148
InstrList & getMSInstrs(unsigned MSType)
Definition SPIRVModuleAnalysis.h:175
MCRegister getRegisterAlias(const MachineFunction *MF, Register Reg)
Definition SPIRVModuleAnalysis.h:184
bool getSkipEmission(const MachineInstr *MI)
Definition SPIRVModuleAnalysis.h:177
MemoryModel::MemoryModel Mem
Definition SPIRVModuleAnalysis.h:138
MCRegister getOrCreateMBBRegister(const MachineBasicBlock &MBB)
Definition SPIRVModuleAnalysis.h:207
InstrList MS[NUM_MODULE_SECTIONS]
Definition SPIRVModuleAnalysis.h:159
AddressingModel::AddressingModel Addr
Definition SPIRVModuleAnalysis.h:139
void setRegisterAlias(const MachineFunction *MF, Register Reg, MCRegister AliasReg)
Definition SPIRVModuleAnalysis.h:180
StringSet SrcExt
Definition SPIRVModuleAnalysis.h:142
SourceLanguage::SourceLanguage SrcLang
Definition SPIRVModuleAnalysis.h:140
DenseMap< const Function *, SPIRV::FPFastMathDefaultInfoVector > FPFastMathDefaultInfoMap
Definition SPIRVModuleAnalysis.h:168
MCRegister getFuncReg(const Function *F)
Definition SPIRVModuleAnalysis.h:170
MCRegister getNextIDRegister()
Definition SPIRVModuleAnalysis.h:199
void addCapabilities(const CapabilityList &ToAdd)
bool isCapabilityAvailable(Capability::Capability Cap) const
Definition SPIRVModuleAnalysis.h:119
void addExtensions(const ExtensionList &ToAdd)
Definition SPIRVModuleAnalysis.h:102
void checkSatisfiable(const SPIRVSubtarget &ST) const
void getAndAddRequirements(SPIRV::OperandCategory::OperandCategory Category, uint32_t i, const SPIRVSubtarget &ST)
void addExtension(Extension::Extension ToAdd)
Definition SPIRVModuleAnalysis.h:105
void initAvailableCapabilities(const SPIRVSubtarget &ST)
void removeCapabilityIf(const Capability::Capability ToRemove, const Capability::Capability IfPresent)
void addCapability(Capability::Capability ToAdd)
Definition SPIRVModuleAnalysis.h:101
void addAvailableCaps(const CapabilityList &ToAdd)
void clear()
Definition SPIRVModuleAnalysis.h:85
const CapabilityList & getMinimalCapabilities() const
Definition SPIRVModuleAnalysis.h:93
const SmallSet< Extension::Extension, 4 > & getExtensions() const
Definition SPIRVModuleAnalysis.h:94
void addRequirements(const Requirements &Req)
RequirementHandler()=default
Requirements(bool IsSatisfiable=false, std::optional< Capability::Capability > Cap={}, ExtensionList Exts={}, VersionTuple MinVer=VersionTuple(), VersionTuple MaxVer=VersionTuple())
Definition SPIRVModuleAnalysis.h:53
const bool IsSatisfiable
Definition SPIRVModuleAnalysis.h:47
const std::optional< Capability::Capability > Cap
Definition SPIRVModuleAnalysis.h:48
const VersionTuple MinVer
Definition SPIRVModuleAnalysis.h:50
Requirements(Capability::Capability Cap)
Definition SPIRVModuleAnalysis.h:59
const VersionTuple MaxVer
Definition SPIRVModuleAnalysis.h:51
const ExtensionList Exts
Definition SPIRVModuleAnalysis.h:49