SPIRVTargetMachine.cpp Source File (original) (raw)

36#include

38using namespace llvm;

67 if (!RM)

69 return *RM;

70}

78 std::optionalReloc::Model RM,

79 std::optionalCodeModel::Model CM,

85 Subtarget(TT, CPU.str(), FS.str(), *this) {

91}

94#define GET_PASS_REGISTRY "SPIRVPassRegistry.def"

96}

98namespace {

101public:

104

107 }

108 void addMachineSSAOptimization() override;

109 void addIRPasses() override;

110 void addISelPrepare() override;

111

112 bool addIRTranslator() override;

113 void addPreLegalizeMachineIR() override;

114 bool addLegalizeMachineIR() override;

115 bool addRegBankSelect() override;

116 bool addGlobalInstructionSelect() override;

117

118 FunctionPass *createTargetRegisterAllocator(bool) override;

119 void addFastRegAlloc() override {}

120 void addOptimizedRegAlloc() override {}

121

122 void addPostRegAlloc() override;

123 void addPreEmitPass() override;

124

125private:

126 const SPIRVTargetMachine &TM;

127};

128}

129

130

131

132FunctionPass *SPIRVPassConfig::createTargetRegisterAllocator(bool) {

133 return nullptr;

134}

135

136

137void SPIRVPassConfig::addMachineSSAOptimization() {

139}

140

141

142void SPIRVPassConfig::addPostRegAlloc() {

143

154

155

158

160}

161

166

168 return new SPIRVPassConfig(*this, PM);

169}

170

171void SPIRVPassConfig::addIRPasses() {

173

177}

178

179void SPIRVPassConfig::addISelPrepare() {

180 if (TM.getSubtargetImpl()->isShader()) {

181

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209 }

210

215 if (TM.getSubtargetImpl()->isLogicalSPIRV())

218}

219

220bool SPIRVPassConfig::addIRTranslator() {

222 return false;

223}

224

225void SPIRVPassConfig::addPreLegalizeMachineIR() {

228}

229

230

231bool SPIRVPassConfig::addLegalizeMachineIR() {

234 return false;

235}

236

237

238bool SPIRVPassConfig::addRegBankSelect() {

240 return false;

241}

242

244 "spv-emit-nonsemantic-debug-info",

245 cl::desc("Emit SPIR-V NonSemantic.Shader.DebugInfo.100 instructions"),

247

248void SPIRVPassConfig::addPreEmitPass() {

250 getSPIRVTargetMachine().getTargetTriple().getVendor() == Triple::AMD) {

252 }

253}

254

255namespace {

256

257

259

260 MachineFunctionProperties getRequiredProperties() const override {

262 }

263};

264}

265

266

267bool SPIRVPassConfig::addGlobalInstructionSelect() {

268 addPass(new SPIRVInstructionSelect());

269 return false;

270}

static Reloc::Model getEffectiveRelocModel()

#define LLVM_EXTERNAL_VISIBILITY

This file declares the IRTranslator pass.

PassBuilder PB(Machine, PassOpts->PTO, std::nullopt, &PIC)

This file describes the interface of the MachineFunctionPass responsible for assigning the generic vi...

const GCNTargetMachine & getTM(const GCNSubtarget *STI)

LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSPIRVTarget()

Definition SPIRVTargetMachine.cpp:40

static cl::opt< bool > SPVEnableNonSemanticDI("spv-emit-nonsemantic-debug-info", cl::desc("Emit SPIR-V NonSemantic.Shader.DebugInfo.100 instructions"), cl::Optional, cl::init(false))

static TableGen::Emitter::Opt Y("gen-skeleton-entry", EmitSkeleton, "Generate example skeleton entry")

static TableGen::Emitter::OptClass< SkeletonEmitter > X("gen-skeleton-class", "Generate example skeleton class")

Target-Independent Code Generator Pass Configuration Options pass.

CodeGenTargetMachineImpl(const Target &T, StringRef DataLayoutString, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOptLevel OL)

FunctionPass class - This class is used to implement most global optimizations.

This pass is responsible for selecting generic machine instructions to target-specific instructions.

MachineFunctionProperties getRequiredProperties() const override

This class provides access to building LLVM's passes.

PassRegistry - This class manages the registration and intitialization of the pass subsystem as appli...

static LLVM_ABI PassRegistry * getPassRegistry()

getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...

void registerPassBuilderCallbacks(PassBuilder &PB) override

Allow the target to modify the pass pipeline.

Definition SPIRVTargetMachine.cpp:93

SPIRVTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, std::optional< Reloc::Model > RM, std::optional< CodeModel::Model > CM, CodeGenOptLevel OL, bool JIT)

Definition SPIRVTargetMachine.cpp:75

TargetTransformInfo getTargetTransformInfo(const Function &F) const override

Get a TargetTransformInfo implementation for the target.

Definition SPIRVTargetMachine.cpp:163

TargetPassConfig * createPassConfig(PassManagerBase &PM) override

Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...

Definition SPIRVTargetMachine.cpp:167

~SPIRVTargetObjectFile() override

StringRef - Represent a constant reference to a string, i.e.

void setFastISel(bool Enable)

void setRequiresStructuredCFG(bool Value)

void setGlobalISel(bool Enable)

void setO0WantsFastISel(bool Enable)

Target-Independent Code Generator Pass Configuration Options.

virtual void addPostRegAlloc()

This method may be implemented by targets that want to run passes after register allocation pass pipe...

virtual void addIRPasses()

Add common target configurable passes that perform LLVM IR to IR transforms following machine indepen...

virtual void addMachineSSAOptimization()

addMachineSSAOptimization - Add standard passes that optimize machine instructions in SSA form.

virtual void addISelPrepare()

Add common passes that perform LLVM IR to IR transforms in preparation for instruction selection.

This pass provides access to the codegen interfaces that are needed for IR-level transformations.

Target - Wrapper for Target specific information.

Triple - Helper class for working with autoconf configuration names.

PassManagerBase - An abstract interface to allow code to add passes to a pass manager without having ...

Interfaces for registering analysis passes, producing common pass manager configurations,...

initializer< Ty > init(const Ty &Val)

This is an optimization pass for GlobalISel generic memory operations.

void initializeSPIRVEmitIntrinsicsPass(PassRegistry &)

FunctionPass * createSPIRVStructurizerPass()

LLVM_ABI FunctionPass * createPromoteMemoryToRegisterPass()

MachineFunctionPass * createSPIRVEmitNonSemanticDIPass(SPIRVTargetMachine *TM)

Target & getTheSPIRV32Target()

ModulePass * createSPIRVEmitIntrinsicsPass(SPIRVTargetMachine *TM)

void initializeSPIRVPrepareFunctionsPass(PassRegistry &)

LLVM_ABI FunctionPass * createRegToMemWrapperPass()

FunctionPass * createSPIRVPreLegalizerPass()

LLVM_ABI char & PatchableFunctionID

This pass implements the "patchable-function" attribute.

LLVM_ABI char & PostRASchedulerID

PostRAScheduler - This pass performs post register allocation scheduling.

LLVM_ABI char & RemoveLoadsIntoFakeUsesID

RemoveLoadsIntoFakeUses pass.

void initializeSPIRVMergeRegionExitTargetsPass(PassRegistry &)

FunctionPass * createSPIRVStripConvergenceIntrinsicsPass()

void initializeSPIRVPreLegalizerCombinerPass(PassRegistry &)

LLVM_ABI char & LiveDebugValuesID

LiveDebugValues pass.

void initializeSPIRVLegalizePointerCastPass(PassRegistry &)

FunctionPass * createSPIRVPreLegalizerCombiner()

void initializeSPIRVModuleAnalysisPass(PassRegistry &)

static Reloc::Model getEffectiveRelocModel(std::optional< Reloc::Model > RM)

FunctionPass * createSPIRVPostLegalizerPass()

CodeModel::Model getEffectiveCodeModel(std::optional< CodeModel::Model > CM, CodeModel::Model Default)

Helper method for getting the code model, returning Default if CM does not have a value.

LLVM_ABI char & ShrinkWrapID

ShrinkWrap pass. Look for the best place to insert save and restore.

LLVM_ABI char & MachineLateInstrsCleanupID

MachineLateInstrsCleanup - This pass removes redundant identical instructions after register allocati...

ModulePass * createSPIRVPrepareGlobalsPass()

void initializeSPIRVRegularizerPass(PassRegistry &)

LLVM_ABI char & StackMapLivenessID

StackMapLiveness - This pass analyses the register live-out set of stackmap/patchpoint intrinsics and...

LLVM_ABI char & FuncletLayoutID

This pass lays out funclets contiguously.

LLVM_ABI char & PostRAMachineSinkingID

This pass perform post-ra machine sink for COPY instructions.

CodeGenOptLevel

Code generation optimization level.

Target & getTheSPIRV64Target()

void initializeSPIRVPostLegalizerPass(PassRegistry &)

void initializeSPIRVCBufferAccessLegacyPass(PassRegistry &)

ModulePass * createSPIRVCBufferAccessLegacyPass()

LLVM_ABI void initializeGlobalISel(PassRegistry &)

Initialize all passes linked into the GlobalISel library.

Target & getTheSPIRVLogicalTarget()

void initializeSPIRVAsmPrinterPass(PassRegistry &)

FunctionPass * createSPIRVRegularizerPass()

void initializeSPIRVStructurizerPass(PassRegistry &)

void initializeSPIRVEmitNonSemanticDIPass(PassRegistry &)

FunctionPass * createSPIRVMergeRegionExitTargetsPass()

LLVM_ABI FunctionPass * createInferAddressSpacesPass(unsigned AddressSpace=~0u)

void initializeSPIRVPreLegalizerPass(PassRegistry &)

void initializeSPIRVConvergenceRegionAnalysisWrapperPassPass(PassRegistry &)

LLVM_ABI char & MachineBlockPlacementID

MachineBlockPlacement - This pass places basic blocks based on branch probabilities.

LLVM_ABI char & BranchFolderPassID

BranchFolding - This pass performs machine code CFG based optimizations to delete branches to branche...

ModulePass * createSPIRVPrepareFunctionsPass(const SPIRVTargetMachine &TM)

void initializeSPIRVPrepareGlobalsPass(PassRegistry &)

FunctionPass * createSPIRVLegalizePointerCastPass(SPIRVTargetMachine *TM)

LLVM_ABI Pass * createLoopSimplifyPass()

LLVM_ABI char & MachineCopyPropagationID

MachineCopyPropagation - This pass performs copy propagation on machine instructions.

void initializeSPIRVStripConvergentIntrinsicsPass(PassRegistry &)

ModulePass * createSPIRVLegalizeImplicitBindingPass()

Implement std::hash so that hash_code can be used in STL containers.

RegisterTargetMachine - Helper template for registering a target machine implementation,...