LLVM: lib/CodeGen/ShrinkWrap.cpp Source File (original) (raw)

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85#include

86#include

87

88using namespace llvm;

89

90#define DEBUG_TYPE "shrink-wrap"

91

93STATISTIC(NumCandidates, "Number of shrink-wrapping candidates");

95 "Number of shrink-wrapping candidates dropped because of frequency");

96

99 cl::desc("enable the shrink-wrapping pass"));

102 cl::desc("enable splitting of the restore block if possible"));

103

104namespace {

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144 unsigned FrameSetupOpcode = ~0u;

145

146

147 unsigned FrameDestroyOpcode = ~0u;

148

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156

157

158 mutable SetOfRegs CurrentCSRs;

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166

167

168 BitVector StackAddressUsedBlockInfo;

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170

171

172

174 bool StackAddressUsed) const;

175

176 const SetOfRegs &getCurrentCSRs(RegScavenger *RS) const {

177 if (CurrentCSRs.empty()) {

181

183

184 for (int Reg = SavedRegs.find_first(); Reg != -1;

186 CurrentCSRs.insert((unsigned)Reg);

187 }

188 return CurrentCSRs;

189 }

190

191

192

193

194

195

197

198

199

200 bool performShrinkWrapping(

203

204

205

206 bool postShrinkWrapping(bool HasCandidate, MachineFunction &MF,

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214

215

216

217 bool checkIfRestoreSplittable(

223

224

227 MDT = &getAnalysis().getDomTree();

228 MPDT = &getAnalysis().getPostDomTree();

229 Save = nullptr;

230 Restore = nullptr;

231 MBFI = &getAnalysis().getMBFI();

232 MLI = &getAnalysis().getLI();

233 ORE = &getAnalysis().getORE();

237 FrameSetupOpcode = TII.getCallFrameSetupOpcode();

238 FrameDestroyOpcode = TII.getCallFrameDestroyOpcode();

241 CurrentCSRs.clear();

242 MachineFunc = &MF;

243

244 ++NumFunc;

245 }

246

247

248

249 bool ArePointsInteresting() const { return Save != Entry && Save && Restore; }

250

251

252 static bool isShrinkWrapEnabled(const MachineFunction &MF);

253

254public:

255 static char ID;

256

259 }

260

269 }

270

273 MachineFunctionProperties::Property::NoVRegs);

274 }

275

276 StringRef getPassName() const override { return "Shrink Wrapping analysis"; }

277

278

279

281};

282

283}

284

285char ShrinkWrap::ID = 0;

286

288

296

298 bool StackAddressUsed) const {

299

300

301

302

303

304

306 if (Op->getValue()) {

308 if (!UO)

309 return false;

310 if (auto *Arg = dyn_cast(UO))

311 return !Arg->hasPassPointeeByValueCopyAttr();

312 return isa(UO);

313 }

315 return PSV->isJumpTable();

316 return false;

317 };

318

319

320 if (StackAddressUsed && MI.mayLoadOrStore() &&

321 (MI.isCall() || MI.hasUnmodeledSideEffects() || MI.memoperands_empty() ||

322 all\_of(MI.memoperands(), IsKnownNonStackPtr)))

323 return true;

324

325 if (MI.getOpcode() == FrameSetupOpcode ||

326 MI.getOpcode() == FrameDestroyOpcode) {

328 return true;

329 }

333 bool UseOrDefCSR = false;

334 if (MO.isReg()) {

335

336 if (!MO.isDef() && !MO.readsReg())

337 continue;

338 Register PhysReg = MO.getReg();

339 if (!PhysReg)

340 continue;

342

343

344

345

346

347

348

349

350

351 UseOrDefCSR =

352 (MI.isCall() && PhysReg == SP) ||

354 (MI.isReturn() && TRI->isNonallocatableRegisterCalleeSave(PhysReg));

355 } else if (MO.isRegMask()) {

356

357 for (unsigned Reg : getCurrentCSRs(RS)) {

358 if (MO.clobbersPhysReg(Reg)) {

359 UseOrDefCSR = true;

360 break;

361 }

362 }

363 }

364

365 if (UseOrDefCSR || (MO.isFI() && MI.isDebugValue())) {

366 LLVM_DEBUG(dbgs() << "Use or define CSR(" << UseOrDefCSR << ") or FI("

367 << MO.isFI() << "): " << MI << '\n');

368 return true;

369 }

370 }

371 return false;

372}

373

374

375template <typename ListOfBBs, typename DominanceAnalysis>

377 DominanceAnalysis &Dom, bool Strict = true) {

380 IDom = Dom.findNearestCommonDominator(IDom, BB);

381 if (!IDom)

382 break;

383 }

384 if (Strict && IDom == &Block)

385 return nullptr;

386 return IDom;

387}

388

391

395}

396

397

398

399

400

401static bool

405 if (ReachableByDirty.count(PredBB))

406 return true;

407 return false;

408}

409

410

415 while (!Worklist.empty()) {

417 if (!Visited.insert(SuccMBB).second)

418 continue;

420 }

421}

422

423

428 if (ReachableByDirty.count(MBB))

429 continue;

430

432 }

433}

434

435

436

437static bool

442 while (!Worklist.empty()) {

444 if (CleanBB == SavePoint)

445 return true;

446 if (!Visited.insert(CleanBB).second || !CleanBB->pred_size())

447 continue;

449 }

450 return false;

451}

452

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467

468

470 TII->insertUnconditionalBranch(*BBToUpdate, NMBB, DL);

471}

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489

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491

492

495 if (BB->getFallThrough(false) == MBB)

496 MBBFallthrough.insert(BB);

497

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500

502

505

506 TII->insertUnconditionalBranch(*NMBB, MBB, DebugLoc());

507

508

509

511 SuccBB->ReplaceUsesOfBlockWith(MBB, NMBB);

512

514

517

518 return NMBB;

519}

520

521

522

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525

526

531

532

533

536 if (BB->getFallThrough(false) == NMBB)

537 NMBBFallthrough.insert(BB);

538

541 SuccBB->ReplaceUsesOfBlockWith(NMBB, MBB);

542

545

548}

549

550

551

552

553bool ShrinkWrap::checkIfRestoreSplittable(

560 if (useOrDefCSROrFI(MI, RS, true))

561 return false;

562

565 return false;

566

567 if (ReachableByDirty.count(PredBB))

569 else

571 }

572

573 return !(CleanPreds.empty() || DirtyPreds.empty());

574}

575

576bool ShrinkWrap::postShrinkWrapping(bool HasCandidate, MachineFunction &MF,

579 return false;

580

583

584 if (HasCandidate) {

585 InitSave = Save;

586 InitRestore = Restore;

587 } else {

588 InitRestore = nullptr;

589 InitSave = &MF.front();

592 return false;

594

595 if (InitRestore)

596 return false;

597 InitRestore = &MBB;

598 }

599 }

600 }

601

602 if (!InitSave || !InitRestore || InitRestore == InitSave ||

603 !MDT->dominates(InitSave, InitRestore) ||

604 !MPDT->dominates(InitRestore, InitSave))

605 return false;

606

607

608

611 return false;

612

617 continue;

618 }

620 if (useOrDefCSROrFI(MI, RS, true)) {

622 break;

623 }

624 }

625

626

629

633 if (!checkIfRestoreSplittable(InitRestore, ReachableByDirty, DirtyPreds,

634 CleanPreds, TII, RS))

635 return false;

636

637

639 FindIDom<>(**DirtyPreds.begin(), DirtyPreds, *MDT, false);

640

641 while (NewSave && (hasDirtyPred(ReachableByDirty, *NewSave) ||

642 EntryFreq < MBFI->getBlockFreq(NewSave) ||

643

644

647 false);

648

650 if (!NewSave || NewSave == InitSave ||

653 return false;

654

655

656

659

660

661

664 return false;

665 }

666

667 Save = NewSave;

668 Restore = NewRestore;

669

672

674 "Incorrect save or restore point due to dominance relations");

676 "Unexpected save or restore point in a loop");

679 "Incorrect save or restore point based on block frequency");

680 return true;

681}

682

685

686 if (!Save)

687 Save = &MBB;

688 else

691

692 if (!Restore)

693 Restore = &MBB;

694 else if (MPDT->getNode(&MBB))

695

696

697

698

700 else

701 Restore = nullptr;

702

703

704

705 if (Restore == &MBB) {

707 if (!useOrDefCSROrFI(Terminator, RS, true))

708 continue;

709

711 Restore = nullptr;

712 break;

713 }

714

715

716 Restore = FindIDom<>(*Restore, Restore->successors(), *MPDT);

717 break;

718 }

719 }

720

721 if (!Restore) {

723 dbgs() << "Restore point needs to be spanned on several blocks\n");

724 return;

725 }

726

727

728

729

730

731

732

733

734 bool SaveDominatesRestore = false;

735 bool RestorePostDominatesSave = false;

736 while (Restore &&

737 (!(SaveDominatesRestore = MDT->dominates(Save, Restore)) ||

738 !(RestorePostDominatesSave = MPDT->dominates(Restore, Save)) ||

739

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758 if (!SaveDominatesRestore) {

760 continue;

761 }

762

763 if (!RestorePostDominatesSave)

765

766

769

770

771 Save = FindIDom<>(*Save, Save->predecessors(), *MDT);

772 if (!Save)

773 break;

774 } else {

775

776

779

780

783 IPdom = FindIDom<>(*IPdom, LoopExitBB->successors(), *MPDT);

784 if (!IPdom)

785 break;

786 }

787

788

789

791 Restore = IPdom;

792 else {

793 Restore = nullptr;

794 break;

795 }

796 }

797 }

798 }

799}

800

805 ORE->emit([&]() {

807 << RemarkMessage;

808 });

809

811 return false;

812}

813

814bool ShrinkWrap::performShrinkWrapping(

819

822 "EH Funclets are not supported yet.",

824

826

827

828

829

830

831 updateSaveRestorePoints(*MBB, RS);

832 if (!ArePointsInteresting()) {

833 LLVM_DEBUG(dbgs() << "EHPad/inlineasm_br prevents shrink-wrapping\n");

834 return false;

835 }

836 continue;

837 }

838

839 bool StackAddressUsed = false;

840

841

842

843

844

846 if (StackAddressUsedBlockInfo.test(Pred->getNumber())) {

847 StackAddressUsed = true;

848 break;

849 }

850 }

851

853 if (useOrDefCSROrFI(MI, RS, StackAddressUsed)) {

854

855

856 updateSaveRestorePoints(*MBB, RS);

857

858

859 if (!ArePointsInteresting()) {

860 LLVM_DEBUG(dbgs() << "No Shrink wrap candidate found\n");

861 return false;

862 }

863

864

865 StackAddressUsed = true;

866 break;

867 }

868 }

869 StackAddressUsedBlockInfo[MBB->getNumber()] = StackAddressUsed;

870 }

871 if (!ArePointsInteresting()) {

872

873

874

875 assert(!Save && !Restore && "We miss a shrink-wrap opportunity?!");

877 return false;

878 }

879

880 LLVM_DEBUG(dbgs() << "\n ** Results **\nFrequency of the Entry: "

882

885 do {

886 LLVM_DEBUG(dbgs() << "Shrink wrap candidates (#, Name, Freq):\nSave: "

891

892 bool IsSaveCheap, TargetCanUseSaveAsPrologue = false;

893 if (((IsSaveCheap = EntryFreq >= MBFI->getBlockFreq(Save)) &&

895 ((TargetCanUseSaveAsPrologue = TFI->canUseAsPrologue(*Save)) &&

897 break;

899 dbgs() << "New points are too expensive or invalid for the target\n");

901 if (!IsSaveCheap || !TargetCanUseSaveAsPrologue) {

902 Save = FindIDom<>(*Save, Save->predecessors(), *MDT);

903 if (!Save)

904 break;

905 NewBB = Save;

906 } else {

907

908 Restore = FindIDom<>(*Restore, Restore->successors(), *MPDT);

909 if (!Restore)

910 break;

911 NewBB = Restore;

912 }

913 updateSaveRestorePoints(*NewBB, RS);

914 } while (Save && Restore);

915

916 if (!ArePointsInteresting()) {

917 ++NumCandidatesDropped;

918 return false;

919 }

920 return true;

921}

922

923bool ShrinkWrap::runOnMachineFunction(MachineFunction &MF) {

924 if (skipFunction(MF.getFunction()) || MF.empty() || !isShrinkWrapEnabled(MF))

925 return false;

926

928

930

932 if (containsIrreducibleCFG<MachineBasicBlock *>(RPOT, *MLI)) {

933

934

935

936

937

938

940 "Irreducible CFGs are not supported yet.",

942 }

943

945 std::unique_ptr RS(

946 TRI->requiresRegisterScavenging(MF) ? new RegScavenger() : nullptr);

947

948 bool Changed = false;

949

950

951

952

954 bool HasCandidate = performShrinkWrapping(RPOT, RS.get());

955 StackAddressUsedBlockInfo.clear();

956 Changed = postShrinkWrapping(HasCandidate, MF, RS.get());

957 if (!HasCandidate && !Changed)

958 return false;

959 if (!ArePointsInteresting())

960 return Changed;

961

962 LLVM_DEBUG(dbgs() << "Final shrink wrap candidates:\nSave: "

965

969 ++NumCandidates;

970 return Changed;

971}

972

973bool ShrinkWrap::isShrinkWrapEnabled(const MachineFunction &MF) {

975

979

980

982

983

984

985

991

992

993

995 return true;

997 return false;

998 }

1000}

MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL

This file contains the simple types necessary to represent the attributes associated with functions a...

This file implements the BitVector class.

const HexagonInstrInfo * TII

unsigned const TargetRegisterInfo * TRI

#define INITIALIZE_PASS_DEPENDENCY(depName)

#define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis)

#define INITIALIZE_PASS_BEGIN(passName, arg, name, cfg, analysis)

This file builds on the ADT/GraphTraits.h file to build a generic graph post order iterator.

const SmallVectorImpl< MachineOperand > MachineBasicBlock * TBB

const SmallVectorImpl< MachineOperand > & Cond

This file declares the machine register scavenger class.

assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())

This file implements a set that has insertion order iteration characteristics.

static void markAllReachable(DenseSet< const MachineBasicBlock * > &Visited, const MachineBasicBlock &MBB)

Derives the list of all the basic blocks reachable from MBB.

static void updateTerminator(MachineBasicBlock *BBToUpdate, MachineBasicBlock *NMBB, const TargetInstrInfo *TII)

This function updates the branches post restore point split.

static MachineBasicBlock * tryToSplitRestore(MachineBasicBlock *MBB, ArrayRef< MachineBasicBlock * > DirtyPreds, const TargetInstrInfo *TII)

This function splits the restore point and returns new restore point/BB.

static bool hasDirtyPred(const DenseSet< const MachineBasicBlock * > &ReachableByDirty, const MachineBasicBlock &MBB)

Determines if any predecessor of MBB is on the path from block that has use or def of CSRs/FI to MBB.

static bool giveUpWithRemarks(MachineOptimizationRemarkEmitter *ORE, StringRef RemarkName, StringRef RemarkMessage, const DiagnosticLocation &Loc, const MachineBasicBlock *MBB)

static cl::opt< bool > EnablePostShrinkWrapOpt("enable-shrink-wrap-region-split", cl::init(true), cl::Hidden, cl::desc("enable splitting of the restore block if possible"))

static void rollbackRestoreSplit(MachineFunction &MF, MachineBasicBlock *NMBB, MachineBasicBlock *MBB, ArrayRef< MachineBasicBlock * > DirtyPreds, const TargetInstrInfo *TII)

This function undoes the restore point split done earlier.

static bool isAnalyzableBB(const TargetInstrInfo &TII, MachineBasicBlock &Entry)

static bool isSaveReachableThroughClean(const MachineBasicBlock *SavePoint, ArrayRef< MachineBasicBlock * > CleanPreds)

static cl::opt< cl::boolOrDefault > EnableShrinkWrapOpt("enable-shrink-wrap", cl::Hidden, cl::desc("enable the shrink-wrapping pass"))

static void collectBlocksReachableByDirty(const DenseSet< const MachineBasicBlock * > &DirtyBBs, DenseSet< const MachineBasicBlock * > &ReachableByDirty)

Collect blocks reachable by use or def of CSRs/FI.

static MachineBasicBlock * FindIDom(MachineBasicBlock &Block, ListOfBBs BBs, DominanceAnalysis &Dom, bool Strict=true)

Helper function to find the immediate (post) dominator.

This file defines the SmallVector class.

This file defines the 'Statistic' class, which is designed to be an easy way to expose various metric...

#define STATISTIC(VARNAME, DESC)

This file describes how to lower LLVM code to machine code.

Represent the analysis usage information of a pass.

AnalysisUsage & addRequired()

void setPreservesAll()

Set by analyses that do not transform their input at all.

ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...

bool test(unsigned Idx) const

int find_first() const

find_first - Returns the index of the first set bit, -1 if none of the bits are set.

void resize(unsigned N, bool t=false)

resize - Grow or shrink the bitvector.

void clear()

clear - Removes all bits from the bitvector.

int find_next(unsigned Prev) const

find_next - Returns the index of the next set bit following the "Prev" bit.

uint64_t getFrequency() const

Returns the frequency as a fixpoint number scaled by the entry frequency.

This class represents an Operation in the Expression.

Implements a dense probed hash-table based set.

NodeT * findNearestCommonDominator(NodeT *A, NodeT *B) const

Find nearest common dominator basic block for basic block A and B.

bool dominates(const DomTreeNodeBase< NodeT > *A, const DomTreeNodeBase< NodeT > *B) const

dominates - Returns true iff A dominates B.

void recalculate(ParentType &Func)

recalculate - compute a dominator tree for the given function

DomTreeNodeBase< NodeT > * getNode(const NodeT *BB) const

getNode - return the (Post)DominatorTree node for the specified basic block.

DISubprogram * getSubprogram() const

Get the attached subprogram.

bool hasFnAttribute(Attribute::AttrKind Kind) const

Return true if the function has the attribute.

bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const override

Analyze the branching code at the end of MBB, returning true if it cannot be understood (e....

void getExitingBlocks(SmallVectorImpl< BlockT * > &ExitingBlocks) const

Return all blocks inside the loop that have successors outside of the loop.

unsigned getLoopDepth(const BlockT *BB) const

Return the loop nesting level of the specified block.

LoopT * getLoopFor(const BlockT *BB) const

Return the inner most loop that BB lives in.

bool usesWindowsCFI() const

bool isInlineAsmBrIndirectTarget() const

Returns true if this is the indirect dest of an INLINEASM_BR.

unsigned pred_size() const

bool isEHPad() const

Returns true if the block is a landing pad.

iterator_range< livein_iterator > liveins() const

int getNumber() const

MachineBasicBlocks are uniquely numbered at the function level, unless they're not in a MachineFuncti...

succ_iterator succ_begin()

bool isEHFuncletEntry() const

Returns true if this is the entry block of an EH funclet.

bool isReturnBlock() const

Convenience function that returns true if the block ends in a return instruction.

void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())

Add Succ as a successor of this MachineBasicBlock.

void removeSuccessor(MachineBasicBlock *Succ, bool NormalizeSuccProbs=false)

Remove successor from the successors list of this MachineBasicBlock.

pred_iterator pred_begin()

bool isLayoutSuccessor(const MachineBasicBlock *MBB) const

Return true if the specified MBB will be emitted immediately after this block, such that if this bloc...

void eraseFromParent()

This method unlinks 'this' from the containing function and deletes it.

void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())

Adds the specified register as a live in.

const MachineFunction * getParent() const

Return the MachineFunction containing this basic block.

instr_iterator erase(instr_iterator I)

Remove an instruction from the instruction list and delete it.

iterator_range< iterator > terminators()

DebugLoc findBranchDebugLoc()

Find and return the merged DebugLoc of the branch instructions of the block.

iterator_range< succ_iterator > successors()

iterator_range< pred_iterator > predecessors()

MachineBlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate machine basic b...

BlockFrequency getBlockFreq(const MachineBasicBlock *MBB) const

getblockFreq - Return block frequency.

BlockFrequency getEntryFreq() const

Divide a block's BlockFrequency::getFrequency() value by this value to obtain the entry block - relat...

Analysis pass which computes a MachineDominatorTree.

DominatorTree Class - Concrete subclass of DominatorTreeBase that is used to compute a normal dominat...

bool dominates(const MachineInstr *A, const MachineInstr *B) const

The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.

void setRestorePoint(MachineBasicBlock *NewRestore)

void setSavePoint(MachineBasicBlock *NewSave)

MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...

void getAnalysisUsage(AnalysisUsage &AU) const override

getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.

virtual bool runOnMachineFunction(MachineFunction &MF)=0

runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...

virtual MachineFunctionProperties getRequiredProperties() const

Properties which a MachineFunction may have at a given point in time.

MachineFunctionProperties & set(Property P)

const TargetSubtargetInfo & getSubtarget() const

getSubtarget - Return the subtarget for which this machine code is being compiled.

StringRef getName() const

getName - Return the name of the corresponding LLVM function.

MachineFrameInfo & getFrameInfo()

getFrameInfo - Return the frame info object for the current function.

Function & getFunction()

Return the LLVM function that this machine code represents.

unsigned getNumBlockIDs() const

getNumBlockIDs - Return the number of MBB ID's allocated.

const MachineBasicBlock & front() const

MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *BB=nullptr, std::optional< UniqueBBID > BBID=std::nullopt)

CreateMachineBasicBlock - Allocate a new MachineBasicBlock.

void insert(iterator MBBI, MachineBasicBlock *MBB)

const TargetMachine & getTarget() const

getTarget - Return the target machine this machine code is compiled with

Representation of each machine instruction.

const DebugLoc & getDebugLoc() const

Returns the debug location id of this MachineInstr.

A description of a memory reference used in the backend.

MachineOperand class - Representation of each machine instruction operand.

MachinePostDominatorTree - an analysis pass wrapper for DominatorTree used to compute the post-domina...

MachineBasicBlock * findNearestCommonDominator(ArrayRef< MachineBasicBlock * > Blocks) const

Returns the nearest common dominator of the given blocks.

static PassRegistry * getPassRegistry()

getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...

Pass interface - Implemented by all 'passes'.

virtual StringRef getPassName() const

getPassName - Return a nice clean name for a pass.

Special value supplied for machine level alias analysis.

MCRegister getLastCalleeSavedAlias(MCRegister PhysReg) const

getLastCalleeSavedAlias - Returns the last callee saved register that overlaps PhysReg,...

void runOnMachineFunction(const MachineFunction &MF)

runOnFunction - Prepare to answer questions about MF.

Wrapper class representing virtual and physical registers.

constexpr bool isPhysical() const

Return true if the specified register number is in the physical register namespace.

std::pair< iterator, bool > insert(PtrType Ptr)

Inserts Ptr if and only if there is no element in the container equal to Ptr.

SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.

A SetVector that performs no allocations if smaller than a certain size.

This class consists of common code factored out of the SmallVector class to reduce code duplication b...

void append(ItTy in_start, ItTy in_end)

Add the specified range to the end of the SmallVector.

void push_back(const T &Elt)

This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.

StringRef - Represent a constant reference to a string, i.e.

Information about stack frame layout on the target.

virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const

This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...

virtual bool enableShrinkWrapping(const MachineFunction &MF) const

Returns true if the target will correctly handle shrink wrapping.

virtual bool canUseAsEpilogue(const MachineBasicBlock &MBB) const

Check whether or not the given MBB can be used as a epilogue for the target.

virtual bool canUseAsPrologue(const MachineBasicBlock &MBB) const

Check whether or not the given MBB can be used as a prologue for the target.

TargetInstrInfo - Interface to description of machine instruction set.

Register getStackPointerRegisterToSaveRestore() const

If a physical register, this specifies the register that llvm.savestack/llvm.restorestack should save...

const MCAsmInfo * getMCAsmInfo() const

Return target specific asm information.

TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...

TargetSubtargetInfo - Generic base class for all target subtargets.

virtual const TargetRegisterInfo * getRegisterInfo() const

getRegisterInfo - If register information is available, return it.

virtual const TargetFrameLowering * getFrameLowering() const

virtual const TargetInstrInfo * getInstrInfo() const

virtual const TargetLowering * getTargetLowering() const

LLVM Value Representation.

std::pair< iterator, bool > insert(const ValueT &V)

size_type count(const_arg_type_t< ValueT > V) const

Return 1 if the specified key is in the set, 0 otherwise.

#define llvm_unreachable(msg)

Marks that the current location is not supposed to be reachable.

unsigned ID

LLVM IR allows to use arbitrary numbers as calling convention identifiers.

initializer< Ty > init(const Ty &Val)

This is an optimization pass for GlobalISel generic memory operations.

bool all_of(R &&range, UnaryPredicate P)

Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.

const Value * getUnderlyingObject(const Value *V, unsigned MaxLookup=6)

This method strips off any GEP address adjustments, pointer casts or llvm.threadlocal....

char & ShrinkWrapID

ShrinkWrap pass. Look for the best place to insert save and restore.

void initializeShrinkWrapPass(PassRegistry &)

raw_ostream & dbgs()

dbgs() - This returns a reference to a raw_ostream for debugging messages.

DWARFExpression::Operation Op

Printable printBlockFreq(const BlockFrequencyInfo &BFI, BlockFrequency Freq)

Print the block frequency Freq relative to the current functions entry frequency.

Printable printMBBReference(const MachineBasicBlock &MBB)

Prints a machine basic block reference.

Pair of physical register and lane mask.