ShrinkWrap.cpp Source File (original) (raw)

86#include

87#include

89using namespace llvm;

91#define DEBUG_TYPE "shrink-wrap"

94 STATISTIC(NumCandidates, "Number of shrink-wrapping candidates");

96 "Number of shrink-wrapping candidates dropped because of frequency");

100 cl::desc("enable the shrink-wrapping pass"));

103 cl::desc("enable splitting of the restore block if possible"));

104

105namespace {

106

107

108

109

110

111

112

113

114class ShrinkWrapImpl {

115

119

120

121

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124

125

126

127

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133

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135

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141

143

144

145 unsigned FrameSetupOpcode = ~0u;

146

147

148 unsigned FrameDestroyOpcode = ~0u;

149

150

152

153

155

157

158

159 mutable SetOfRegs CurrentCSRs;

160

161

163

164

165

166

167

168

169 BitVector StackAddressUsedBlockInfo;

170

171

172

173

175 bool StackAddressUsed) const;

176

177 const SetOfRegs &getCurrentCSRs(RegScavenger *RS) const {

178 if (CurrentCSRs.empty()) {

182

184

187 CurrentCSRs.insert((unsigned)Reg);

188 }

189 return CurrentCSRs;

190 }

191

192

193

194

195

196

197 void updateSaveRestorePoints(MachineBasicBlock &MBB, RegScavenger *RS);

198

199

200

201 bool performShrinkWrapping(

202 const ReversePostOrderTraversal<MachineBasicBlock *> &RPOT,

203 RegScavenger *RS);

204

205

206

207 bool postShrinkWrapping(bool HasCandidate, MachineFunction &MF,

208 RegScavenger *RS);

209

210

211

212

213

214

215

216

217

218 bool checkIfRestoreSplittable(

219 const MachineBasicBlock *CurRestore,

220 const DenseSet<const MachineBasicBlock *> &ReachableByDirty,

221 SmallVectorImpl<MachineBasicBlock *> &DirtyPreds,

222 SmallVectorImpl<MachineBasicBlock *> &CleanPreds,

223 const TargetInstrInfo *TII, RegScavenger *RS);

224

225

226 void init(MachineFunction &MF) {

227 RCI.runOnMachineFunction(MF);

228 Save = nullptr;

229 Restore = nullptr;

230 EntryFreq = MBFI->getEntryFreq();

231 const TargetSubtargetInfo &Subtarget = MF.getSubtarget();

236 Entry = &MF.front();

237 CurrentCSRs.clear();

238 MachineFunc = &MF;

239

240 ++NumFunc;

241 }

242

243

244

245 bool ArePointsInteresting() const { return Save != Entry && Save && Restore; }

246

247public:

248 ShrinkWrapImpl(MachineDominatorTree *MDT, MachinePostDominatorTree *MPDT,

249 MachineBlockFrequencyInfo *MBFI, MachineLoopInfo *MLI,

250 MachineOptimizationRemarkEmitter *ORE)

251 : MDT(MDT), MPDT(MPDT), MBFI(MBFI), MLI(MLI), ORE(ORE) {}

252

253

254 static bool isShrinkWrapEnabled(const MachineFunction &MF);

255

256 bool run(MachineFunction &MF);

257};

258

260public:

261 static char ID;

262

263 ShrinkWrapLegacy() : MachineFunctionPass(ID) {

265 }

266

267 void getAnalysisUsage(AnalysisUsage &AU) const override {

269 AU.addRequired();

270 AU.addRequired();

271 AU.addRequired();

272 AU.addRequired();

273 AU.addRequired();

275 }

276

277 MachineFunctionProperties getRequiredProperties() const override {

278 return MachineFunctionProperties().setNoVRegs();

279 }

280

281 StringRef getPassName() const override { return "Shrink Wrapping analysis"; }

282

283

284

285 bool runOnMachineFunction(MachineFunction &MF) override;

286};

287

288}

289

290char ShrinkWrapLegacy::ID = 0;

291

293

295 false)

303

305 bool StackAddressUsed) const {

306

307

308

309

310

311

313 if (Op->getValue()) {

315 if (!UO)

316 return false;

318 return !Arg->hasPassPointeeByValueCopyAttr();

320 }

322 return PSV->isJumpTable() || PSV->isConstantPool();

323 return false;

324 };

325

326

327 if (StackAddressUsed && MI.mayLoadOrStore() &&

328 (MI.isCall() || MI.hasUnmodeledSideEffects() || MI.memoperands_empty() ||

329 $all\_of$ (MI.memoperands(), IsKnownNonStackPtr)))

330 return true;

331

332 if (MI.getOpcode() == FrameSetupOpcode ||

333 MI.getOpcode() == FrameDestroyOpcode) {

334 LLVM_DEBUG(dbgs() << "Frame instruction: " << MI << '\n');

335 return true;

336 }

340 bool UseOrDefCSR = false;

341 if (MO.isReg()) {

342

343 if (!MO.isDef() && !MO.readsReg())

344 continue;

345 Register PhysReg = MO.getReg();

346 if (!PhysReg)

347 continue;

348 assert(PhysReg.isPhysical() && "Unallocated register?!");

349

350

351

352

353

354

355

356

357

358

359

360

361 UseOrDefCSR = (!MI.isCall() && PhysReg == SP) ||

362 RCI.getLastCalleeSavedAlias(PhysReg) ||

363 (!MI.isReturn() &&

364 TRI->isNonallocatableRegisterCalleeSave(PhysReg)) ||

365 TRI->isVirtualFrameRegister(PhysReg);

366 } else if (MO.isRegMask()) {

367

368 for (unsigned Reg : getCurrentCSRs(RS)) {

369 if (MO.clobbersPhysReg(Reg)) {

370 UseOrDefCSR = true;

371 break;

372 }

373 }

374 }

375

376 if (UseOrDefCSR || (MO.isFI() && .isDebugValue())) {

377 LLVM_DEBUG(dbgs() << "Use or define CSR(" << UseOrDefCSR << ") or FI("

378 << MO.isFI() << "): " << MI << '\n');

379 return true;

380 }

381 }

382 return false;

383}

384

385

386template <typename ListOfBBs, typename DominanceAnalysis>

388 DominanceAnalysis &Dom, bool Strict = true) {

390 if (Strict && IDom == &Block)

391 return nullptr;

392 return IDom;

393}

394

397

400 return TII .analyzeBranch(Entry, TBB, FBB, Cond);

401}

402

403

404

405

406

407static bool

411 if (ReachableByDirty.count(PredBB))

412 return true;

413 return false;

414}

415

416

421 while (!Worklist.empty()) {

423 if (!Visited.insert(SuccMBB).second)

424 continue;

426 }

427}

428

429

434 if (ReachableByDirty.count(MBB))

435 continue;

436

438 }

439}

440

441

442

443static bool

448 while (!Worklist.empty()) {

450 if (CleanBB == SavePoint)

451 return true;

452 if (!Visited.insert(CleanBB).second || !CleanBB->pred_size())

453 continue;

455 }

456 return false;

457}

458

459

460

461

462

463

464

465

466

467

468

473

474

476 TII->insertUnconditionalBranch(*BBToUpdate, NMBB, DL);

477}

478

479

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484

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486

487

488

494

495

496

497

498

501 if (BB->getFallThrough(false) == MBB)

502 MBBFallthrough.insert(BB);

503

505

506

508

511

512 TII->insertUnconditionalBranch(*NMBB, MBB, DebugLoc());

513

514

515

517 SuccBB->ReplaceUsesOfBlockWith(MBB, NMBB);

518

520

523

524 return NMBB;

525}

526

527

528

529

530

531

532

537

538

539

542 if (BB->getFallThrough(false) == NMBB)

543 NMBBFallthrough.insert(BB);

544

547 SuccBB->ReplaceUsesOfBlockWith(NMBB, MBB);

548

551

554}

555

556

557

558

559bool ShrinkWrapImpl::checkIfRestoreSplittable(

565 for (const MachineInstr &MI : *CurRestore)

566 if (useOrDefCSROrFI(MI, RS, true))

567 return false;

568

569 for (MachineBasicBlock *PredBB : CurRestore->predecessors()) {

571 return false;

572

573 if (ReachableByDirty.count(PredBB))

575 else

577 }

578

579 return !(CleanPreds.empty() || DirtyPreds.empty());

580}

581

582bool ShrinkWrapImpl::postShrinkWrapping(bool HasCandidate, MachineFunction &MF,

583 RegScavenger *RS) {

585 return false;

586

587 MachineBasicBlock *InitSave = nullptr;

588 MachineBasicBlock *InitRestore = nullptr;

589

590 if (HasCandidate) {

591 InitSave = Save;

592 InitRestore = Restore;

593 } else {

594 InitRestore = nullptr;

595 InitSave = &MF.front();

596 for (MachineBasicBlock &MBB : MF) {

598 return false;

600

601 if (InitRestore)

602 return false;

603 InitRestore = &MBB;

604 }

605 }

606 }

607

608 if (!InitSave || !InitRestore || InitRestore == InitSave ||

609 !MDT->dominates(InitSave, InitRestore) ||

610 !MPDT->dominates(InitRestore, InitSave))

611 return false;

612

613

614

615 for (MachineBasicBlock &MBB : MF)

617 return false;

618

619 DenseSet<const MachineBasicBlock *> DirtyBBs;

620 for (MachineBasicBlock &MBB : MF) {

623 continue;

624 }

625 for (const MachineInstr &MI : MBB)

626 if (useOrDefCSROrFI(MI, RS, true)) {

628 break;

629 }

630 }

631

632

633 DenseSet<const MachineBasicBlock *> ReachableByDirty;

635

636 const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();

639 if (!checkIfRestoreSplittable(InitRestore, ReachableByDirty, DirtyPreds,

640 CleanPreds, TII, RS))

641 return false;

642

643

644 MachineBasicBlock *NewSave =

645 FindIDom<>(**DirtyPreds.begin(), DirtyPreds, *MDT, false);

646

647 while (NewSave && (hasDirtyPred(ReachableByDirty, *NewSave) ||

648 EntryFreq < MBFI->getBlockFreq(NewSave) ||

649

650

653 false);

654

655 const TargetFrameLowering *TFI = MF.getSubtarget().getFrameLowering();

656 if (!NewSave || NewSave == InitSave ||

659 return false;

660

661

662

663 MachineBasicBlock *NewRestore =

665

666

667

670 return false;

671 }

672

673 Save = NewSave;

674 Restore = NewRestore;

675

678

680 "Incorrect save or restore point due to dominance relations");

682 "Unexpected save or restore point in a loop");

685 "Incorrect save or restore point based on block frequency");

686 return true;

687}

688

689void ShrinkWrapImpl::updateSaveRestorePoints(MachineBasicBlock &MBB,

690 RegScavenger *RS) {

691

692 if (!Save)

693 Save = &MBB;

694 else

697

698 if (!Restore)

699 Restore = &MBB;

700 else if (MPDT->getNode(&MBB))

701

702

703

704

706 else

707 Restore = nullptr;

708

709

710

711 if (Restore == &MBB) {

712 for (const MachineInstr &Terminator : MBB.terminators()) {

713 if (!useOrDefCSROrFI(Terminator, RS, true))

714 continue;

715

717 Restore = nullptr;

718 break;

719 }

720

721

723 break;

724 }

725 }

726

727 if (!Restore) {

729 dbgs() << "Restore point needs to be spanned on several blocks\n");

730 return;

731 }

732

733

734

735

736

737

738

739

740 bool SaveDominatesRestore = false;

741 bool RestorePostDominatesSave = false;

742 while (Restore &&

743 (!(SaveDominatesRestore = MDT->dominates(Save, Restore)) ||

744 !(RestorePostDominatesSave = MPDT->dominates(Restore, Save)) ||

745

746

747

748

749

750

751

752

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757

758

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761

763

764 if (!SaveDominatesRestore) {

766 continue;

767 }

768

769 if (!RestorePostDominatesSave)

771

772

775

776

778 if (!Save)

779 break;

780 } else {

781

782

783 SmallVector<MachineBasicBlock*, 4> ExitBlocks;

785

786

787 MachineBasicBlock *IPdom = Restore;

788 for (MachineBasicBlock *LoopExitBB: ExitBlocks) {

789 IPdom = FindIDom<>(*IPdom, LoopExitBB->successors(), *MPDT);

790 if (!IPdom)

791 break;

792 }

793

794

795

797 Restore = IPdom;

798 else {

799 Restore = nullptr;

800 break;

801 }

802 }

803 }

804 }

805}

806

811 ORE->emit([&]() {

813 << RemarkMessage;

814 });

815

817 return false;

818}

819

820bool ShrinkWrapImpl::performShrinkWrapping(

821 const ReversePostOrderTraversal<MachineBasicBlock *> &RPOT,

822 RegScavenger *RS) {

823 for (MachineBasicBlock *MBB : RPOT) {

825

828 "EH Funclets are not supported yet.",

830

832

833

834

835

836

837 updateSaveRestorePoints(*MBB, RS);

838 if (!ArePointsInteresting()) {

839 LLVM_DEBUG(dbgs() << "EHPad/inlineasm_br prevents shrink-wrapping\n");

840 return false;

841 }

842 continue;

843 }

844

845 bool StackAddressUsed = false;

846

847

848

849

850

851 for (const MachineBasicBlock *Pred : MBB->predecessors()) {

852 if (StackAddressUsedBlockInfo.test(Pred->getNumber())) {

853 StackAddressUsed = true;

854 break;

855 }

856 }

857

858 for (const MachineInstr &MI : *MBB) {

859 if (useOrDefCSROrFI(MI, RS, StackAddressUsed)) {

860

861

862 updateSaveRestorePoints(*MBB, RS);

863

864

865 if (!ArePointsInteresting()) {

866 LLVM_DEBUG(dbgs() << "No Shrink wrap candidate found\n");

867 return false;

868 }

869

870

871 StackAddressUsed = true;

872 break;

873 }

874 }

875 StackAddressUsedBlockInfo[MBB->getNumber()] = StackAddressUsed;

876 }

877 if (!ArePointsInteresting()) {

878

879

880

881 assert(!Save && !Restore && "We miss a shrink-wrap opportunity?!");

883 return false;

884 }

885

886 LLVM_DEBUG(dbgs() << "\n ** Results **\nFrequency of the Entry: "

888

889 const TargetFrameLowering *TFI =

891 do {

892 LLVM_DEBUG(dbgs() << "Shrink wrap candidates (#, Name, Freq):\nSave: "

897

898 bool IsSaveCheap, TargetCanUseSaveAsPrologue = false;

899 if (((IsSaveCheap = EntryFreq >= MBFI->getBlockFreq(Save)) &&

901 ((TargetCanUseSaveAsPrologue = TFI->canUseAsPrologue(*Save)) &&

903 break;

905 dbgs() << "New points are too expensive or invalid for the target\n");

906 MachineBasicBlock *NewBB;

907 if (!IsSaveCheap || !TargetCanUseSaveAsPrologue) {

909 if (!Save)

910 break;

911 NewBB = Save;

912 } else {

913

915 if (!Restore)

916 break;

917 NewBB = Restore;

918 }

919 updateSaveRestorePoints(*NewBB, RS);

920 } while (Save && Restore);

921

922 if (!ArePointsInteresting()) {

923 ++NumCandidatesDropped;

924 return false;

925 }

926 return true;

927}

928

929bool ShrinkWrapImpl::run(MachineFunction &MF) {

931

933

934 ReversePostOrderTraversal<MachineBasicBlock *> RPOT(&*MF.begin());

936

937

938

939

940

941

943 "Irreducible CFGs are not supported yet.",

945 }

946

948 std::unique_ptr RS(

949 TRI->requiresRegisterScavenging(MF) ? new RegScavenger() : nullptr);

950

952

953

954

955

957 bool HasCandidate = performShrinkWrapping(RPOT, RS.get());

958 StackAddressUsedBlockInfo.clear();

959 Changed = postShrinkWrapping(HasCandidate, MF, RS.get());

960 if (!HasCandidate && Changed )

961 return false;

962 if (!ArePointsInteresting())

964

965 LLVM_DEBUG(dbgs() << "Final shrink wrap candidates:\nSave: "

968

970

971

972

975

978 ++NumCandidates;

980}

981

982bool ShrinkWrapLegacy::runOnMachineFunction(MachineFunction &MF) {

984 !ShrinkWrapImpl::isShrinkWrapEnabled(MF))

985 return false;

986

987 MachineDominatorTree *MDT =

988 &getAnalysis().getDomTree();

989 MachinePostDominatorTree *MPDT =

990 &getAnalysis().getPostDomTree();

991 MachineBlockFrequencyInfo *MBFI =

992 &getAnalysis().getMBFI();

993 MachineLoopInfo *MLI = &getAnalysis().getLI();

994 MachineOptimizationRemarkEmitter *ORE =

995 &getAnalysis().getORE();

996

997 return ShrinkWrapImpl(MDT, MPDT, MBFI, MLI, ORE).run(MF);

998}

999

1003 if (MF.empty() || !ShrinkWrapImpl::isShrinkWrapEnabled(MF))

1005

1014

1015 ShrinkWrapImpl(&MDT, &MPDT, &MBFI, &MLI, &ORE).run(MF);

1017}

1018

1019bool ShrinkWrapImpl::isShrinkWrapEnabled(const MachineFunction &MF) {

1021

1025

1026

1028

1029

1030

1031

1032 !(MF.getFunction().hasFnAttribute(Attribute::SanitizeAddress) ||

1037

1038

1039

1041 return true;

1043 return false;

1044 }

1046}

for(const MachineOperand &MO :llvm::drop_begin(OldMI.operands(), Desc.getNumOperands()))

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

const TargetInstrInfo & TII

MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL

This file contains the simple types necessary to represent the attributes associated with functions a...

This file implements the BitVector class.

#define INITIALIZE_PASS_DEPENDENCY(depName)

#define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis)

#define INITIALIZE_PASS_BEGIN(passName, arg, name, cfg, analysis)

This file builds on the ADT/GraphTraits.h file to build a generic graph post order iterator.

const SmallVectorImpl< MachineOperand > MachineBasicBlock * TBB

const SmallVectorImpl< MachineOperand > & Cond

This file declares the machine register scavenger class.

This file implements a set that has insertion order iteration characteristics.

static void markAllReachable(DenseSet< const MachineBasicBlock * > &Visited, const MachineBasicBlock &MBB)

Derives the list of all the basic blocks reachable from MBB.

Definition ShrinkWrap.cpp:417

static void updateTerminator(MachineBasicBlock *BBToUpdate, MachineBasicBlock *NMBB, const TargetInstrInfo *TII)

This function updates the branches post restore point split.

Definition ShrinkWrap.cpp:469

static MachineBasicBlock * tryToSplitRestore(MachineBasicBlock *MBB, ArrayRef< MachineBasicBlock * > DirtyPreds, const TargetInstrInfo *TII)

This function splits the restore point and returns new restore point/BB.

Definition ShrinkWrap.cpp:490

static bool hasDirtyPred(const DenseSet< const MachineBasicBlock * > &ReachableByDirty, const MachineBasicBlock &MBB)

Determines if any predecessor of MBB is on the path from block that has use or def of CSRs/FI to MBB.

Definition ShrinkWrap.cpp:408

static bool giveUpWithRemarks(MachineOptimizationRemarkEmitter *ORE, StringRef RemarkName, StringRef RemarkMessage, const DiagnosticLocation &Loc, const MachineBasicBlock *MBB)

Definition ShrinkWrap.cpp:807

static cl::opt< bool > EnablePostShrinkWrapOpt("enable-shrink-wrap-region-split", cl::init(true), cl::Hidden, cl::desc("enable splitting of the restore block if possible"))

static void rollbackRestoreSplit(MachineFunction &MF, MachineBasicBlock *NMBB, MachineBasicBlock *MBB, ArrayRef< MachineBasicBlock * > DirtyPreds, const TargetInstrInfo *TII)

This function undoes the restore point split done earlier.

Definition ShrinkWrap.cpp:533

static bool isAnalyzableBB(const TargetInstrInfo &TII, MachineBasicBlock &Entry)

Definition ShrinkWrap.cpp:395

static bool isSaveReachableThroughClean(const MachineBasicBlock *SavePoint, ArrayRef< MachineBasicBlock * > CleanPreds)

Definition ShrinkWrap.cpp:444

static cl::opt< cl::boolOrDefault > EnableShrinkWrapOpt("enable-shrink-wrap", cl::Hidden, cl::desc("enable the shrink-wrapping pass"))

static void collectBlocksReachableByDirty(const DenseSet< const MachineBasicBlock * > &DirtyBBs, DenseSet< const MachineBasicBlock * > &ReachableByDirty)

Collect blocks reachable by use or def of CSRs/FI.

Definition ShrinkWrap.cpp:430

static MachineBasicBlock * FindIDom(MachineBasicBlock &Block, ListOfBBs BBs, DominanceAnalysis &Dom, bool Strict=true)

Helper function to find the immediate (post) dominator.

Definition ShrinkWrap.cpp:387

This file defines the SmallVector class.

This file defines the 'Statistic' class, which is designed to be an easy way to expose various metric...

#define STATISTIC(VARNAME, DESC)

This file describes how to lower LLVM code to machine code.

PassT::Result & getResult(IRUnitT &IR, ExtraArgTs... ExtraArgs)

Get the result of an analysis pass for a given IR unit.

AnalysisUsage & addRequired()

void setPreservesAll()

Set by analyses that do not transform their input at all.

ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...

bool test(unsigned Idx) const

int find_first() const

find_first - Returns the index of the first set bit, -1 if none of the bits are set.

void resize(unsigned N, bool t=false)

resize - Grow or shrink the bitvector.

void clear()

clear - Removes all bits from the bitvector.

int find_next(unsigned Prev) const

find_next - Returns the index of the next set bit following the "Prev" bit.

uint64_t getFrequency() const

Returns the frequency as a fixpoint number scaled by the entry frequency.

Implements a dense probed hash-table based set.

NodeT * findNearestCommonDominator(NodeT *A, NodeT *B) const

Find nearest common dominator basic block for basic block A and B.

bool dominates(const DomTreeNodeBase< NodeT > *A, const DomTreeNodeBase< NodeT > *B) const

dominates - Returns true iff A dominates B.

void recalculate(ParentType &Func)

recalculate - compute a dominator tree for the given function

DomTreeNodeBase< NodeT > * getNode(const NodeT *BB) const

getNode - return the (Post)DominatorTree node for the specified basic block.

DISubprogram * getSubprogram() const

Get the attached subprogram.

bool hasFnAttribute(Attribute::AttrKind Kind) const

Return true if the function has the attribute.

void getExitingBlocks(SmallVectorImpl< BlockT * > &ExitingBlocks) const

Return all blocks inside the loop that have successors outside of the loop.

unsigned getLoopDepth(const BlockT *BB) const

Return the loop nesting level of the specified block.

LoopT * getLoopFor(const BlockT *BB) const

Return the inner most loop that BB lives in.

bool usesWindowsCFI() const

An RAII based helper class to modify MachineFunctionProperties when running pass.

bool isInlineAsmBrIndirectTarget() const

Returns true if this is the indirect dest of an INLINEASM_BR.

unsigned pred_size() const

bool isEHPad() const

Returns true if the block is a landing pad.

int getNumber() const

MachineBasicBlocks are uniquely numbered at the function level, unless they're not in a MachineFuncti...

succ_iterator succ_begin()

bool isEHFuncletEntry() const

Returns true if this is the entry block of an EH funclet.

bool isReturnBlock() const

Convenience function that returns true if the block ends in a return instruction.

LLVM_ABI void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())

Add Succ as a successor of this MachineBasicBlock.

LLVM_ABI void removeSuccessor(MachineBasicBlock *Succ, bool NormalizeSuccProbs=false)

Remove successor from the successors list of this MachineBasicBlock.

pred_iterator pred_begin()

LLVM_ABI bool isLayoutSuccessor(const MachineBasicBlock *MBB) const

Return true if the specified MBB will be emitted immediately after this block, such that if this bloc...

LLVM_ABI void eraseFromParent()

This method unlinks 'this' from the containing function and deletes it.

void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())

Adds the specified register as a live in.

LLVM_ABI instr_iterator erase(instr_iterator I)

Remove an instruction from the instruction list and delete it.

iterator_range< iterator > terminators()

LLVM_ABI DebugLoc findBranchDebugLoc()

Find and return the merged DebugLoc of the branch instructions of the block.

iterator_range< succ_iterator > successors()

iterator_range< pred_iterator > predecessors()

MachineBlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate machine basic b...

LLVM_ABI BlockFrequency getBlockFreq(const MachineBasicBlock *MBB) const

getblockFreq - Return block frequency.

Analysis pass which computes a MachineDominatorTree.

DominatorTree Class - Concrete subclass of DominatorTreeBase that is used to compute a normal dominat...

bool dominates(const MachineInstr *A, const MachineInstr *B) const

void setSavePoints(SaveRestorePoints NewSavePoints)

void setRestorePoints(SaveRestorePoints NewRestorePoints)

MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...

void getAnalysisUsage(AnalysisUsage &AU) const override

getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.

const TargetSubtargetInfo & getSubtarget() const

getSubtarget - Return the subtarget for which this machine code is being compiled.

StringRef getName() const

getName - Return the name of the corresponding LLVM function.

MachineFrameInfo & getFrameInfo()

getFrameInfo - Return the frame info object for the current function.

Function & getFunction()

Return the LLVM function that this machine code represents.

unsigned getNumBlockIDs() const

getNumBlockIDs - Return the number of MBB ID's allocated.

const MachineBasicBlock & front() const

MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *BB=nullptr, std::optional< UniqueBBID > BBID=std::nullopt)

CreateMachineInstr - Allocate a new MachineInstr.

void insert(iterator MBBI, MachineBasicBlock *MBB)

const TargetMachine & getTarget() const

getTarget - Return the target machine this machine code is compiled with

Representation of each machine instruction.

const DebugLoc & getDebugLoc() const

Returns the debug location id of this MachineInstr.

Analysis pass that exposes the MachineLoopInfo for a machine function.

A description of a memory reference used in the backend.

MachineOperand class - Representation of each machine instruction operand.

MachinePostDominatorTree - an analysis pass wrapper for DominatorTree used to compute the post-domina...

LLVM_ABI MachineBasicBlock * findNearestCommonDominator(ArrayRef< MachineBasicBlock * > Blocks) const

Returns the nearest common dominator of the given blocks.

static LLVM_ABI PassRegistry * getPassRegistry()

getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...

A set of analyses that are preserved following a run of a transformation pass.

static PreservedAnalyses all()

Construct a special preserved set that preserves all passes.

Special value supplied for machine level alias analysis.

Wrapper class representing virtual and physical registers.

PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM)

Definition ShrinkWrap.cpp:1000

std::pair< iterator, bool > insert(PtrType Ptr)

Inserts Ptr if and only if there is no element in the container equal to Ptr.

SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.

A SetVector that performs no allocations if smaller than a certain size.

This class consists of common code factored out of the SmallVector class to reduce code duplication b...

void append(ItTy in_start, ItTy in_end)

Add the specified range to the end of the SmallVector.

void push_back(const T &Elt)

This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.

StringRef - Represent a constant reference to a string, i.e.

Information about stack frame layout on the target.

virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const

This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...

virtual bool enableShrinkWrapping(const MachineFunction &MF) const

Returns true if the target will correctly handle shrink wrapping.

virtual bool canUseAsEpilogue(const MachineBasicBlock &MBB) const

Check whether or not the given MBB can be used as a epilogue for the target.

virtual bool canUseAsPrologue(const MachineBasicBlock &MBB) const

Check whether or not the given MBB can be used as a prologue for the target.

TargetInstrInfo - Interface to description of machine instruction set.

unsigned getCallFrameSetupOpcode() const

These methods return the opcode of the frame setup/destroy instructions if they exist (-1 otherwise).

unsigned getCallFrameDestroyOpcode() const

If a physical register, this specifies the register that llvm.savestack/llvm.restorestack should save...

const MCAsmInfo * getMCAsmInfo() const

Return target specific asm information.

TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...

virtual const TargetFrameLowering * getFrameLowering() const

virtual const TargetInstrInfo * getInstrInfo() const

virtual const TargetRegisterInfo * getRegisterInfo() const =0

Return the target's register information.

virtual const TargetLowering * getTargetLowering() const

LLVM Value Representation.

std::pair< iterator, bool > insert(const ValueT &V)

size_type count(const_arg_type_t< ValueT > V) const

Return 1 if the specified key is in the set, 0 otherwise.

#define llvm_unreachable(msg)

Marks that the current location is not supposed to be reachable.

initializer< Ty > init(const Ty &Val)

PointerTypeMap run(const Module &M)

Compute the PointerTypeMap for the module M.

This is an optimization pass for GlobalISel generic memory operations.

bool all_of(R &&range, UnaryPredicate P)

Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.

decltype(auto) dyn_cast(const From &Val)

dyn_cast - Return the argument parameter cast to the specified type.

LLVM_ABI void initializeShrinkWrapLegacyPass(PassRegistry &)

AnalysisManager< MachineFunction > MachineFunctionAnalysisManager

LLVM_ABI char & ShrinkWrapID

ShrinkWrap pass. Look for the best place to insert save and restore.

Definition ShrinkWrap.cpp:292

bool containsIrreducibleCFG(RPOTraversalT &RPOTraversal, const LoopInfoT &LI)

Return true if the control flow in RPOTraversal is irreducible.

DenseMap< MachineBasicBlock *, std::vector< CalleeSavedInfo > > SaveRestorePoints

LLVM_ABI raw_ostream & dbgs()

dbgs() - This returns a reference to a raw_ostream for debugging messages.

class LLVM_GSL_OWNER SmallVector

Forward declaration of SmallVector so that calculateSmallVectorDefaultInlinedElements can reference s...

bool isa(const From &Val)

isa - Return true if the parameter to the template is an instance of one of the template type argu...

iterator_range(Container &&) -> iterator_range< llvm::detail::IterOfRange< Container > >

DWARFExpression::Operation Op

LLVM_ABI Printable printBlockFreq(const BlockFrequencyInfo &BFI, BlockFrequency Freq)

Print the block frequency Freq relative to the current functions entry frequency.

LLVM_ABI const Value * getUnderlyingObject(const Value *V, unsigned MaxLookup=MaxLookupSearchDepth)

This method strips off any GEP address adjustments, pointer casts or llvm.threadlocal....

LLVM_ABI Printable printMBBReference(const MachineBasicBlock &MBB)

Prints a machine basic block reference.

Pair of physical register and lane mask.