LLVM: lib/Target/Sparc/SparcInstrInfo.h Source File (original) (raw)

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13#ifndef LLVM_LIB_TARGET_SPARC_SPARCINSTRINFO_H

14#define LLVM_LIB_TARGET_SPARC_SPARCINSTRINFO_H

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19#define GET_INSTRINFO_HEADER

20#include "SparcGenInstrInfo.inc"

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22namespace llvm {

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24class SparcSubtarget;

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41 virtual void anchor();

42public:

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57 int &FrameIndex) const override;

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65 int &FrameIndex) const override;

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72 bool AllowModify = false) const override;

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75 int *BytesRemoved = nullptr) const override;

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80 int *BytesAdded = nullptr) const override;

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82 bool

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90 bool KillSrc, bool RenamableDest = false,

91 bool RenamableSrc = false) const override;

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111 Register &SrcReg2, int64_t &CmpMask,

112 int64_t &CmpValue) const override;

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115 Register SrcReg2, int64_t CmpMask, int64_t CmpValue,

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120};

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122}

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124#endif

unsigned const MachineRegisterInfo * MRI

MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL

MachineBasicBlock MachineBasicBlock::iterator MBBI

const SmallVectorImpl< MachineOperand > MachineBasicBlock * TBB

const SmallVectorImpl< MachineOperand > & Cond

ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...

MachineInstrBundleIterator< MachineInstr > iterator

Representation of each machine instruction.

MachineRegisterInfo - Keep track of information for virtual and physical registers,...

Wrapper class representing virtual and physical registers.

This class consists of common code factored out of the SmallVector class to reduce code duplication b...

Register isStoreToStackSlot(const MachineInstr &MI, int &FrameIndex) const override

isStoreToStackSlot - If the specified machine instruction is a direct store to a stack slot,...

void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, Register DestReg, Register SrcReg, bool KillSrc, bool RenamableDest=false, bool RenamableSrc=false) const override

bool isBranchOffsetInRange(unsigned BranchOpc, int64_t Offset) const override

Determine if the branch target is in range.

void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, Register VReg, MachineInstr::MIFlag Flags=MachineInstr::NoFlags) const override

bool analyzeCompare(const MachineInstr &MI, Register &SrcReg, Register &SrcReg2, int64_t &CmpMask, int64_t &CmpValue) const override

bool optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg, Register SrcReg2, int64_t CmpMask, int64_t CmpValue, const MachineRegisterInfo *MRI) const override

bool reverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const override

Register getGlobalBaseReg(MachineFunction *MF) const

unsigned removeBranch(MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override

MachineBasicBlock * getBranchDestBlock(const MachineInstr &MI) const override

void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register DestReg, int FrameIndex, const TargetRegisterClass *RC, Register VReg, MachineInstr::MIFlag Flags=MachineInstr::NoFlags) const override

bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify=false) const override

Register isLoadFromStackSlot(const MachineInstr &MI, int &FrameIndex) const override

isLoadFromStackSlot - If the specified machine instruction is a direct load from a stack slot,...

SparcInstrInfo(const SparcSubtarget &ST)

const SparcRegisterInfo & getRegisterInfo() const

getRegisterInfo - TargetInstrInfo is a superset of MRegister info.

Definition SparcInstrInfo.h:49

unsigned getInstSizeInBytes(const MachineInstr &MI) const override

GetInstSize - Return the number of bytes of code the specified instruction may be.

unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const override

bool expandPostRAPseudo(MachineInstr &MI) const override

SPII - This namespace holds all of the target specific flags that instruction info tracks.

Definition SparcInstrInfo.h:29

@ Pseudo

Definition SparcInstrInfo.h:31

@ Store

Definition SparcInstrInfo.h:33

@ Load

Definition SparcInstrInfo.h:32

@ DelaySlot

Definition SparcInstrInfo.h:34

This is an optimization pass for GlobalISel generic memory operations.