SparcTargetMachine.cpp Source File (original) (raw)

22#include

23using namespace llvm;

39 cl::desc("Relax out of range conditional branches"));

57 bool Is64Bit, bool JIT) {

58 if (CM) {

60 report_fatal_error("Target does not support the tiny CodeModel", false);

62 report_fatal_error("Target does not support the kernel CodeModel", false);

63 return *CM;

64 }

65 if (Is64Bit) {

66 if (JIT)

69 }

71}

77 std::optionalReloc::Model RM,

78 std::optionalCodeModel::Model CM,

81 T, TT.computeDataLayout(), TT, CPU, FS, Options,

84 TT.isSPARC64(), JIT),

85 OL),

88}

94 Attribute CPUAttr = F.getFnAttribute("target-cpu");

95 Attribute TuneAttr = F.getFnAttribute("tune-cpu");

96 Attribute FSAttr = F.getFnAttribute("target-features");

98 std::string CPU =

100 std::string TuneCPU =

102 std::string FS =

104

105

106

107

108 bool softFloat = F.getFnAttribute("use-soft-float").getValueAsBool();

109

110 if (softFloat)

111 FS += FS.empty() ? "+soft-float" : ",+soft-float";

112

113 auto &I = SubtargetMap[CPU + FS];

114 if () {

115

116

117

119 I = std::make_unique(CPU, TuneCPU, FS, *this);

120 }

121 return I.get();

122}

123

130

131namespace {

132

134public:

137

140 }

141

142 void addIRPasses() override;

143 bool addInstSelector() override;

144 void addPreEmitPass() override;

145};

146}

147

149 return new SparcPassConfig(*this, PM);

150}

151

152void SparcPassConfig::addIRPasses() {

154

156}

157

158bool SparcPassConfig::addInstSelector() {

160 return false;

161}

162

163void SparcPassConfig::addPreEmitPass(){

166

172}

173

174void SparcV8TargetMachine::anchor() { }

175

179 std::optionalReloc::Model RM,

180 std::optionalCodeModel::Model CM,

183

184void SparcV9TargetMachine::anchor() { }

185

189 std::optionalReloc::Model RM,

190 std::optionalCodeModel::Model CM,

193

194void SparcelTargetMachine::anchor() {}

195

199 std::optionalReloc::Model RM,

200 std::optionalCodeModel::Model CM,

static cl::opt< bool > BranchRelaxation("aarch64-enable-branch-relax", cl::Hidden, cl::init(true), cl::desc("Relax out of range conditional branches"))

static Reloc::Model getEffectiveRelocModel()

#define LLVM_EXTERNAL_VISIBILITY

const GCNTargetMachine & getTM(const GCNSubtarget *STI)

static cl::opt< bool > BranchRelaxation("sparc-enable-branch-relax", cl::Hidden, cl::init(true), cl::desc("Relax out of range conditional branches"))

LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSparcTarget()

Definition SparcTargetMachine.cpp:25

static CodeModel::Model getEffectiveSparcCodeModel(std::optional< CodeModel::Model > CM, Reloc::Model RM, bool Is64Bit, bool JIT)

Definition SparcTargetMachine.cpp:56

static TableGen::Emitter::Opt Y("gen-skeleton-entry", EmitSkeleton, "Generate example skeleton entry")

static TableGen::Emitter::OptClass< SkeletonEmitter > X("gen-skeleton-class", "Generate example skeleton class")

Target-Independent Code Generator Pass Configuration Options pass.

Functions, function parameters, and return types can have attributes to indicate how they should be t...

LLVM_ABI StringRef getValueAsString() const

Return the attribute's value as a string.

bool isValid() const

Return true if the attribute is any kind of attribute.

CodeGenTargetMachineImpl(const Target &T, StringRef DataLayoutString, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOptLevel OL)

PassRegistry - This class manages the registration and intitialization of the pass subsystem as appli...

static LLVM_ABI PassRegistry * getPassRegistry()

getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...

TargetPassConfig * createPassConfig(PassManagerBase &PM) override

Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...

Definition SparcTargetMachine.cpp:148

SparcTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, std::optional< Reloc::Model > RM, std::optional< CodeModel::Model > CM, CodeGenOptLevel OL, bool JIT)

Create an ILP32 architecture model.

Definition SparcTargetMachine.cpp:74

MachineFunctionInfo * createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F, const TargetSubtargetInfo *STI) const override

Create the target's instance of MachineFunctionInfo.

Definition SparcTargetMachine.cpp:124

const SparcSubtarget * getSubtargetImpl(const Function &F) const override

Virtual method implemented by subclasses that returns a reference to that target's TargetSubtargetInf...

Definition SparcTargetMachine.cpp:93

~SparcTargetMachine() override

SparcV8TargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, std::optional< Reloc::Model > RM, std::optional< CodeModel::Model > CM, CodeGenOptLevel OL, bool JIT)

Definition SparcTargetMachine.cpp:176

SparcV9TargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, std::optional< Reloc::Model > RM, std::optional< CodeModel::Model > CM, CodeGenOptLevel OL, bool JIT)

Definition SparcTargetMachine.cpp:186

SparcelTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, std::optional< Reloc::Model > RM, std::optional< CodeModel::Model > CM, CodeGenOptLevel OL, bool JIT)

Definition SparcTargetMachine.cpp:196

StringRef - Represent a constant reference to a string, i.e.

std::string str() const

str - Get the contents as an std::string.

std::unique_ptr< const MCSubtargetInfo > STI

void resetTargetOptions(const Function &F) const

Reset the target options based on the function's attributes.

Target-Independent Code Generator Pass Configuration Options.

virtual void addIRPasses()

Add common target configurable passes that perform LLVM IR to IR transforms following machine indepen...

TargetSubtargetInfo - Generic base class for all target subtargets.

Target - Wrapper for Target specific information.

Triple - Helper class for working with autoconf configuration names.

PassManagerBase - An abstract interface to allow code to add passes to a pass manager without having ...

initializer< Ty > init(const Ty &Val)

This is an optimization pass for GlobalISel generic memory operations.

void initializeSparcAsmPrinterPass(PassRegistry &)

Target & getTheSparcTarget()

static Reloc::Model getEffectiveRelocModel(std::optional< Reloc::Model > RM)

void initializeSparcDAGToDAGISelLegacyPass(PassRegistry &)

LLVM_ABI char & BranchRelaxationPassID

BranchRelaxation - This pass replaces branches that need to jump further than is supported by a branc...

LLVM_ABI void report_fatal_error(Error Err, bool gen_crash_diag=true)

void initializeErrataWorkaroundPass(PassRegistry &)

CodeGenOptLevel

Code generation optimization level.

Target & getTheSparcV9Target()

FunctionPass * createSparcISelDag(SparcTargetMachine &TM)

createSparcISelDag - This pass converts a legalized DAG into a SPARC-specific DAG,...

Target & getTheSparcelTarget()

LLVM_ABI FunctionPass * createAtomicExpandLegacyPass()

AtomicExpandPass - At IR level this pass replace atomic instructions with __atomic_* library calls,...

BumpPtrAllocatorImpl<> BumpPtrAllocator

The standard BumpPtrAllocator which just uses the default template parameters.

FunctionPass * createSparcDelaySlotFillerPass()

createSparcDelaySlotFillerPass - Returns a pass that fills in delay slots in Sparc MachineFunctions

Implement std::hash so that hash_code can be used in STL containers.

MachineFunctionInfo - This class can be derived from and used by targets to hold private target-speci...

static FuncInfoTy * create(BumpPtrAllocator &Allocator, const Function &F, const SubtargetTy *STI)

Factory function: default behavior is to call new using the supplied allocator.

RegisterTargetMachine - Helper template for registering a target machine implementation,...