TailDuplicator.cpp Source File (original) (raw)

41#include

42#include

43#include

45using namespace llvm;

47#define DEBUG_TYPE "tailduplication"

49 STATISTIC(NumTails, "Number of tails duplicated");

50 STATISTIC(NumTailDups, "Number of tail duplicated blocks");

52 "Number of instructions added due to tail duplication");

54 "Number of instructions removed due to tail duplication");

55 STATISTIC(NumDeadBlocks, "Number of dead blocks removed");

56 STATISTIC(NumAddedPHIs, "Number of phis added");

60 "tail-dup-size",

61 cl::desc("Maximum instructions to consider tail duplicating"), cl::init(2),

65 "tail-dup-indirect-size",

66 cl::desc("Maximum instructions to consider tail duplicating blocks that "

67 "end with indirect branches."), cl::init(20),

72 cl::desc("Maximum predecessors (maximum successors at the "

73 "same time) to consider tail duplicating blocks."),

78 cl::desc("Maximum successors (maximum predecessors at the "

79 "same time) to consider tail duplicating blocks."),

84 cl::desc("Verify sanity of PHI instructions during taildup"),

94 bool LayoutModeIn, unsigned TailDupSizeIn) {

95 MF = &MFin;

98 MRI = &MF->getRegInfo();

99 MBPI = MBPIin;

100 MBFI = MBFIin;

101 PSI = PSIin;

102 TailDupSize = TailDupSizeIn;

103

104 assert(MBPI != nullptr && "Machine Branch Probability Info required");

105

106 LayoutMode = LayoutModeIn;

107 this->PreRegAlloc = PreRegAlloc;

108}

109

113 MBB.pred_end());

115 while (MI != MBB.end()) {

116 if (->isPHI())

117 break;

119 bool Found = false;

120 for (unsigned i = 1, e = MI->getNumOperands(); i != e; i += 2) {

122 if (PHIBB == PredBB) {

123 Found = true;

124 break;

125 }

126 }

127 if (!Found) {

129 << *MI;

130 dbgs() << " missing input from predecessor "

133 }

134 }

135

136 for (unsigned i = 1, e = MI->getNumOperands(); i != e; i += 2) {

138 if (CheckExtra && !Preds.count(PHIBB)) {

140 << ": " << *MI;

141 dbgs() << " extra input from predecessor "

144 }

147 << *MI;

150 }

151 }

152 ++MI;

153 }

154 }

155}

156

157

158

159

160

161

162

163

164

171

173 MBB->succ_end());

174

177 if (!tailDuplicate(IsSimple, MBB, ForcedLayoutPred,

178 TDBBs, Copies, CandidatePtr))

179 return false;

180

181 ++NumTails;

182

185

186

187

188

189 bool isDead = MBB->pred_empty() && MBB ->hasAddressTaken();

190 if (PreRegAlloc)

191 updateSuccessorsPHIs(MBB, isDead, TDBBs, Succs);

192

193

195 NumTailDupRemoved += MBB->size();

196 removeDeadBlock(MBB, RemovalCallback);

197 ++NumDeadBlocks;

198 }

199

200

201 if (!SSAUpdateVRs.empty()) {

202 for (Register VReg : SSAUpdateVRs) {

204

205

206

210 DefBB = DefMI->getParent();

212 }

213

214

216 SSAUpdateVals.find(VReg);

217 for (std::pair<MachineBasicBlock *, Register> &J : LI->second) {

221 }

222

224

228

229

230

231

232 if (UseMI->isDebugValue()) {

234 continue;

235 }

236 if (UseMI->getParent() == DefBB && UseMI ->isPHI())

237 continue;

239 }

240 for (auto *UseMO : DebugUses) {

242 UseMO->setReg(

244 }

245 }

246

247 SSAUpdateVRs.clear();

248 SSAUpdateVals.clear();

249 }

250

251

252

254 if (!Copy->isCopy())

255 continue;

256 Register Dst = Copy->getOperand(0).getReg();

257 Register Src = Copy->getOperand(1).getReg();

258 if (MRI->hasOneNonDBGUse(Src) &&

259 MRI->constrainRegClass(Src, MRI->getRegClass(Dst))) {

260

261 MRI->replaceRegWith(Dst, Src);

262 Copy->eraseFromParent();

263 }

264 }

265

266 if (NewPHIs.size())

267 NumAddedPHIs += NewPHIs.size();

268

269 if (DuplicatedPreds)

270 *DuplicatedPreds = std::move(TDBBs);

271

272 return true;

273}

274

275

276

277

279 bool MadeChange = false;

280

282 LLVM_DEBUG(dbgs() << "\n*** Before tail-duplicating\n");

284 }

285

289 break;

290

292

294 continue;

295

297 }

298

301

302 return MadeChange;

303}

304

308 if (UseMI.isDebugValue())

309 continue;

310 if (UseMI.getParent() != BB)

311 return true;

312 }

313 return false;

314}

315

317 for (unsigned i = 1, e = MI->getNumOperands(); i != e; i += 2)

318 if (MI->getOperand(i + 1).getMBB() == SrcBB)

319 return i;

320 return 0;

321}

322

323

324

325

328 for (const auto &MI : BB) {

329 if (.isPHI())

330 break;

331 for (unsigned i = 1, e = MI.getNumOperands(); i != e; i += 2) {

332 Register SrcReg = MI.getOperand(i).getReg();

333 UsedByPhi->insert(SrcReg);

334 }

335 }

336}

337

338

339void TailDuplicator::addSSAUpdateEntry(Register OrigReg, Register NewReg,

342 SSAUpdateVals.find(OrigReg);

343 if (LI != SSAUpdateVals.end())

344 LI->second.push_back(std::make_pair(BB, NewReg));

345 else {

346 AvailableValsTy Vals;

347 Vals.push_back(std::make_pair(BB, NewReg));

348 SSAUpdateVals.insert(std::make_pair(OrigReg, Vals));

349 SSAUpdateVRs.push_back(OrigReg);

350 }

351}

352

353

354

355void TailDuplicator::processPHI(

360 Register DefReg = MI->getOperand(0).getReg();

362 assert(SrcOpIdx && "Unable to find matching PHI source?");

363 Register SrcReg = MI->getOperand(SrcOpIdx).getReg();

364 unsigned SrcSubReg = MI->getOperand(SrcOpIdx).getSubReg();

365 const TargetRegisterClass *RC = MRI->getRegClass(DefReg);

366 LocalVRMap.try_emplace(DefReg, SrcReg, SrcSubReg);

367

368

369

370 Register NewDef = MRI->createVirtualRegister(RC);

371 Copies.push_back(std::make_pair(NewDef, RegSubRegPair(SrcReg, SrcSubReg)));

372 if (isDefLiveOut(DefReg, TailBB, MRI) || RegsUsedByPhi.count(DefReg))

373 addSSAUpdateEntry(DefReg, NewDef, PredBB);

374

375 if (!Remove)

376 return;

377

378 MI->removePHIIncomingValueFor(*PredBB);

379

381 MI->eraseFromParent();

382 else if (MI->getNumOperands() == 1)

383 MI->setDesc(TII->get(TargetOpcode::IMPLICIT_DEF));

384}

385

386

387

388void TailDuplicator::duplicateInstruction(

392

393 if (MI->isCFIInstruction()) {

395 TII->get(TargetOpcode::CFI_INSTRUCTION))

398 return;

399 }

400 MachineInstr &NewMI = TII->duplicate(*PredBB, PredBB->end(), *MI);

401 if (!PreRegAlloc)

402 return;

403 for (unsigned i = 0, e = NewMI.getNumOperands(); i != e; ++i) {

404 MachineOperand &MO = NewMI.getOperand(i);

406 continue;

409 continue;

410 if (MO.isDef()) {

411 const TargetRegisterClass *RC = MRI->getRegClass(Reg);

412 Register NewReg = MRI->createVirtualRegister(RC);

416 addSSAUpdateEntry(Reg, NewReg, PredBB);

417 continue;

418 }

420 if (VI == LocalVRMap.end())

421 continue;

422

423

424

425 auto *OrigRC = MRI->getRegClass(Reg);

426 auto *MappedRC = MRI->getRegClass(VI->second.Reg);

427 const TargetRegisterClass *ConstrRC;

428 if (VI->second.SubReg != 0) {

429 ConstrRC =

430 TRI->getMatchingSuperRegClass(MappedRC, OrigRC, VI->second.SubReg);

431 if (ConstrRC) {

432

433

434

435 MRI->setRegClass(VI->second.Reg, ConstrRC);

436 }

437 } else {

438

439

440

441

442

443

445 ? MappedRC

446 : MRI->constrainRegClass(VI->second.Reg, OrigRC);

447 }

448

449 if (ConstrRC) {

450

451

453

454

456 TRI->composeSubRegIndices(VI->second.SubReg, MO.getSubReg()));

457 } else {

458

459

460

461 Register NewReg = MRI->createVirtualRegister(OrigRC);

463 NewReg)

464 .addReg(VI->second.Reg, 0, VI->second.SubReg);

465 LocalVRMap.erase(VI);

468

469

470

471

472 }

473

474

476 }

477}

478

479

480

481

482void TailDuplicator::updateSuccessorsPHIs(

486 for (MachineBasicBlock *SuccBB : Succs) {

487 for (MachineInstr &MI : *SuccBB) {

488 if (.isPHI())

489 break;

490 MachineInstrBuilder MIB(*FromBB->getParent(), MI);

491 unsigned Idx = 0;

492 for (unsigned i = 1, e = MI.getNumOperands(); i != e; i += 2) {

493 MachineOperand &MO = MI.getOperand(i + 1);

494 if (MO.getMBB() == FromBB) {

495 Idx = i;

496 break;

497 }

498 }

499

501 MachineOperand &MO0 = MI.getOperand(Idx);

504

505

506

507 for (unsigned i = MI.getNumOperands() - 2; i != Idx; i -= 2) {

508 MachineOperand &MO = MI.getOperand(i + 1);

509 if (MO.getMBB() == FromBB) {

510 MI.removeOperand(i + 1);

511 MI.removeOperand(i);

512 }

513 }

514 } else

515 Idx = 0;

516

517

518

519

522 if (LI != SSAUpdateVals.end()) {

523

524 for (const std::pair<MachineBasicBlock *, Register> &J : LI->second) {

525 MachineBasicBlock *SrcBB = J.first;

526

527

528

529

531 continue;

532

534 if (Idx != 0) {

535 MI.getOperand(Idx).setReg(SrcReg);

536 MI.getOperand(Idx + 1).setMBB(SrcBB);

537 Idx = 0;

538 } else {

539 MIB.addReg(SrcReg).addMBB(SrcBB);

540 }

541 }

542 } else {

543

544 for (MachineBasicBlock *SrcBB : TDBBs) {

545 if (Idx != 0) {

546 MI.getOperand(Idx).setReg(Reg);

547 MI.getOperand(Idx + 1).setMBB(SrcBB);

548 Idx = 0;

549 } else {

550 MIB.addReg(Reg).addMBB(SrcBB);

551 }

552 }

553 }

554 if (Idx != 0) {

555 MI.removeOperand(Idx + 1);

556 MI.removeOperand(Idx);

557 }

558 }

559 }

560}

561

562

565

566

567

569 return false;

570

571

573 return false;

574

575

576

577

578 unsigned MaxDuplicateCount;

579 if (TailDupSize == 0)

581 else

582 MaxDuplicateCount = TailDupSize;

584 MaxDuplicateCount = 1;

585

586

587

588

589

592 if (TII->analyzeBranch(TailBB, PredTBB, PredFBB, PredCond) &&

594 return false;

595

596

597

598

599

600

601

602 bool HasIndirectbr = false;

603 bool HasComputedGoto = false;

604 if (!TailBB.empty()) {

607 }

608

609 if (HasIndirectbr && PreRegAlloc)

611

612

613

614

615

616

617

618 if (HasComputedGoto && !PreRegAlloc)

619 MaxDuplicateCount = std::max(MaxDuplicateCount, 10u);

620

621

622

624 unsigned NumPhis = 0;

626

627

628

629

630

631 if (MI.isNotDuplicable() &&

633 .isCFIInstruction()))

634 return false;

635

636

637

638 if (MI.isConvergent())

639 return false;

640

641

642

643

644 if (PreRegAlloc && MI.isReturn())

645 return false;

646

647

648

649

650 if (PreRegAlloc && MI.isCall())

651 return false;

652

653

654

655

656

657

658 if (MI.getOpcode() == TargetOpcode::INLINEASM_BR)

659 return false;

660

661 if (MI.isBundle())

663 else if (.isPHI() && .isMetaInstruction())

665

667 return false;

668 NumPhis += MI.isPHI();

669 }

670

671

672

673

676

677

679 return any_of(*MBB, [](MachineInstr &MI) { return MI.isPHI(); });

680 }))

681 return false;

682 }

683

684

685

686

687

688

689

690

691

692

693 for (auto *SB : TailBB.successors()) {

694 for (auto &I : *SB) {

695 if (.isPHI())

696 break;

701 return false;

702 }

703 }

704

705 if (HasIndirectbr && PreRegAlloc)

706 return true;

707

708 if (IsSimple)

709 return true;

710

711 if (!PreRegAlloc)

712 return true;

713

714 return canCompletelyDuplicateBB(TailBB);

715}

716

717

720 return false;

722 return false;

724 if (I == TailBB->end())

725 return true;

726 return I->isUnconditionalBranch();

727}

728

732 if (SuccsB.count(BB) && !BB->empty() && BB->begin()->isPHI())

733 return true;

734

735 return false;

736}

737

738bool TailDuplicator::canCompletelyDuplicateBB(MachineBasicBlock &BB) {

739 for (MachineBasicBlock *PredBB : BB.predecessors()) {

741 return false;

742

743 MachineBasicBlock *PredTBB = nullptr, *PredFBB = nullptr;

745 if (TII->analyzeBranch(*PredBB, PredTBB, PredFBB, PredCond))

746 return false;

747

748 if (!PredCond.empty())

749 return false;

750 }

751 return true;

752}

753

754bool TailDuplicator::duplicateSimpleBB(

759 SmallVector<MachineBasicBlock *, 8> Preds(TailBB->predecessors());

761 for (MachineBasicBlock *PredBB : Preds) {

763 continue;

764

766 continue;

767

768 MachineBasicBlock *PredTBB = nullptr, *PredFBB = nullptr;

770 if (TII->analyzeBranch(*PredBB, PredTBB, PredFBB, PredCond))

771 continue;

772

774 LLVM_DEBUG(dbgs() << "\nTail-duplicating into PredBB: " << *PredBB

775 << "From simple Succ: " << *TailBB);

776

777 MachineBasicBlock *NewTarget = *TailBB->succ_begin();

778 MachineBasicBlock *NextBB = PredBB->getNextNode();

779

780

781 if (PredCond.empty())

782 PredFBB = PredTBB;

783

784

785 if (!PredTBB)

786 PredTBB = NextBB;

787 if (!PredFBB)

788 PredFBB = NextBB;

789

790

791 if (PredFBB == TailBB)

792 PredFBB = NewTarget;

793 if (PredTBB == TailBB)

794 PredTBB = NewTarget;

795

796

797 if (PredTBB == PredFBB) {

798 PredCond.clear();

799 PredFBB = nullptr;

800 }

801

802

803 if (PredFBB == NextBB)

804 PredFBB = nullptr;

805 if (PredTBB == NextBB && PredFBB == nullptr)

806 PredTBB = nullptr;

807

809 TII->removeBranch(*PredBB);

810

813 else {

816 }

817

818 if (PredTBB)

819 TII->insertBranch(*PredBB, PredTBB, PredFBB, PredCond, DL);

820

822 }

824}

825

828

830 return false;

831

834 if (TII->analyzeBranch(*PredBB, PredTBB, PredFBB, PredCond))

835 return false;

836 if (!PredCond.empty())

837 return false;

838

839

840

841

842

843

844

846 return false;

847 return true;

848}

849

850

851

852

853

854

855

856

857

858

859

860bool TailDuplicator::tailDuplicate(bool IsSimple, MachineBasicBlock *TailBB,

866 << '\n');

867

868 bool ShouldUpdateTerminators = TailBB->canFallThrough();

869

872

873 if (IsSimple)

874 return duplicateSimpleBB(TailBB, TDBBs, UsedByPhi);

875

876

877

878

881 if (CandidatePtr)

883 else

885

887 assert(TailBB != PredBB &&

888 "Single-block loop should have been rejected earlier!");

889

891 continue;

892

893

894

895

897 bool IsLayoutSuccessor = false;

898 if (ForcedLayoutPred)

899 IsLayoutSuccessor = (ForcedLayoutPred == PredBB);

901 IsLayoutSuccessor = true;

902 if (IsLayoutSuccessor)

903 continue;

904 }

905

906 LLVM_DEBUG(dbgs() << "\nTail-duplicating into PredBB: " << *PredBB

907 << "From Succ: " << *TailBB);

908

910

911

912 TII->removeBranch(*PredBB);

913

914

918 if (MI.isPHI()) {

919

920

921 processPHI(&MI, TailBB, PredBB, LocalVRMap, CopyInfos, UsedByPhi, true);

922 } else {

923

924

925 duplicateInstruction(&MI, TailBB, PredBB, LocalVRMap, UsedByPhi);

926 }

927 }

928 appendCopies(PredBB, CopyInfos, Copies);

929

930 NumTailDupAdded += TailBB->size() - 1;

931

932

935 "TailDuplicate called on block with multiple successors!");

936 for (MachineBasicBlock *Succ : TailBB->successors())

937 PredBB->addSuccessor(Succ, MBPI->getEdgeProbability(TailBB, Succ));

938

939

940 if (ShouldUpdateTerminators)

942

944 ++NumTailDups;

945 }

946

947

948

949

950 MachineBasicBlock *PrevBB = ForcedLayoutPred;

951 if (!PrevBB)

952 PrevBB = &*std::prev(TailBB->getIterator());

953 MachineBasicBlock *PriorTBB = nullptr, *PriorFBB = nullptr;

955

956

958

960 !TII->analyzeBranch(*PrevBB, PriorTBB, PriorFBB, PriorCond) &&

961 PriorCond.empty() &&

962 (!PriorTBB || PriorTBB == TailBB) &&

965 LLVM_DEBUG(dbgs() << "\nMerging into block: " << *PrevBB

966 << "From MBB: " << *TailBB);

967

968

969

970 bool RemovedBranches = TII->removeBranch(*PrevBB) != 0;

971

972

974 if (PreRegAlloc) {

975 DenseMap<Register, RegSubRegPair> LocalVRMap;

978

979 while (I != TailBB->end() && I->isPHI()) {

980

981

982 MachineInstr *MI = &*I++;

983 processPHI(MI, TailBB, PrevBB, LocalVRMap, CopyInfos, UsedByPhi,

984 true);

985 }

986

987

988 while (I != TailBB->end()) {

989

990

991 MachineInstr *MI = &*I++;

992 assert(->isBundle() && "Not expecting bundles before regalloc!");

993 duplicateInstruction(MI, TailBB, PrevBB, LocalVRMap, UsedByPhi);

994 MI->eraseFromParent();

995 }

996 appendCopies(PrevBB, CopyInfos, Copies);

997 } else {

998 TII->removeBranch(*PrevBB);

999

1000 PrevBB->splice(PrevBB->end(), TailBB, TailBB->begin(), TailBB->end());

1001 }

1005

1006

1007 if (ShouldUpdateTerminators)

1009

1012 } else {

1013 LLVM_DEBUG(dbgs() << "Abort merging blocks, the predecessor still "

1014 "contains terminator instructions");

1015

1017 return RemovedBranches;

1018 }

1019 Changed |= RemovedBranches;

1020 }

1021

1022

1023 if (!PreRegAlloc)

1025

1026

1029

1030

1031

1032

1033

1034

1035

1036

1037

1038

1039

1040

1041

1042

1043

1044 for (MachineBasicBlock *PredBB : Preds) {

1046 continue;

1047

1048

1050 continue;

1051

1052 DenseMap<Register, RegSubRegPair> LocalVRMap;

1054

1056

1057

1058 processPHI(&MI, TailBB, PredBB, LocalVRMap, CopyInfos, UsedByPhi, false);

1059 }

1060 appendCopies(PredBB, CopyInfos, Copies);

1061 }

1062

1064}

1065

1066

1067

1069 SmallVectorImpl<std::pair<Register, RegSubRegPair>> &CopyInfos,

1072 const MCInstrDesc &CopyD = TII->get(TargetOpcode::COPY);

1073 for (auto &CI : CopyInfos) {

1075 .addReg(CI.second.Reg, 0, CI.second.SubReg);

1077 }

1078}

1079

1080

1081

1082void TailDuplicator::removeDeadBlock(

1087

1089

1090 for (const MachineInstr &MI : *MBB)

1091 if (MI.shouldUpdateAdditionalCallInfo())

1093

1094 if (RemovalCallback)

1095 (*RemovalCallback)(MBB);

1096

1097

1100

1101

1103}

unsigned const MachineRegisterInfo * MRI

MachineInstrBuilder & UseMI

MachineInstrBuilder MachineInstrBuilder & DefMI

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

const TargetInstrInfo & TII

MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL

static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")

static unsigned InstrCount

This file defines the DenseMap class.

This file defines the DenseSet and SmallDenseSet classes.

TargetInstrInfo::RegSubRegPair RegSubRegPair

Promote Memory to Register

bool isDead(const MachineInstr &MI, const MachineRegisterInfo &MRI)

This file implements a set that has insertion order iteration characteristics.

This file defines the SmallPtrSet class.

This file defines the SmallVector class.

This file defines the 'Statistic' class, which is designed to be an easy way to expose various metric...

#define STATISTIC(VARNAME, DESC)

static cl::opt< unsigned > TailDuplicateSize("tail-dup-size", cl::desc("Maximum instructions to consider tail duplicating"), cl::init(2), cl::Hidden)

static cl::opt< unsigned > TailDupLimit("tail-dup-limit", cl::init(~0U), cl::Hidden)

static cl::opt< unsigned > TailDupPredSize("tail-dup-pred-size", cl::desc("Maximum predecessors (maximum successors at the " "same time) to consider tail duplicating blocks."), cl::init(16), cl::Hidden)

static cl::opt< unsigned > TailDupSuccSize("tail-dup-succ-size", cl::desc("Maximum successors (maximum predecessors at the " "same time) to consider tail duplicating blocks."), cl::init(16), cl::Hidden)

static cl::opt< bool > TailDupVerify("tail-dup-verify", cl::desc("Verify sanity of PHI instructions during taildup"), cl::init(false), cl::Hidden)

static void VerifyPHIs(MachineFunction &MF, bool CheckExtra)

Definition TailDuplicator.cpp:110

static bool bothUsedInPHI(const MachineBasicBlock &A, const SmallPtrSet< MachineBasicBlock *, 8 > &SuccsB)

Definition TailDuplicator.cpp:729

static unsigned getPHISrcRegOpIdx(MachineInstr *MI, MachineBasicBlock *SrcBB)

Definition TailDuplicator.cpp:316

static void getRegsUsedByPHIs(const MachineBasicBlock &BB, DenseSet< Register > *UsedByPhi)

Definition TailDuplicator.cpp:326

static cl::opt< unsigned > TailDupIndirectBranchSize("tail-dup-indirect-size", cl::desc("Maximum instructions to consider tail duplicating blocks that " "end with indirect branches."), cl::init(20), cl::Hidden)

static bool isDefLiveOut(Register Reg, MachineBasicBlock *BB, const MachineRegisterInfo *MRI)

Definition TailDuplicator.cpp:305

iterator find(const_arg_type_t< KeyT > Val)

std::pair< iterator, bool > try_emplace(KeyT &&Key, Ts &&...Args)

bool erase(const KeyT &Val)

DenseMapIterator< KeyT, ValueT, KeyInfoT, BucketT > iterator

std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)

Implements a dense probed hash-table based set.

bool hasProfileData(bool IncludeSynthetic=false) const

Return true if the function is annotated with profile data.

static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata * > MDs)

bool isInlineAsmBrIndirectTarget() const

Returns true if this is the indirect dest of an INLINEASM_BR.

unsigned pred_size() const

LLVM_ABI bool hasEHPadSuccessor() const

LLVM_ABI void replaceSuccessor(MachineBasicBlock *Old, MachineBasicBlock *New)

Replace successor OLD with NEW and update probability info.

LLVM_ABI void transferSuccessors(MachineBasicBlock *FromMBB)

Transfers all the successors from MBB to this machine basic block (i.e., copies all the successors Fr...

iterator_range< iterator > phis()

Returns a range that iterates over the phis in the basic block.

int getNumber() const

MachineBasicBlocks are uniquely numbered at the function level, unless they're not in a MachineFuncti...

LLVM_ABI void updateTerminator(MachineBasicBlock *PreviousLayoutSuccessor)

Update the terminator instructions in block to account for changes to block layout which may have bee...

LLVM_ABI bool canFallThrough()

Return true if the block can implicitly transfer control to the block after it by falling off the end...

LLVM_ABI iterator getFirstNonDebugInstr(bool SkipPseudoOp=true)

Returns an iterator to the first non-debug instruction in the basic block, or end().

succ_iterator succ_begin()

bool terminatorIsComputedGotoWithSuccessors() const

Returns true if the original IR terminator is an indirectbr with successor blocks.

LLVM_ABI iterator getFirstTerminator()

Returns an iterator to the first terminator instruction of this basic block.

unsigned succ_size() const

bool hasAddressTaken() const

Test whether this block is used as something other than the target of a terminator,...

LLVM_ABI void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())

Add Succ as a successor of this MachineBasicBlock.

LLVM_ABI void removeSuccessor(MachineBasicBlock *Succ, bool NormalizeSuccProbs=false)

Remove successor from the successors list of this MachineBasicBlock.

LLVM_ABI DebugLoc findDebugLoc(instr_iterator MBBI)

Find the next valid DebugLoc starting at MBBI, skipping any debug instructions.

LLVM_ABI bool isLayoutSuccessor(const MachineBasicBlock *MBB) const

Return true if the specified MBB will be emitted immediately after this block, such that if this bloc...

LLVM_ABI void eraseFromParent()

This method unlinks 'this' from the containing function and deletes it.

const MachineFunction * getParent() const

Return the MachineFunction containing this basic block.

LLVM_ABI DebugLoc findBranchDebugLoc()

Find and return the merged DebugLoc of the branch instructions of the block.

iterator_range< succ_iterator > successors()

LLVM_ABI bool isSuccessor(const MachineBasicBlock *MBB) const

Return true if the specified MBB is a successor of this block.

iterator_range< pred_iterator > predecessors()

void splice(iterator Where, MachineBasicBlock *Other, iterator From)

Take an instruction from MBB 'Other' at the position From, and insert it into this MBB right before '...

MachineInstrBundleIterator< MachineInstr > iterator

LLVM_ABI bool mayHaveInlineAsmBr() const

Returns true if this block may have an INLINEASM_BR (overestimate, by checking if any of the successo...

const TargetSubtargetInfo & getSubtarget() const

getSubtarget - Return the subtarget for which this machine code is being compiled.

Function & getFunction()

Return the LLVM function that this machine code represents.

void eraseAdditionalCallInfo(const MachineInstr *MI)

Following functions update call site info.

const TargetMachine & getTarget() const

getTarget - Return the target machine this machine code is compiled with

const MachineInstrBuilder & addCFIIndex(unsigned CFIIndex) const

const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const

Add a new virtual register operand.

const MachineInstrBuilder & setMIFlags(unsigned Flags) const

Representation of each machine instruction.

bool isDebugInstr() const

unsigned getNumOperands() const

Retuns the total number of operands.

const DebugLoc & getDebugLoc() const

Returns the debug location id of this MachineInstr.

const MachineOperand & getOperand(unsigned i) const

bool isIndirectBranch(QueryType Type=AnyInBundle) const

Return true if this is an indirect branch, such as a branch through a register.

MachineOperand class - Representation of each machine instruction operand.

void setSubReg(unsigned subReg)

unsigned getSubReg() const

bool isReg() const

isReg - Tests if this is a MO_Register operand.

MachineBasicBlock * getMBB() const

LLVM_ABI void setReg(Register Reg)

Change the register this operand corresponds to.

void setIsKill(bool Val=true)

getReg - Returns the register number.

MachineRegisterInfo - Keep track of information for virtual and physical registers,...

MachineSSAUpdater - This class updates SSA form for a set of virtual registers defined in multiple bl...

void Initialize(Register V)

Initialize - Reset this object to get ready for a new set of SSA updates.

GetValueInMiddleOfBlock - Construct SSA form, materializing a value that is live in the middle of the...

void RewriteUse(MachineOperand &U)

RewriteUse - Rewrite a use of the symbolic value.

void AddAvailableValue(MachineBasicBlock *BB, Register V)

AddAvailableValue - Indicate that a rewritten value is available at the end of the specified block wi...

Analysis providing profile information.

Wrapper class representing virtual and physical registers.

constexpr bool isVirtual() const

Return true if the specified register number is in the virtual register namespace.

void insert_range(Range &&R)

size_type count(ConstPtrType Ptr) const

count - Return 1 if the specified pointer is in the set, 0 otherwise.

SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.

A SetVector that performs no allocations if smaller than a certain size.

This class consists of common code factored out of the SmallVector class to reduce code duplication b...

void push_back(const T &Elt)

This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.

void initMF(MachineFunction &MF, bool PreRegAlloc, const MachineBranchProbabilityInfo *MBPI, MBFIWrapper *MBFI, ProfileSummaryInfo *PSI, bool LayoutMode, unsigned TailDupSize=0)

Prepare to run on a specific machine function.

Definition TailDuplicator.cpp:90

bool tailDuplicateBlocks()

Look for small blocks that are unconditionally branched to and do not fall through.

Definition TailDuplicator.cpp:278

bool tailDuplicateAndUpdate(bool IsSimple, MachineBasicBlock *MBB, MachineBasicBlock *ForcedLayoutPred, SmallVectorImpl< MachineBasicBlock * > *DuplicatedPreds=nullptr, function_ref< void(MachineBasicBlock *)> *RemovalCallback=nullptr, SmallVectorImpl< MachineBasicBlock * > *CandidatePtr=nullptr)

Tail duplicate a single basic block into its predecessors, and then clean up.

Definition TailDuplicator.cpp:165

static bool isSimpleBB(MachineBasicBlock *TailBB)

True if this BB has only one unconditional jump.

Definition TailDuplicator.cpp:718

bool canTailDuplicate(MachineBasicBlock *TailBB, MachineBasicBlock *PredBB)

Returns true if TailBB can successfully be duplicated into PredBB.

Definition TailDuplicator.cpp:826

bool shouldTailDuplicate(bool IsSimple, MachineBasicBlock &TailBB)

Determine if it is profitable to duplicate this block.

Definition TailDuplicator.cpp:563

const TargetRegisterInfo & getRegisterInfo() const

const Triple & getTargetTriple() const

virtual const TargetInstrInfo * getInstrInfo() const

bool isOSDarwin() const

Is this a "Darwin" OS (macOS, iOS, tvOS, watchOS, DriverKit, XROS, or bridgeOS).

std::pair< iterator, bool > insert(const ValueT &V)

size_type count(const_arg_type_t< ValueT > V) const

Return 1 if the specified key is in the set, 0 otherwise.

An efficient, type-erasing, non-owning reference to a callable.

self_iterator getIterator()

NodeTy * getNextNode()

Get the next node, or nullptr for the list tail.

#define llvm_unreachable(msg)

Marks that the current location is not supposed to be reachable.

@ C

The default llvm calling convention, compatible with C.

initializer< Ty > init(const Ty &Val)

This is an optimization pass for GlobalISel generic memory operations.

auto drop_begin(T &&RangeOrContainer, size_t N=1)

Return a range covering RangeOrContainer with the first N elements excluded.

MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)

Builder interface. Specify how to create the initial instruction itself.

auto successors(const MachineBasicBlock *BB)

constexpr from_range_t from_range

LLVM_ABI bool shouldOptimizeForSize(const MachineFunction *MF, ProfileSummaryInfo *PSI, const MachineBlockFrequencyInfo *BFI, PGSOQueryType QueryType=PGSOQueryType::Other)

Returns true if machine function MF is suggested to be size-optimized based on the profile.

iterator_range< early_inc_iterator_impl< detail::IterOfRange< RangeT > > > make_early_inc_range(RangeT &&Range)

Make a range that does early increment to allow mutation of the underlying range without disrupting i...

bool any_of(R &&range, UnaryPredicate P)

Provide wrappers to std::any_of which take ranges instead of having to pass begin/end explicitly.

LLVM_ABI raw_ostream & dbgs()

dbgs() - This returns a reference to a raw_ostream for debugging messages.

class LLVM_GSL_OWNER SmallVector

Forward declaration of SmallVector so that calculateSmallVectorDefaultInlinedElements can reference s...

bool is_contained(R &&Range, const E &Element)

Returns true if Element is found in Range.

LLVM_ABI Printable printMBBReference(const MachineBasicBlock &MBB)

Prints a machine basic block reference.