TargetTransformInfo.cpp Source File (original) (raw)

23#include

24#include

26using namespace llvm;

27using namespace PatternMatch;

29#define DEBUG_TYPE "tti"

33 cl::desc("Recognize reduction patterns."));

37 cl::desc("Use this to override the target cache line size when "

38 "specified by the user."));

42 cl::desc("Use this to override the target's minimum page size."));

47 "Use this to override the target's predictable branch threshold (%)."));

49namespace {

57};

58}

65 if (containsIrreducibleCFG<const BasicBlock *>(RPOT, LI))

66 return false;

67 return true;

68}

72 bool TypeBasedOnly)

74 ScalarizationCost(ScalarizationCost) {

76 if (const auto *FPMO = dyn_cast(&CI))

77 FMF = FPMO->getFastMathFlags();

79 if (!TypeBasedOnly)

80 Arguments.insert(Arguments.begin(), CI.arg_begin(), CI.arg_end());

83}

90 : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) {

91 ParamTys.insert(ParamTys.begin(), Tys.begin(), Tys.end());

92}

96 : RetTy(Ty), IID(Id) {

98 Arguments.insert(Arguments.begin(), Args.begin(), Args.end());

99 ParamTys.reserve(Arguments.size());

102}

103

110 : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) {

111 ParamTys.insert(ParamTys.begin(), Tys.begin(), Tys.end());

112 Arguments.insert(Arguments.begin(), Args.begin(), Args.end());

113}

114

116

117

118

121}

122

129

130 for (BasicBlock *BB : ExitingBlocks) {

131

132

135 continue;

136 }

137

139 if (isa(EC))

140 continue;

141 if (const SCEVConstant *ConstEC = dyn_cast(EC)) {

142 if (ConstEC->getValue()->isZero())

143 continue;

145 continue;

146

148 continue;

149

150

151

152

154 continue;

155

156

157

158

159

160

161

162

163 bool NotAlways = false;

166 continue;

167

169 NotAlways = true;

170 break;

171 }

172 }

173

174 if (NotAlways)

175 continue;

176

177

179 if (!TI)

180 continue;

181

182 if (BranchInst *BI = dyn_cast(TI)) {

183 if (!BI->isConditional())

184 continue;

185

187 } else

188 continue;

189

190

191

194 break;

195 }

196

198 return false;

199 return true;

200}

201

203 : TTIImpl(new Model(NoTTIImpl(DL))) {}

204

206

208 : TTIImpl(std::move(Arg.TTIImpl)) {}

209

211 TTIImpl = std::move(RHS.TTIImpl);

212 return *this;

213}

214

216 return TTIImpl->getInliningThresholdMultiplier();

217}

218

219unsigned

221 return TTIImpl->getInliningCostBenefitAnalysisSavingsMultiplier();

222}

223

224unsigned

226 const {

227 return TTIImpl->getInliningCostBenefitAnalysisProfitableMultiplier();

228}

229

231 return TTIImpl->getInliningLastCallToStaticBonus();

232}

233

234unsigned

236 return TTIImpl->adjustInliningThreshold(CB);

237}

238

241 return TTIImpl->getCallerAllocaCost(CB, AI);

242}

243

245 return TTIImpl->getInlinerVectorBonusPercent();

246}

247

251 return TTIImpl->getGEPCost(PointeeType, Ptr, Operands, AccessType, CostKind);

252}

253

259 "If pointers have same base address it has to be provided.");

260 return TTIImpl->getPointersChainCost(Ptrs, Base, Info, AccessTy, CostKind);

261}

262

266 return TTIImpl->getEstimatedNumberOfCaseClusters(SI, JTSize, PSI, BFI);

267}

268

275 "TTI should not produce negative costs!");

277}

278

282 : TTIImpl->getPredictableBranchThreshold();

283}

284

286 return TTIImpl->getBranchMispredictPenalty();

287}

288

290 return TTIImpl->hasBranchDivergence(F);

291}

292

294 if (const auto *Call = dyn_cast(V)) {

295 if (Call->hasFnAttr(Attribute::NoDivergenceSource))

296 return false;

297 }

298 return TTIImpl->isSourceOfDivergence(V);

299}

300

302 return TTIImpl->isAlwaysUniform(V);

303}

304

306 unsigned ToAS) const {

307 return TTIImpl->isValidAddrSpaceCast(FromAS, ToAS);

308}

309

311 unsigned ToAS) const {

312 return TTIImpl->addrspacesMayAlias(FromAS, ToAS);

313}

314

316 return TTIImpl->getFlatAddressSpace();

317}

318

321 return TTIImpl->collectFlatAddressOperands(OpIndexes, IID);

322}

323

325 unsigned ToAS) const {

326 return TTIImpl->isNoopAddrSpaceCast(FromAS, ToAS);

327}

328

330 unsigned AS) const {

331 return TTIImpl->canHaveNonUndefGlobalInitializerInAddressSpace(AS);

332}

333

335 return TTIImpl->getAssumedAddrSpace(V);

336}

337

339 return TTIImpl->isSingleThreaded();

340}

341

342std::pair<const Value *, unsigned>

344 return TTIImpl->getPredicatedAddrSpace(V);

345}

346

349 return TTIImpl->rewriteIntrinsicWithAddressSpace(II, OldV, NewV);

350}

351

353 return TTIImpl->isLoweredToCall(F);

354}

355

359 return TTIImpl->isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);

360}

361

363 return TTIImpl->getEpilogueVectorizationMinVF();

364}

365

368 return TTIImpl->preferPredicateOverEpilogue(TFI);

369}

370

372 bool IVUpdateMayOverflow) const {

373 return TTIImpl->getPreferredTailFoldingStyle(IVUpdateMayOverflow);

374}

375

376std::optional<Instruction *>

379 return TTIImpl->instCombineIntrinsic(IC, II);

380}

381

384 bool &KnownBitsComputed) const {

385 return TTIImpl->simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known,

386 KnownBitsComputed);

387}

388

391 APInt &UndefElts2, APInt &UndefElts3,

393 SimplifyAndSetOp) const {

394 return TTIImpl->simplifyDemandedVectorEltsIntrinsic(

395 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3,

396 SimplifyAndSetOp);

397}

398

402 return TTIImpl->getUnrollingPreferences(L, SE, UP, ORE);

403}

404

407 return TTIImpl->getPeelingPreferences(L, SE, PP);

408}

409

411 return TTIImpl->isLegalAddImmediate(Imm);

412}

413

415 return TTIImpl->isLegalAddScalableImmediate(Imm);

416}

417

419 return TTIImpl->isLegalICmpImmediate(Imm);

420}

421

423 int64_t BaseOffset,

424 bool HasBaseReg, int64_t Scale,

425 unsigned AddrSpace,

427 int64_t ScalableOffset) const {

428 return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,

429 Scale, AddrSpace, I, ScalableOffset);

430}

431

433 const LSRCost &C2) const {

434 return TTIImpl->isLSRCostLess(C1, C2);

435}

436

438 return TTIImpl->isNumRegsMajorCostOfLSR();

439}

440

442 return TTIImpl->shouldDropLSRSolutionIfLessProfitable();

443}

444

446 return TTIImpl->isProfitableLSRChainElement(I);

447}

448

450 return TTIImpl->canMacroFuseCmp();

451}

452

457 return TTIImpl->canSaveCmp(L, BI, SE, LI, DT, AC, LibInfo);

458}

459

463 return TTIImpl->getPreferredAddressingMode(L, SE);

464}

465

467 Align Alignment) const {

468 return TTIImpl->isLegalMaskedStore(DataType, Alignment);

469}

470

472 Align Alignment) const {

473 return TTIImpl->isLegalMaskedLoad(DataType, Alignment);

474}

475

477 Align Alignment) const {

478 return TTIImpl->isLegalNTStore(DataType, Alignment);

479}

480

482 return TTIImpl->isLegalNTLoad(DataType, Alignment);

483}

484

487 return TTIImpl->isLegalBroadcastLoad(ElementTy, NumElements);

488}

489

491 Align Alignment) const {

492 return TTIImpl->isLegalMaskedGather(DataType, Alignment);

493}

494

496 VectorType *VecTy, unsigned Opcode0, unsigned Opcode1,

498 return TTIImpl->isLegalAltInstr(VecTy, Opcode0, Opcode1, OpcodeMask);

499}

500

502 Align Alignment) const {

503 return TTIImpl->isLegalMaskedScatter(DataType, Alignment);

504}

505

507 Align Alignment) const {

508 return TTIImpl->forceScalarizeMaskedGather(DataType, Alignment);

509}

510

512 Align Alignment) const {

513 return TTIImpl->forceScalarizeMaskedScatter(DataType, Alignment);

514}

515

517 Align Alignment) const {

518 return TTIImpl->isLegalMaskedCompressStore(DataType, Alignment);

519}

520

522 Align Alignment) const {

523 return TTIImpl->isLegalMaskedExpandLoad(DataType, Alignment);

524}

525

527 Align Alignment) const {

528 return TTIImpl->isLegalStridedLoadStore(DataType, Alignment);

529}

530

533 unsigned AddrSpace) const {

534 return TTIImpl->isLegalInterleavedAccessType(VTy, Factor, Alignment,

535 AddrSpace);

536}

537

539 Type *DataType) const {

540 return TTIImpl->isLegalMaskedVectorHistogram(AddrType, DataType);

541}

542

544 return TTIImpl->enableOrderedReductions();

545}

546

548 return TTIImpl->hasDivRemOp(DataType, IsSigned);

549}

550

552 unsigned AddrSpace) const {

553 return TTIImpl->hasVolatileVariant(I, AddrSpace);

554}

555

557 return TTIImpl->prefersVectorizedAddressing();

558}

559

562 int64_t Scale, unsigned AddrSpace) const {

564 Ty, BaseGV, BaseOffset, HasBaseReg, Scale, AddrSpace);

565 assert(Cost >= 0 && "TTI should not produce negative costs!");

567}

568

570 return TTIImpl->LSRWithInstrQueries();

571}

572

574 return TTIImpl->isTruncateFree(Ty1, Ty2);

575}

576

578 return TTIImpl->isProfitableToHoist(I);

579}

580

582

584 return TTIImpl->isTypeLegal(Ty);

585}

586

588 return TTIImpl->getRegUsageForType(Ty);

589}

590

592 return TTIImpl->shouldBuildLookupTables();

593}

594

597 return TTIImpl->shouldBuildLookupTablesForConstant(C);

598}

599

601 return TTIImpl->shouldBuildRelLookupTables();

602}

603

605 return TTIImpl->useColdCCForColdCall(F);

606}

607

610 return TTIImpl->isTargetIntrinsicTriviallyScalarizable(ID);

611}

612

615 return TTIImpl->isTargetIntrinsicWithScalarOpAtArg(ID, ScalarOpdIdx);

616}

617

620 return TTIImpl->isTargetIntrinsicWithOverloadTypeAtArg(ID, OpdIdx);

621}

622

625 return TTIImpl->isTargetIntrinsicWithStructReturnOverloadAtField(ID, RetIdx);

626}

627

629 VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract,

631 return TTIImpl->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,

633}

634

638 return TTIImpl->getOperandsScalarizationOverhead(Args, Tys, CostKind);

639}

640

642 return TTIImpl->supportsEfficientVectorElementLoadStore();

643}

644

646 return TTIImpl->supportsTailCalls();

647}

648

650 return TTIImpl->supportsTailCallFor(CB);

651}

652

654 bool LoopHasReductions) const {

655 return TTIImpl->enableAggressiveInterleaving(LoopHasReductions);

656}

657

660 return TTIImpl->enableMemCmpExpansion(OptSize, IsZeroCmp);

661}

662

664 return TTIImpl->enableSelectOptimize();

665}

666

669 return TTIImpl->shouldTreatInstructionLikeSelect(I);

670}

671

673 return TTIImpl->enableInterleavedAccessVectorization();

674}

675

677 return TTIImpl->enableMaskedInterleavedAccessVectorization();

678}

679

681 return TTIImpl->isFPVectorizationPotentiallyUnsafe();

682}

683

684bool

689 unsigned *Fast) const {

690 return TTIImpl->allowsMisalignedMemoryAccesses(Context, BitWidth,

692}

693

696 return TTIImpl->getPopcntSupport(IntTyWidthInBit);

697}

698

700 return TTIImpl->haveFastSqrt(Ty);

701}

702

705 return TTIImpl->isExpensiveToSpeculativelyExecute(I);

706}

707

709 return TTIImpl->isFCmpOrdCheaperThanFCmpZero(Ty);

710}

711

714 assert(Cost >= 0 && "TTI should not produce negative costs!");

716}

717

719 unsigned Idx,

720 const APInt &Imm,

721 Type *Ty) const {

723 assert(Cost >= 0 && "TTI should not produce negative costs!");

725}

726

731 assert(Cost >= 0 && "TTI should not produce negative costs!");

733}

734

736 unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty,

739 TTIImpl->getIntImmCostInst(Opcode, Idx, Imm, Ty, CostKind, Inst);

740 assert(Cost >= 0 && "TTI should not produce negative costs!");

742}

743

749 TTIImpl->getIntImmCostIntrin(IID, Idx, Imm, Ty, CostKind);

750 assert(Cost >= 0 && "TTI should not produce negative costs!");

752}

753

756 return TTIImpl->preferToKeepConstantsAttached(Inst, Fn);

757}

758

760 return TTIImpl->getNumberOfRegisters(ClassID);

761}

762

764 return TTIImpl->hasConditionalLoadStoreForType(Ty);

765}

766

768 Type *Ty) const {

769 return TTIImpl->getRegisterClassForType(Vector, Ty);

770}

771

773 return TTIImpl->getRegisterClassName(ClassID);

774}

775

778 return TTIImpl->getRegisterBitWidth(K);

779}

780

782 return TTIImpl->getMinVectorRegisterBitWidth();

783}

784

786 return TTIImpl->getMaxVScale();

787}

788

790 return TTIImpl->getVScaleForTuning();

791}

792

794 return TTIImpl->isVScaleKnownToBeAPowerOfTwo();

795}

796

799 return TTIImpl->shouldMaximizeVectorBandwidth(K);

800}

801

803 bool IsScalable) const {

804 return TTIImpl->getMinimumVF(ElemWidth, IsScalable);

805}

806

808 unsigned Opcode) const {

809 return TTIImpl->getMaximumVF(ElemWidth, Opcode);

810}

811

813 Type *ScalarValTy) const {

814 return TTIImpl->getStoreMinimumVF(VF, ScalarMemTy, ScalarValTy);

815}

816

818 const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const {

819 return TTIImpl->shouldConsiderAddressTypePromotion(

820 I, AllowPromotionWithoutCommonHeader);

821}

822

825 : TTIImpl->getCacheLineSize();

826}

827

828std::optional

830 return TTIImpl->getCacheSize(Level);

831}

832

833std::optional

835 return TTIImpl->getCacheAssociativity(Level);

836}

837

840 : TTIImpl->getMinPageSize();

841}

842

844 return TTIImpl->getPrefetchDistance();

845}

846

848 unsigned NumMemAccesses, unsigned NumStridedMemAccesses,

849 unsigned NumPrefetches, bool HasCall) const {

850 return TTIImpl->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses,

851 NumPrefetches, HasCall);

852}

853

855 return TTIImpl->getMaxPrefetchIterationsAhead();

856}

857

859 return TTIImpl->enableWritePrefetching();

860}

861

863 return TTIImpl->shouldPrefetchAddressSpace(AS);

864}

865

867 unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType,

870 return TTIImpl->getPartialReductionCost(Opcode, InputTypeA, InputTypeB,

871 AccumType, VF, OpAExtend, OpBExtend,

872 BinOp);

873}

874

876 return TTIImpl->getMaxInterleaveFactor(VF);

877}

878

883

884 if (isa(V) || isa(V)) {

885 if (const auto *CI = dyn_cast(V)) {

886 if (CI->getValue().isPowerOf2())

888 else if (CI->getValue().isNegatedPowerOf2())

890 }

892 }

893

894

895

896

897 if (const auto *ShuffleInst = dyn_cast(V))

898 if (ShuffleInst->isZeroEltSplat())

900

902

903

904

905 if (isa(V) || isa(V)) {

909 if (auto *CI = dyn_cast(Splat)) {

910 if (CI->getValue().isPowerOf2())

912 else if (CI->getValue().isNegatedPowerOf2())

914 }

915 } else if (const auto *CDS = dyn_cast(V)) {

916 bool AllPow2 = true, AllNegPow2 = true;

917 for (unsigned I = 0, E = CDS->getNumElements(); I != E; ++I) {

918 if (auto *CI = dyn_cast(CDS->getElementAsConstant(I))) {

919 AllPow2 &= CI->getValue().isPowerOf2();

920 AllNegPow2 &= CI->getValue().isNegatedPowerOf2();

921 if (AllPow2 || AllNegPow2)

922 continue;

923 }

924 AllPow2 = AllNegPow2 = false;

925 break;

926 }

927 OpProps = AllPow2 ? OP_PowerOf2 : OpProps;

929 }

930 }

931

932

933

934 if (Splat && (isa(Splat) || isa(Splat)))

936

937 return {OpInfo, OpProps};

938}

939

945

946

947

948

949 if (TLibInfo && Opcode == Instruction::FRem) {

950 VectorType *VecTy = dyn_cast(Ty);

952 if (VecTy &&

957 }

958

960 TTIImpl->getArithmeticInstrCost(Opcode, Ty, CostKind,

961 Op1Info, Op2Info,

962 Args, CxtI);

963 assert(Cost >= 0 && "TTI should not produce negative costs!");

965}

966

968 VectorType *VecTy, unsigned Opcode0, unsigned Opcode1,

971 TTIImpl->getAltInstrCost(VecTy, Opcode0, Opcode1, OpcodeMask, CostKind);

972 assert(Cost >= 0 && "TTI should not produce negative costs!");

974}

975

981 Index, SubTp, Args, CxtI);

982 assert(Cost >= 0 && "TTI should not produce negative costs!");

984}

985

988 if (isa(I))

990 if (isa(I))

993}

994

997 if ()

999

1000 auto getLoadStoreKind = [](const Value *V, unsigned LdStOp, unsigned MaskedOp,

1001 unsigned GatScatOp) {

1002 const Instruction *I = dyn_cast(V);

1003 if ()

1005

1006 if (I->getOpcode() == LdStOp)

1008

1010 if (II->getIntrinsicID() == MaskedOp)

1012 if (II->getIntrinsicID() == GatScatOp)

1014 }

1015

1017 };

1018

1019 switch (I->getOpcode()) {

1020 case Instruction::ZExt:

1021 case Instruction::SExt:

1022 case Instruction::FPExt:

1023 return getLoadStoreKind(I->getOperand(0), Instruction::Load,

1024 Intrinsic::masked_load, Intrinsic::masked_gather);

1025 case Instruction::Trunc:

1026 case Instruction::FPTrunc:

1027 if (I->hasOneUse())

1028 return getLoadStoreKind(*I->user_begin(), Instruction::Store,

1029 Intrinsic::masked_store,

1030 Intrinsic::masked_scatter);

1031 break;

1032 default:

1034 }

1035

1037}

1038

1042 assert((I == nullptr || I->getOpcode() == Opcode) &&

1043 "Opcode should reflect passed instruction.");

1045 TTIImpl->getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I);

1046 assert(Cost >= 0 && "TTI should not produce negative costs!");

1047 return Cost;

1048}

1049

1051 unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index) const {

1053 TTIImpl->getExtractWithExtendCost(Opcode, Dst, VecTy, Index);

1054 assert(Cost >= 0 && "TTI should not produce negative costs!");

1055 return Cost;

1056}

1057

1060 assert((I == nullptr || I->getOpcode() == Opcode) &&

1061 "Opcode should reflect passed instruction.");

1063 assert(Cost >= 0 && "TTI should not produce negative costs!");

1064 return Cost;

1065}

1066

1071 assert((I == nullptr || I->getOpcode() == Opcode) &&

1072 "Opcode should reflect passed instruction.");

1074 Opcode, ValTy, CondTy, VecPred, CostKind, Op1Info, Op2Info, I);

1075 assert(Cost >= 0 && "TTI should not produce negative costs!");

1076 return Cost;

1077}

1078

1082 assert((Opcode == Instruction::InsertElement ||

1083 Opcode == Instruction::ExtractElement) &&

1084 "Expecting Opcode to be insertelement/extractelement.");

1086 TTIImpl->getVectorInstrCost(Opcode, Val, CostKind, Index, Op0, Op1);

1087 assert(Cost >= 0 && "TTI should not produce negative costs!");

1088 return Cost;

1089}

1090

1094 ArrayRef<std::tuple<Value *, User *, int>> ScalarUserAndIdx) const {

1095 assert((Opcode == Instruction::InsertElement ||

1096 Opcode == Instruction::ExtractElement) &&

1097 "Expecting Opcode to be insertelement/extractelement.");

1099 Opcode, Val, CostKind, Index, Scalar, ScalarUserAndIdx);

1100 assert(Cost >= 0 && "TTI should not produce negative costs!");

1101 return Cost;

1102}

1103

1107 unsigned Index) const {

1108

1109

1110

1112 assert(Cost >= 0 && "TTI should not produce negative costs!");

1113 return Cost;

1114}

1115

1117 Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts,

1120 EltTy, ReplicationFactor, VF, DemandedDstElts, CostKind);

1121 assert(Cost >= 0 && "TTI should not produce negative costs!");

1122 return Cost;

1123}

1124

1129 assert((I == nullptr || I->getOpcode() == Opcode) &&

1130 "Opcode should reflect passed instruction.");

1133 assert(Cost >= 0 && "TTI should not produce negative costs!");

1134 return Cost;

1135}

1136

1140 InstructionCost Cost = TTIImpl->getMaskedMemoryOpCost(Opcode, Src, Alignment,

1142 assert(Cost >= 0 && "TTI should not produce negative costs!");

1143 return Cost;

1144}

1145

1147 unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask,

1150 Opcode, DataTy, Ptr, VariableMask, Alignment, CostKind, I);

1152 "TTI should not produce negative costs!");

1153 return Cost;

1154}

1155

1157 unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask,

1160 Opcode, DataTy, Ptr, VariableMask, Alignment, CostKind, I);

1161 assert(Cost >= 0 && "TTI should not produce negative costs!");

1162 return Cost;

1163}

1164

1168 bool UseMaskForCond, bool UseMaskForGaps) const {

1171 UseMaskForCond, UseMaskForGaps);

1172 assert(Cost >= 0 && "TTI should not produce negative costs!");

1173 return Cost;

1174}

1175

1180 assert(Cost >= 0 && "TTI should not produce negative costs!");

1181 return Cost;

1182}

1183

1189 assert(Cost >= 0 && "TTI should not produce negative costs!");

1190 return Cost;

1191}

1192

1194 return TTIImpl->getNumberOfParts(Tp);

1195}

1196

1199 const SCEV *Ptr) const {

1201 assert(Cost >= 0 && "TTI should not produce negative costs!");

1202 return Cost;

1203}

1204

1207 assert(Cost >= 0 && "TTI should not produce negative costs!");

1208 return Cost;

1209}

1210

1212 return TTIImpl->getMaxMemIntrinsicInlineSizeThreshold();

1213}

1214

1216 unsigned Opcode, VectorType *Ty, std::optional FMF,

1219 TTIImpl->getArithmeticReductionCost(Opcode, Ty, FMF, CostKind);

1220 assert(Cost >= 0 && "TTI should not produce negative costs!");

1221 return Cost;

1222}

1223

1228 TTIImpl->getMinMaxReductionCost(IID, Ty, FMF, CostKind);

1229 assert(Cost >= 0 && "TTI should not produce negative costs!");

1230 return Cost;

1231}

1232

1234 unsigned Opcode, bool IsUnsigned, Type *ResTy, VectorType *Ty,

1236 return TTIImpl->getExtendedReductionCost(Opcode, IsUnsigned, ResTy, Ty, FMF,

1238}

1239

1243 return TTIImpl->getMulAccReductionCost(IsUnsigned, ResTy, Ty, CostKind);

1244}

1245

1248 return TTIImpl->getCostOfKeepingLiveOverCall(Tys);

1249}

1250

1253 return TTIImpl->getTgtMemIntrinsic(Inst, Info);

1254}

1255

1257 return TTIImpl->getAtomicMemIntrinsicMaxElementSize();

1258}

1259

1262 return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType);

1263}

1264

1267 unsigned DestAddrSpace, Align SrcAlign, Align DestAlign,

1268 std::optional<uint32_t> AtomicElementSize) const {

1269 return TTIImpl->getMemcpyLoopLoweringType(Context, Length, SrcAddrSpace,

1270 DestAddrSpace, SrcAlign, DestAlign,

1271 AtomicElementSize);

1272}

1273

1276 unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace,

1278 std::optional<uint32_t> AtomicCpySize) const {

1279 TTIImpl->getMemcpyLoopResidualLoweringType(

1280 OpsOut, Context, RemainingBytes, SrcAddrSpace, DestAddrSpace, SrcAlign,

1281 DestAlign, AtomicCpySize);

1282}

1283

1285 const Function *Callee) const {

1286 return TTIImpl->areInlineCompatible(Caller, Callee);

1287}

1288

1289unsigned

1292 unsigned DefaultCallPenalty) const {

1293 return TTIImpl->getInlineCallPenalty(F, Call, DefaultCallPenalty);

1294}

1295

1299 return TTIImpl->areTypesABICompatible(Caller, Callee, Types);

1300}

1301

1303 Type *Ty) const {

1304 return TTIImpl->isIndexedLoadLegal(Mode, Ty);

1305}

1306

1308 Type *Ty) const {

1309 return TTIImpl->isIndexedStoreLegal(Mode, Ty);

1310}

1311

1313 return TTIImpl->getLoadStoreVecRegBitWidth(AS);

1314}

1315

1317 return TTIImpl->isLegalToVectorizeLoad(LI);

1318}

1319

1321 return TTIImpl->isLegalToVectorizeStore(SI);

1322}

1323

1325 unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const {

1326 return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment,

1327 AddrSpace);

1328}

1329

1331 unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const {

1332 return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment,

1333 AddrSpace);

1334}

1335

1338 return TTIImpl->isLegalToVectorizeReduction(RdxDesc, VF);

1339}

1340

1342 return TTIImpl->isElementTypeLegalForScalableVector(Ty);

1343}

1344

1346 unsigned LoadSize,

1347 unsigned ChainSizeInBytes,

1349 return TTIImpl->getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy);

1350}

1351

1353 unsigned StoreSize,

1354 unsigned ChainSizeInBytes,

1356 return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy);

1357}

1358

1360 return TTIImpl->preferFixedOverScalableIfEqualCost();

1361}

1362

1365 return TTIImpl->preferInLoopReduction(Opcode, Ty, Flags);

1366}

1367

1370 return TTIImpl->preferPredicatedReductionSelect(Opcode, Ty, Flags);

1371}

1372

1374 return TTIImpl->preferEpilogueVectorization();

1375}

1376

1379 return TTIImpl->getVPLegalizationStrategy(VPI);

1380}

1381

1383 return TTIImpl->hasArmWideBranch(Thumb);

1384}

1385

1387 return TTIImpl->getFeatureMask(F);

1388}

1389

1391 return TTIImpl->isMultiversionedFunction(F);

1392}

1393

1395 return TTIImpl->getMaxNumArgs();

1396}

1397

1399 return TTIImpl->shouldExpandReduction(II);

1400}

1401

1405 return TTIImpl->getPreferredExpandedReductionShuffle(II);

1406}

1407

1409 return TTIImpl->getGISelRematGlobalCost();

1410}

1411

1413 return TTIImpl->getMinTripCountTailFoldingThreshold();

1414}

1415

1417 return TTIImpl->supportsScalableVectors();

1418}

1419

1421 return TTIImpl->enableScalableVectorization();

1422}

1423

1425 Align Alignment) const {

1426 return TTIImpl->hasActiveVectorLength(Opcode, DataType, Alignment);

1427}

1428

1431 return TTIImpl->isProfitableToSinkOperands(I, OpsToSink);

1432}

1433

1435 return TTIImpl->isVectorShiftByScalarCheap(Ty);

1436}

1437

1438unsigned

1441 return TTIImpl->getNumBytesToPadGlobalArray(Size, ArrayType);

1442}

1443

1445

1447

1449 std::function<Result(const Function &)> TTICallback)

1450 : TTICallback(std::move(TTICallback)) {}

1451

1454 return TTICallback(F);

1455}

1456

1458

1460 return Result(F.getDataLayout());

1461}

1462

1463

1465 "Target Transform Information", false, true)

1467

1469

1474}

1475

1481}

1482

1485 TTI = TIRA.run(F, DummyFAM);

1486 return *TTI;

1487}

1488

1492}

MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL

Analysis containing CSE Info

static cl::opt< TargetTransformInfo::TargetCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(TargetTransformInfo::TCK_RecipThroughput), cl::values(clEnumValN(TargetTransformInfo::TCK_RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(TargetTransformInfo::TCK_Latency, "latency", "Instruction latency"), clEnumValN(TargetTransformInfo::TCK_CodeSize, "code-size", "Code size"), clEnumValN(TargetTransformInfo::TCK_SizeAndLatency, "size-latency", "Code size and latency")))

Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx

static cl::opt< bool > ForceNestedLoop("force-nested-hardware-loop", cl::Hidden, cl::init(false), cl::desc("Force allowance of nested hardware loops"))

static cl::opt< bool > ForceHardwareLoopPHI("force-hardware-loop-phi", cl::Hidden, cl::init(false), cl::desc("Force hardware loop counter to be updated through a phi"))

This file provides various utilities for inspecting and working with the control flow graph in LLVM I...

Module.h This file contains the declarations for the Module class.

mir Rename Register Operands

uint64_t IntrinsicInst * II

#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)

assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())

static SymbolRef::Type getType(const Symbol *Sym)

This file provides helpers for the implementation of a TargetTransformInfo-conforming class.

static cl::opt< unsigned > PredictableBranchThreshold("predictable-branch-threshold", cl::init(99), cl::Hidden, cl::desc("Use this to override the target's predictable branch threshold (%)."))

static cl::opt< bool > EnableReduxCost("costmodel-reduxcost", cl::init(false), cl::Hidden, cl::desc("Recognize reduction patterns."))

static cl::opt< unsigned > MinPageSize("min-page-size", cl::init(0), cl::Hidden, cl::desc("Use this to override the target's minimum page size."))

static cl::opt< unsigned > CacheLineSize("cache-line-size", cl::init(0), cl::Hidden, cl::desc("Use this to override the target cache line size when " "specified by the user."))

This pass exposes codegen information to IR-level passes.

Class for arbitrary precision integers.

an instruction to allocate memory on the stack

A container for analyses that lazily runs them and caches their results.

This class represents an incoming formal argument to a Function.

ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...

Class to represent array types.

A cache of @llvm.assume calls within a function.

LLVM Basic Block Representation.

LLVMContext & getContext() const

Get the context in which this basic block lives.

BlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate IR basic block frequen...

Conditional or Unconditional Branch instruction.

Base class for all callable instructions (InvokeInst and CallInst) Holds everything related to callin...

Function * getCalledFunction() const

Returns the function called, or null if this is an indirect function invocation or the function signa...

User::op_iterator arg_begin()

Return the iterator pointing to the beginning of the argument list.

User::op_iterator arg_end()

Return the iterator pointing to the end of the argument list.

Predicate

This enumeration lists the possible predicates for CmpInst subclasses.

This is an important base class in LLVM.

A parsed version of the target data layout string in and methods for querying it.

Concrete subclass of DominatorTreeBase that is used to compute a normal dominator tree.

bool dominates(const BasicBlock *BB, const Use &U) const

Return true if the (end of the) basic block BB dominates the use U.

Convenience struct for specifying and reasoning about fast-math flags.

Class to represent function types.

param_iterator param_begin() const

param_iterator param_end() const

FunctionType * getFunctionType() const

Returns the FunctionType for me.

ImmutablePass class - This class is used to provide information that does not need to be run.

The core instruction combiner logic.

unsigned getBitWidth() const

Get the number of bits in this IntegerType.

IntrinsicCostAttributes(Intrinsic::ID Id, const CallBase &CI, InstructionCost ScalarCost=InstructionCost::getInvalid(), bool TypeBasedOnly=false)

A wrapper class for inspecting calls to intrinsic functions.

This is an important class for using LLVM in a threaded context.

An instruction for reading from memory.

bool contains(const LoopT *L) const

Return true if the specified loop is contained within in this loop.

void getExitingBlocks(SmallVectorImpl< BlockT * > &ExitingBlocks) const

Return all blocks inside the loop that have successors outside of the loop.

BlockT * getHeader() const

bool isLoopLatch(const BlockT *BB) const

Wrapper class to LoopBlocksDFS that provides a standard begin()/end() interface for the DFS reverse p...

void perform(const LoopInfo *LI)

Traverse the loop blocks and store the DFS result.

LoopT * getLoopFor(const BlockT *BB) const

Return the inner most loop that BB lives in.

Represents a single loop in the control flow graph.

static PassRegistry * getPassRegistry()

getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...

Analysis providing profile information.

The RecurrenceDescriptor is used to identify recurrences variables in a loop.

This class represents a constant integer value.

This class represents an analyzed expression in the program.

The main scalar evolution driver.

uint64_t getTypeSizeInBits(Type *Ty) const

Return the size in bits of the specified type, for which isSCEVable must return true.

bool isLoopInvariant(const SCEV *S, const Loop *L)

Return true if the value of the given SCEV is unchanging in the specified loop.

const SCEV * getExitCount(const Loop *L, const BasicBlock *ExitingBlock, ExitCountKind Kind=Exact)

Return the number of times the backedge executes before the given exit would be taken; if not exactly...

This is a 'bitvector' (really, a variable-sized bit array), optimized for the case when the array is ...

This class consists of common code factored out of the SmallVector class to reduce code duplication b...

This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.

StackOffset holds a fixed and a scalable offset in bytes.

An instruction for storing to memory.

Analysis pass providing the TargetTransformInfo.

Result run(const Function &F, FunctionAnalysisManager &)

TargetTransformInfo Result

TargetIRAnalysis()

Default construct a target IR analysis.

Provides information about what library functions are available for the current target.

bool getLibFunc(StringRef funcName, LibFunc &F) const

Searches for a particular function name.

StringRef getName(LibFunc F) const

bool isFunctionVectorizable(StringRef F, const ElementCount &VF) const

CRTP base class for use as a mix-in that aids implementing a TargetTransformInfo-compatible class.

Wrapper pass for TargetTransformInfo.

TargetTransformInfoWrapperPass()

We must provide a default constructor for the pass but it should never be used.

TargetTransformInfo & getTTI(const Function &F)

This pass provides access to the codegen interfaces that are needed for IR-level transformations.

bool getTgtMemIntrinsic(IntrinsicInst *Inst, MemIntrinsicInfo &Info) const

bool isLegalToVectorizeLoad(LoadInst *LI) const

std::optional< unsigned > getVScaleForTuning() const

static CastContextHint getCastContextHint(const Instruction *I)

Calculates a CastContextHint from I.

unsigned getMaxNumArgs() const

bool addrspacesMayAlias(unsigned AS0, unsigned AS1) const

Return false if a AS0 address cannot possibly alias a AS1 address.

bool isLegalMaskedScatter(Type *DataType, Align Alignment) const

Return true if the target supports masked scatter.

InstructionCost getStridedMemoryOpCost(unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, Align Alignment, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, const Instruction *I=nullptr) const

bool shouldBuildLookupTables() const

Return true if switches should be turned into lookup tables for the target.

bool isLegalToVectorizeStore(StoreInst *SI) const

bool enableAggressiveInterleaving(bool LoopHasReductions) const

Don't restrict interleaved unrolling to small loops.

uint64_t getFeatureMask(const Function &F) const

Returns a bitmask constructed from the target-features or fmv-features metadata of a function.

bool isMultiversionedFunction(const Function &F) const

Returns true if this is an instance of a function with multiple versions.

bool isFCmpOrdCheaperThanFCmpZero(Type *Ty) const

Return true if it is faster to check if a floating-point value is NaN (or not-NaN) versus a compariso...

bool preferInLoopReduction(unsigned Opcode, Type *Ty, ReductionFlags Flags) const

bool supportsEfficientVectorElementLoadStore() const

If target has efficient vector element load/store instructions, it can return true here so that inser...

bool isAlwaysUniform(const Value *V) const

unsigned getAssumedAddrSpace(const Value *V) const

bool shouldDropLSRSolutionIfLessProfitable() const

Return true if LSR should drop a found solution if it's calculated to be less profitable than the bas...

bool isLSRCostLess(const TargetTransformInfo::LSRCost &C1, const TargetTransformInfo::LSRCost &C2) const

Return true if LSR cost of C1 is lower than C2.

unsigned getPrefetchDistance() const

Type * getMemcpyLoopLoweringType(LLVMContext &Context, Value *Length, unsigned SrcAddrSpace, unsigned DestAddrSpace, Align SrcAlign, Align DestAlign, std::optional< uint32_t > AtomicElementSize=std::nullopt) const

bool isLegalMaskedExpandLoad(Type *DataType, Align Alignment) const

Return true if the target supports masked expand load.

bool prefersVectorizedAddressing() const

Return true if target doesn't mind addresses in vectors.

InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, OperandValueInfo Op1Info={OK_AnyValue, OP_None}, OperandValueInfo Op2Info={OK_AnyValue, OP_None}, const Instruction *I=nullptr) const

bool hasBranchDivergence(const Function *F=nullptr) const

Return true if branch divergence exists.

MemCmpExpansionOptions enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const

InstructionCost getAddressComputationCost(Type *Ty, ScalarEvolution *SE=nullptr, const SCEV *Ptr=nullptr) const

void getUnrollingPreferences(Loop *L, ScalarEvolution &, UnrollingPreferences &UP, OptimizationRemarkEmitter *ORE) const

Get target-customized preferences for the generic loop unrolling transformation.

bool shouldBuildLookupTablesForConstant(Constant *C) const

Return true if switches should be turned into lookup tables containing this constant value for the ta...

InstructionCost getOperandsScalarizationOverhead(ArrayRef< const Value * > Args, ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind) const

Estimate the overhead of scalarizing an instructions unique non-constant operands.

bool supportsTailCallFor(const CallBase *CB) const

If target supports tail call on CB.

std::optional< Instruction * > instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const

Targets can implement their own combinations for target-specific intrinsics.

bool isProfitableLSRChainElement(Instruction *I) const

TypeSize getRegisterBitWidth(RegisterKind K) const

unsigned getInlineCallPenalty(const Function *F, const CallBase &Call, unsigned DefaultCallPenalty) const

Returns a penalty for invoking call Call in F.

bool isExpensiveToSpeculativelyExecute(const Instruction *I) const

Return true if the cost of the instruction is too high to speculatively execute and should be kept be...

bool isLegalMaskedGather(Type *DataType, Align Alignment) const

Return true if the target supports masked gather.

InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, OperandValueInfo OpdInfo={OK_AnyValue, OP_None}, const Instruction *I=nullptr) const

std::optional< unsigned > getMaxVScale() const

InstructionCost getReplicationShuffleCost(Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts, TTI::TargetCostKind CostKind) const

InstructionCost getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, bool UseMaskForCond=false, bool UseMaskForGaps=false) const

bool isSingleThreaded() const

std::optional< Value * > simplifyDemandedVectorEltsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp) const

Can be used to implement target-specific instruction combining.

bool enableOrderedReductions() const

Return true if we should be enabling ordered reductions for the target.

unsigned getInliningCostBenefitAnalysisProfitableMultiplier() const

InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const

InstructionCost getArithmeticReductionCost(unsigned Opcode, VectorType *Ty, std::optional< FastMathFlags > FMF, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput) const

Calculate the cost of vector reduction intrinsics.

unsigned getAtomicMemIntrinsicMaxElementSize() const

InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind=TTI::TCK_SizeAndLatency, const Instruction *I=nullptr) const

bool LSRWithInstrQueries() const

Return true if the loop strength reduce pass should make Instruction* based TTI queries to isLegalAdd...

unsigned getStoreVectorFactor(unsigned VF, unsigned StoreSize, unsigned ChainSizeInBytes, VectorType *VecTy) const

VPLegalization getVPLegalizationStrategy(const VPIntrinsic &PI) const

static PartialReductionExtendKind getPartialReductionExtendKind(Instruction *I)

Get the kind of extension that an instruction represents.

bool enableWritePrefetching() const

bool shouldTreatInstructionLikeSelect(const Instruction *I) const

Should the Select Optimization pass treat the given instruction like a select, potentially converting...

bool isNoopAddrSpaceCast(unsigned FromAS, unsigned ToAS) const

bool shouldMaximizeVectorBandwidth(TargetTransformInfo::RegisterKind K) const

TailFoldingStyle getPreferredTailFoldingStyle(bool IVUpdateMayOverflow=true) const

Query the target what the preferred style of tail folding is.

InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr, ArrayRef< const Value * > Operands, Type *AccessType=nullptr, TargetCostKind CostKind=TCK_SizeAndLatency) const

Estimate the cost of a GEP operation when lowered.

bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const

bool isLegalInterleavedAccessType(VectorType *VTy, unsigned Factor, Align Alignment, unsigned AddrSpace) const

Return true is the target supports interleaved access for the given vector type VTy,...

unsigned getRegUsageForType(Type *Ty) const

Returns the estimated number of registers required to represent Ty.

bool isLegalBroadcastLoad(Type *ElementTy, ElementCount NumElements) const

\Returns true if the target supports broadcasting a load to a vector of type <NumElements x ElementTy...

bool isIndexedStoreLegal(enum MemIndexedMode Mode, Type *Ty) const

std::pair< const Value *, unsigned > getPredicatedAddrSpace(const Value *V) const

unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) const

ReductionShuffle getPreferredExpandedReductionShuffle(const IntrinsicInst *II) const

InstructionCost getExtendedReductionCost(unsigned Opcode, bool IsUnsigned, Type *ResTy, VectorType *Ty, FastMathFlags FMF, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput) const

Calculate the cost of an extended reduction pattern, similar to getArithmeticReductionCost of a reduc...

static OperandValueInfo getOperandInfo(const Value *V)

Collect properties of V used in cost analysis, e.g. OP_PowerOf2.

InstructionCost getMulAccReductionCost(bool IsUnsigned, Type *ResTy, VectorType *Ty, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput) const

Calculate the cost of an extended reduction pattern, similar to getArithmeticReductionCost of an Add ...

unsigned getRegisterClassForType(bool Vector, Type *Ty=nullptr) const

bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace=0, Instruction *I=nullptr, int64_t ScalableOffset=0) const

Return true if the addressing mode represented by AM is legal for this target, for a load/store of th...

PopcntSupportKind getPopcntSupport(unsigned IntTyWidthInBit) const

Return hardware support for population count.

unsigned getEstimatedNumberOfCaseClusters(const SwitchInst &SI, unsigned &JTSize, ProfileSummaryInfo *PSI, BlockFrequencyInfo *BFI) const

bool isElementTypeLegalForScalableVector(Type *Ty) const

bool forceScalarizeMaskedGather(VectorType *Type, Align Alignment) const

Return true if the target forces scalarizing of llvm.masked.gather intrinsics.

unsigned getMaxPrefetchIterationsAhead() const

bool canHaveNonUndefGlobalInitializerInAddressSpace(unsigned AS) const

Return true if globals in this address space can have initializers other than undef.

ElementCount getMinimumVF(unsigned ElemWidth, bool IsScalable) const

InstructionCost getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, const APInt &Imm, Type *Ty, TargetCostKind CostKind) const

bool enableMaskedInterleavedAccessVectorization() const

Enable matching of interleaved access groups that contain predicated accesses or gaps and therefore v...

InstructionCost getIntImmCostInst(unsigned Opc, unsigned Idx, const APInt &Imm, Type *Ty, TargetCostKind CostKind, Instruction *Inst=nullptr) const

Return the expected cost of materialization for the given integer immediate of the specified type for...

bool isLegalStridedLoadStore(Type *DataType, Align Alignment) const

Return true if the target supports strided load.

TargetTransformInfo & operator=(TargetTransformInfo &&RHS)

InstructionCost getMinMaxReductionCost(Intrinsic::ID IID, VectorType *Ty, FastMathFlags FMF=FastMathFlags(), TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput) const

TargetCostKind

The kind of cost model.

@ TCK_RecipThroughput

Reciprocal throughput.

InstructionCost getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, TTI::OperandValueInfo Opd1Info={TTI::OK_AnyValue, TTI::OP_None}, TTI::OperandValueInfo Opd2Info={TTI::OK_AnyValue, TTI::OP_None}, ArrayRef< const Value * > Args={}, const Instruction *CxtI=nullptr, const TargetLibraryInfo *TLibInfo=nullptr) const

This is an approximation of reciprocal throughput of a math/logic op.

bool areTypesABICompatible(const Function *Caller, const Function *Callee, const ArrayRef< Type * > &Types) const

bool enableSelectOptimize() const

Should the Select Optimization pass be enabled and ran.

bool collectFlatAddressOperands(SmallVectorImpl< int > &OpIndexes, Intrinsic::ID IID) const

Return any intrinsic address operand indexes which may be rewritten if they use a flat address space ...

OperandValueProperties

Additional properties of an operand's values.

int getInliningLastCallToStaticBonus() const

InstructionCost getPointersChainCost(ArrayRef< const Value * > Ptrs, const Value *Base, const PointersChainInfo &Info, Type *AccessTy, TargetCostKind CostKind=TTI::TCK_RecipThroughput) const

Estimate the cost of a chain of pointers (typically pointer operands of a chain of loads or stores wi...

bool isVScaleKnownToBeAPowerOfTwo() const

bool isIndexedLoadLegal(enum MemIndexedMode Mode, Type *Ty) const

unsigned getMaximumVF(unsigned ElemWidth, unsigned Opcode) const

bool isSourceOfDivergence(const Value *V) const

Returns whether V is a source of divergence.

bool isLegalICmpImmediate(int64_t Imm) const

Return true if the specified immediate is legal icmp immediate, that is the target has icmp instructi...

bool isTypeLegal(Type *Ty) const

Return true if this type is legal.

bool isLegalToVectorizeReduction(const RecurrenceDescriptor &RdxDesc, ElementCount VF) const

std::optional< unsigned > getCacheAssociativity(CacheLevel Level) const

bool isLegalNTLoad(Type *DataType, Align Alignment) const

Return true if the target supports nontemporal load.

InstructionCost getMemcpyCost(const Instruction *I) const

unsigned adjustInliningThreshold(const CallBase *CB) const

bool isLegalAddImmediate(int64_t Imm) const

Return true if the specified immediate is legal add immediate, that is the target has add instruction...

bool isTargetIntrinsicWithStructReturnOverloadAtField(Intrinsic::ID ID, int RetIdx) const

Identifies if the vector form of the intrinsic that returns a struct is overloaded at the struct elem...

unsigned getLoadVectorFactor(unsigned VF, unsigned LoadSize, unsigned ChainSizeInBytes, VectorType *VecTy) const

InstructionCost getMaskedMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput) const

bool canSaveCmp(Loop *L, BranchInst **BI, ScalarEvolution *SE, LoopInfo *LI, DominatorTree *DT, AssumptionCache *AC, TargetLibraryInfo *LibInfo) const

Return true if the target can save a compare for loop count, for example hardware loop saves a compar...

bool isTargetIntrinsicTriviallyScalarizable(Intrinsic::ID ID) const

Value * rewriteIntrinsicWithAddressSpace(IntrinsicInst *II, Value *OldV, Value *NewV) const

Rewrite intrinsic call II such that OldV will be replaced with NewV, which has a different address sp...

InstructionCost getCostOfKeepingLiveOverCall(ArrayRef< Type * > Tys) const

unsigned getMinPrefetchStride(unsigned NumMemAccesses, unsigned NumStridedMemAccesses, unsigned NumPrefetches, bool HasCall) const

Some HW prefetchers can handle accesses up to a certain constant stride.

bool preferPredicatedReductionSelect(unsigned Opcode, Type *Ty, ReductionFlags Flags) const

InstructionCost getShuffleCost(ShuffleKind Kind, VectorType *Tp, ArrayRef< int > Mask={}, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, int Index=0, VectorType *SubTp=nullptr, ArrayRef< const Value * > Args={}, const Instruction *CxtI=nullptr) const

bool shouldPrefetchAddressSpace(unsigned AS) const

InstructionCost getIntImmCost(const APInt &Imm, Type *Ty, TargetCostKind CostKind) const

Return the expected cost of materializing for the given integer immediate of the specified type.

unsigned getMinVectorRegisterBitWidth() const

bool isLegalNTStore(Type *DataType, Align Alignment) const

Return true if the target supports nontemporal store.

unsigned getFlatAddressSpace() const

Returns the address space ID for a target's 'flat' address space.

bool preferToKeepConstantsAttached(const Instruction &Inst, const Function &Fn) const

It can be advantageous to detach complex constants from their uses to make their generation cheaper.

bool hasArmWideBranch(bool Thumb) const

const char * getRegisterClassName(unsigned ClassID) const

bool preferEpilogueVectorization() const

Return true if the loop vectorizer should consider vectorizing an otherwise scalar epilogue loop.

bool shouldConsiderAddressTypePromotion(const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const

BranchProbability getPredictableBranchThreshold() const

If a branch or a select condition is skewed in one direction by more than this factor,...

unsigned getCallerAllocaCost(const CallBase *CB, const AllocaInst *AI) const

unsigned getCacheLineSize() const

bool allowsMisalignedMemoryAccesses(LLVMContext &Context, unsigned BitWidth, unsigned AddressSpace=0, Align Alignment=Align(1), unsigned *Fast=nullptr) const

Determine if the target supports unaligned memory accesses.

InstructionCost getGatherScatterOpCost(unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, Align Alignment, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, const Instruction *I=nullptr) const

int getInlinerVectorBonusPercent() const

bool hasActiveVectorLength(unsigned Opcode, Type *DataType, Align Alignment) const

unsigned getEpilogueVectorizationMinVF() const

PopcntSupportKind

Flags indicating the kind of support for population count.

InstructionCost getIntImmCodeSizeCost(unsigned Opc, unsigned Idx, const APInt &Imm, Type *Ty) const

Return the expected cost for the given integer when optimising for size.

AddressingModeKind getPreferredAddressingMode(const Loop *L, ScalarEvolution *SE) const

Return the preferred addressing mode LSR should make efforts to generate.

bool isLoweredToCall(const Function *F) const

Test whether calls to a function lower to actual program function calls.

bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const

bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const

Query the target whether it would be profitable to convert the given loop into a hardware loop.

unsigned getInliningThresholdMultiplier() const

InstructionCost getBranchMispredictPenalty() const

Returns estimated penalty of a branch misprediction in latency.

unsigned getNumberOfRegisters(unsigned ClassID) const

bool isLegalAltInstr(VectorType *VecTy, unsigned Opcode0, unsigned Opcode1, const SmallBitVector &OpcodeMask) const

Return true if this is an alternating opcode pattern that can be lowered to a single instruction on t...

bool isProfitableToHoist(Instruction *I) const

Return true if it is profitable to hoist instruction in the then/else to before if.

bool supportsScalableVectors() const

bool hasVolatileVariant(Instruction *I, unsigned AddrSpace) const

Return true if the given instruction (assumed to be a memory access instruction) has a volatile varia...

bool isLegalMaskedCompressStore(Type *DataType, Align Alignment) const

Return true if the target supports masked compress store.

std::optional< unsigned > getMinPageSize() const

bool isFPVectorizationPotentiallyUnsafe() const

Indicate that it is potentially unsafe to automatically vectorize floating-point operations because t...

bool isLegalMaskedStore(Type *DataType, Align Alignment) const

Return true if the target supports masked store.

bool shouldBuildRelLookupTables() const

Return true if lookup tables should be turned into relative lookup tables.

PartialReductionExtendKind

unsigned getStoreMinimumVF(unsigned VF, Type *ScalarMemTy, Type *ScalarValTy) const

std::optional< unsigned > getCacheSize(CacheLevel Level) const

std::optional< Value * > simplifyDemandedUseBitsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, bool &KnownBitsComputed) const

Can be used to implement target-specific instruction combining.

bool isLegalAddScalableImmediate(int64_t Imm) const

Return true if adding the specified scalable immediate is legal, that is the target has add instructi...

bool isTargetIntrinsicWithScalarOpAtArg(Intrinsic::ID ID, unsigned ScalarOpdIdx) const

Identifies if the vector form of the intrinsic has a scalar operand.

bool hasDivRemOp(Type *DataType, bool IsSigned) const

Return true if the target has a unified operation to calculate division and remainder.

InstructionCost getAltInstrCost(VectorType *VecTy, unsigned Opcode0, unsigned Opcode1, const SmallBitVector &OpcodeMask, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput) const

Returns the cost estimation for alternating opcode pattern that can be lowered to a single instructio...

InstructionCost getScalarizationOverhead(VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract, TTI::TargetCostKind CostKind, ArrayRef< Value * > VL={}) const

Estimate the overhead of scalarizing an instruction.

bool enableInterleavedAccessVectorization() const

Enable matching of interleaved access groups.

unsigned getMinTripCountTailFoldingThreshold() const

InstructionCost getInstructionCost(const User *U, ArrayRef< const Value * > Operands, TargetCostKind CostKind) const

Estimate the cost of a given IR user when lowered.

unsigned getMaxInterleaveFactor(ElementCount VF) const

bool enableScalableVectorization() const

bool isVectorShiftByScalarCheap(Type *Ty) const

Return true if it's significantly cheaper to shift a vector by a uniform scalar than by an amount whi...

bool isNumRegsMajorCostOfLSR() const

Return true if LSR major cost is number of registers.

unsigned getInliningCostBenefitAnalysisSavingsMultiplier() const

bool isLegalMaskedVectorHistogram(Type *AddrType, Type *DataType) const

InstructionCost getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index) const

unsigned getGISelRematGlobalCost() const

unsigned getNumBytesToPadGlobalArray(unsigned Size, Type *ArrayType) const

MemIndexedMode

The type of load/store indexing.

bool areInlineCompatible(const Function *Caller, const Function *Callee) const

bool useColdCCForColdCall(Function &F) const

Return true if the input function which is cold at all call sites, should use coldcc calling conventi...

InstructionCost getFPOpCost(Type *Ty) const

Return the expected cost of supporting the floating point operation of the specified type.

bool supportsTailCalls() const

If the target supports tail calls.

bool canMacroFuseCmp() const

Return true if the target can fuse a compare and branch.

Value * getOrCreateResultFromMemIntrinsic(IntrinsicInst *Inst, Type *ExpectedType) const

bool isValidAddrSpaceCast(unsigned FromAS, unsigned ToAS) const

Query the target whether the specified address space cast from FromAS to ToAS is valid.

unsigned getNumberOfParts(Type *Tp) const

bool hasConditionalLoadStoreForType(Type *Ty=nullptr) const

InstructionCost getPartialReductionCost(unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType, ElementCount VF, PartialReductionExtendKind OpAExtend, PartialReductionExtendKind OpBExtend, std::optional< unsigned > BinOp=std::nullopt) const

InstructionCost getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, StackOffset BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace=0) const

Return the cost of the scaling factor used in the addressing mode represented by AM for this target,...

bool isTruncateFree(Type *Ty1, Type *Ty2) const

Return true if it's free to truncate a value of type Ty1 to type Ty2.

bool isProfitableToSinkOperands(Instruction *I, SmallVectorImpl< Use * > &Ops) const

Return true if sinking I's operands to the same basic block as I is profitable, e....

void getMemcpyLoopResidualLoweringType(SmallVectorImpl< Type * > &OpsOut, LLVMContext &Context, unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace, Align SrcAlign, Align DestAlign, std::optional< uint32_t > AtomicCpySize=std::nullopt) const

bool preferPredicateOverEpilogue(TailFoldingInfo *TFI) const

Query the target whether it would be prefered to create a predicated vector loop, which can avoid the...

bool forceScalarizeMaskedScatter(VectorType *Type, Align Alignment) const

Return true if the target forces scalarizing of llvm.masked.scatter intrinsics.

bool isTargetIntrinsicWithOverloadTypeAtArg(Intrinsic::ID ID, int OpdIdx) const

Identifies if the vector form of the intrinsic is overloaded on the type of the operand at index OpdI...

bool haveFastSqrt(Type *Ty) const

Return true if the hardware has a fast square-root instruction.

bool shouldExpandReduction(const IntrinsicInst *II) const

TargetTransformInfo(T Impl)

Construct a TTI object using a type implementing the Concept API below.

uint64_t getMaxMemIntrinsicInlineSizeThreshold() const

Returns the maximum memset / memcpy size in bytes that still makes it profitable to inline the call.

InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index=-1, Value *Op0=nullptr, Value *Op1=nullptr) const

ShuffleKind

The various kinds of shuffle patterns for vector queries.

void getPeelingPreferences(Loop *L, ScalarEvolution &SE, PeelingPreferences &PP) const

Get target-customized preferences for the generic loop peeling transformation.

InstructionCost getCallInstrCost(Function *F, Type *RetTy, ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind=TTI::TCK_SizeAndLatency) const

InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind=TTI::TCK_SizeAndLatency, const Instruction *I=nullptr) const

CastContextHint

Represents a hint about the context in which a cast is used.

@ Masked

The cast is used with a masked load/store.

@ None

The cast is not used with a load/store of any kind.

@ Normal

The cast is used with a normal load/store.

@ GatherScatter

The cast is used with a gather/scatter.

OperandValueKind

Additional information about an operand's possible values.

@ OK_UniformConstantValue

@ OK_NonUniformConstantValue

CacheLevel

The possible cache levels.

bool preferFixedOverScalableIfEqualCost() const

bool isLegalMaskedLoad(Type *DataType, Align Alignment) const

Return true if the target supports masked load.

The instances of the Type class are immutable: once they are created, they are never changed.

static IntegerType * getInt32Ty(LLVMContext &C)

Type * getScalarType() const

If this is a vector type, return the element type, otherwise return 'this'.

This is the common base class for vector predication intrinsics.

LLVM Value Representation.

Type * getType() const

All values are typed, get the type of this value.

Base class of all SIMD vector types.

ElementCount getElementCount() const

Return an ElementCount instance to represent the (possibly scalable) number of elements in the vector...

@ Fast

Attempts to make calls as fast as possible (e.g.

@ C

The default llvm calling convention, compatible with C.

initializer< Ty > init(const Ty &Val)

This is an optimization pass for GlobalISel generic memory operations.

void initializeTargetTransformInfoWrapperPassPass(PassRegistry &)

decltype(auto) dyn_cast(const From &Val)

dyn_cast - Return the argument parameter cast to the specified type.

Value * getSplatValue(const Value *V)

Get splat value if the input is a splat vector or return nullptr.

ImmutablePass * createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA)

Create an analysis pass wrapper around a TTI object.

constexpr unsigned BitWidth

OutputIt move(R &&Range, OutputIt Out)

Provide wrappers to std::move which take ranges instead of having to pass begin/end explicitly.

auto predecessors(const MachineBasicBlock *BB)

Implement std::hash so that hash_code can be used in STL containers.

This struct is a compact representation of a valid (non-zero power of two) alignment.

A special type used by analysis passes to provide an address that identifies that particular analysis...

Attributes of a target dependent hardware loop.

bool canAnalyze(LoopInfo &LI)

HardwareLoopInfo()=delete

bool isHardwareLoopCandidate(ScalarEvolution &SE, LoopInfo &LI, DominatorTree &DT, bool ForceNestedLoop=false, bool ForceHardwareLoopPHI=false)

Information about a load/store intrinsic defined by the target.

Returns options for expansion of memcmp. IsZeroCmp is.

Describe known properties for a set of pointers.

Flags describing the kind of vector reduction.

Parameters that control the generic loop unrolling transformation.