LLVM: include/llvm/Analysis/TargetTransformInfo.h Source File (original) (raw)
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21#ifndef LLVM_ANALYSIS_TARGETTRANSFORMINFO_H
22#define LLVM_ANALYSIS_TARGETTRANSFORMINFO_H
23
33#include
34#include
35#include
36
37namespace llvm {
38
40typedef unsigned ID;
41}
42
43class AllocaInst;
44class AssumptionCache;
45class BlockFrequencyInfo;
46class DominatorTree;
47class BranchInst;
49class GlobalValue;
51class OptimizationRemarkEmitter;
52class InterleavedAccessInfo;
53class IntrinsicInst;
54class LoadInst;
55class Loop;
56class LoopInfo;
57class LoopVectorizationLegality;
58class ProfileSummaryInfo;
59class RecurrenceDescriptor;
60class SCEV;
61class ScalarEvolution;
62class SmallBitVector;
63class StoreInst;
64class SwitchInst;
65class TargetLibraryInfo;
67class VPIntrinsic;
68struct KnownBits;
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92 }
93};
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106 bool IsNestingLegal = false;
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108 bool CounterInReg = false;
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110 bool PerformEntryTest = false;
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117};
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121 Type *RetTy = nullptr;
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130public:
134 bool TypeBasedOnly = false);
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160 }
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163};
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196};
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205};
206
207class TargetTransformInfo;
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213public:
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251 return false;
252 }
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291 TCC_Expensive = 4
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326 return {1, 1,
327 1, 0};
328 }
330 return {1, 0,
331 1, 0};
332 }
334 return {1, 0,
335 0, 0};
336 }
337 };
338 static_assert(sizeof(PointersChainInfo) == 4, "Was size increase justified?");
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346 const PointersChainInfo &Info, Type *AccessTy,
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394 unsigned &JTSize,
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421 }
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497 std::pair<const Value *, unsigned>
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506 Value *NewV) const;
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693 KnownBits & Known, bool &KnownBitsComputed) const;
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698 APInt & UndefElts, APInt & UndefElts2, APInt & UndefElts3,
700 SimplifyAndSetOp) const;
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744 bool HasBaseReg, int64_t Scale,
745 unsigned AddrSpace = 0, Instruction *I = nullptr,
746 int64_t ScalableOffset = 0) const;
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822 Align Alignment, unsigned AddrSpace) const;
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865 int64_t Scale,
866 unsigned AddrSpace = 0) const;
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883 bool useAA() const;
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910 unsigned ScalarOpdIdx) const;
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916 int OpdIdx) const;
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921 int RetIdx) const;
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928 const APInt &DemandedElts,
929 bool Insert, bool Extract,
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936 InstructionCost
938 ArrayRef<Type *> Tys,
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992 };
994 bool IsZeroCmp) const;
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1026 unsigned *Fast = nullptr) const;
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1076 const APInt &Imm, Type *Ty) const;
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1096 SK_Select,
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1185 std::optional getMaxVScale() const;
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1211 unsigned getMaximumVF(unsigned ElemWidth, unsigned Opcode) const;
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1222 Type *ScalarValTy) const;
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1228 const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const;
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1235 L1D,
1236 L2D,
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1275 unsigned NumStridedMemAccesses,
1276 unsigned NumPrefetches, bool HasCall) const;
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1301 std::optional BinOp = std::nullopt) const;
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1330 unsigned Opcode, Type *Ty,
1334 ArrayRef<const Value *> Args = {}, const Instruction *CxtI = nullptr,
1335 const TargetLibraryInfo *TLibInfo = nullptr) const;
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1345 VectorType *VecTy, unsigned Opcode0, unsigned Opcode1,
1346 const SmallBitVector &OpcodeMask,
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1357 InstructionCost
1361 ArrayRef<const Value *> Args = {},
1362 const Instruction *CxtI = nullptr) const;
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1385 None,
1386 Normal,
1387 Masked,
1388 GatherScatter,
1389 Interleave,
1390 Reversed,
1391 };
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1413 unsigned Index) const;
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1435 const Instruction *I = nullptr) const;
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1444 unsigned Index = -1, Value *Op0 = nullptr,
1445 Value *Op1 = nullptr) const;
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1458 Value *Scalar,
1459 ArrayRef<std::tuple<Value *, User *, int>> ScalarUserAndIdx) const;
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1469 unsigned Index = -1) const;
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1477 int VF,
1478 const APInt &DemandedDstElts,
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1482 InstructionCost
1483 getMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment,
1487 const Instruction *I = nullptr) const;
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1490 InstructionCost
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1525 unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask,
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1543 bool UseMaskForCond = false, bool UseMaskForGaps = false) const;
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1548 return FMF && !(*FMF).allowReassoc();
1549 }
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1576 unsigned Opcode, VectorType *Ty, std::optional FMF,
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1597 unsigned Opcode, bool IsUnsigned, Type *ResTy, VectorType *Ty,
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1625 const SCEV *Ptr = nullptr) const;
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1649 Type *ExpectedType) const;
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1654 unsigned DestAddrSpace, Align SrcAlign, Align DestAlign,
1655 std::optional<uint32_t> AtomicElementSize = std::nullopt) const;
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1665 unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace,
1667 std::optional<uint32_t> AtomicCpySize = std::nullopt) const;
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1672 const Function *Callee) const;
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1681 unsigned DefaultCallPenalty) const;
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1717 unsigned AddrSpace) const;
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1721 unsigned AddrSpace) const;
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1733 unsigned ChainSizeInBytes,
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1739 unsigned ChainSizeInBytes,
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1746 false;
1749 false;
1750 };
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1811 Align Alignment) const;
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1889private:
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1892 class Concept;
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1896 template class Model;
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1898 std::unique_ptr TTIImpl;
1899};
1900
1902public:
1907 Type *AccessType,
1915 virtual unsigned
1924 virtual unsigned
1942 virtual bool
1946 virtual std::pair<const Value *, unsigned>
1950 Value *NewV) const = 0;
1969 KnownBits & Known, bool &KnownBitsComputed) = 0;
1974 SimplifyAndSetOp) = 0;
1979 int64_t BaseOffset, bool HasBaseReg,
1980 int64_t Scale, unsigned AddrSpace,
1982 int64_t ScalableOffset) = 0;
2003 Align Alignment) = 0;
2005 Align Alignment) = 0;
2010 Align Alignment,
2011 unsigned AddrSpace) = 0;
2012
2015 unsigned Opcode1,
2023 bool HasBaseReg, int64_t Scale,
2024 unsigned AddrSpace) = 0;
2037 unsigned ScalarOpdIdx) = 0;
2039 int OpdIdx) = 0;
2040 virtual bool
2042 int RetIdx) = 0;
2065 Align Alignment,
2066 unsigned *Fast) = 0;
2073 const APInt &Imm, Type *Ty) = 0;
2084 const Function &Fn) const = 0;
2088 Type *Ty = nullptr) const = 0;
2095 virtual bool
2098 bool IsScalable) const = 0;
2099 virtual unsigned getMaximumVF(unsigned ElemWidth, unsigned Opcode) const = 0;
2101 Type *ScalarValTy) const = 0;
2103 const Instruction &I, bool &AllowPromotionWithoutCommonHeader) = 0;
2107 const = 0;
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2122 unsigned NumStridedMemAccesses,
2123 unsigned NumPrefetches,
2124 bool HasCall) const = 0;
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2149 std::optional BinOp) const = 0;
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2157 VectorType *VecTy, unsigned Opcode0, unsigned Opcode1,
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2171 unsigned Index) = 0;
2183 Value *Op1) = 0;
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2192 ArrayRef<std::tuple<Value *, User *, int>> ScalarUserAndIdx) = 0;
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2196 unsigned Index) = 0;
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2200 const APInt &DemandedDstElts,
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2208 Align Alignment,
2218 bool VariableMask, Align Alignment,
2223 bool VariableMask, Align Alignment,
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2230 bool UseMaskForCond = false, bool UseMaskForGaps = false) = 0;
2233 std::optional FMF,
2239 unsigned Opcode, bool IsUnsigned, Type *ResTy, VectorType *Ty,
2260 Type *ExpectedType) = 0;
2263 unsigned DestAddrSpace, Align SrcAlign, Align DestAlign,
2264 std::optional<uint32_t> AtomicElementSize) const = 0;
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2268 unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace,
2270 std::optional<uint32_t> AtomicCpySize) const = 0;
2272 const Function *Callee) const = 0;
2274 unsigned DefaultCallPenalty) const = 0;
2284 Align Alignment,
2285 unsigned AddrSpace) const = 0;
2287 Align Alignment,
2288 unsigned AddrSpace) const = 0;
2293 unsigned ChainSizeInBytes,
2296 unsigned ChainSizeInBytes,
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2313 Align Alignment) const = 0;
2314 virtual bool
2317
2327};
2328
2329template
2331 T Impl;
2332
2333public:
2334 Model(T Impl) : Impl(std::move(Impl)) {}
2335 ~Model() override = default;
2336
2337 const DataLayout &getDataLayout() const override {
2338 return Impl.getDataLayout();
2339 }
2340
2341 InstructionCost
2342 getGEPCost(Type *PointeeType, const Value *Ptr,
2343 ArrayRef<const Value *> Operands, Type *AccessType,
2345 return Impl.getGEPCost(PointeeType, Ptr, Operands, AccessType, CostKind);
2346 }
2347 InstructionCost getPointersChainCost(ArrayRef<const Value *> Ptrs,
2348 const Value *Base,
2349 const PointersChainInfo &Info,
2350 Type *AccessTy,
2352 return Impl.getPointersChainCost(Ptrs, Base, Info, AccessTy, CostKind);
2353 }
2354 unsigned getInliningThresholdMultiplier() const override {
2355 return Impl.getInliningThresholdMultiplier();
2356 }
2357 unsigned adjustInliningThreshold(const CallBase *CB) override {
2358 return Impl.adjustInliningThreshold(CB);
2359 }
2360 unsigned getInliningCostBenefitAnalysisSavingsMultiplier() const override {
2361 return Impl.getInliningCostBenefitAnalysisSavingsMultiplier();
2362 }
2363 unsigned getInliningCostBenefitAnalysisProfitableMultiplier() const override {
2364 return Impl.getInliningCostBenefitAnalysisProfitableMultiplier();
2365 }
2366 int getInliningLastCallToStaticBonus() const override {
2367 return Impl.getInliningLastCallToStaticBonus();
2368 }
2369 int getInlinerVectorBonusPercent() const override {
2370 return Impl.getInlinerVectorBonusPercent();
2371 }
2372 unsigned getCallerAllocaCost(const CallBase *CB,
2373 const AllocaInst *AI) const override {
2374 return Impl.getCallerAllocaCost(CB, AI);
2375 }
2376 InstructionCost getMemcpyCost(const Instruction *I) override {
2377 return Impl.getMemcpyCost(I);
2378 }
2379
2380 uint64_t getMaxMemIntrinsicInlineSizeThreshold() const override {
2381 return Impl.getMaxMemIntrinsicInlineSizeThreshold();
2382 }
2383
2384 InstructionCost getInstructionCost(const User *U,
2385 ArrayRef<const Value *> Operands,
2388 }
2389 BranchProbability getPredictableBranchThreshold() override {
2390 return Impl.getPredictableBranchThreshold();
2391 }
2392 InstructionCost getBranchMispredictPenalty() override {
2393 return Impl.getBranchMispredictPenalty();
2394 }
2395 bool hasBranchDivergence(const Function *F = nullptr) override {
2396 return Impl.hasBranchDivergence(F);
2397 }
2398 bool isSourceOfDivergence(const Value *V) override {
2399 return Impl.isSourceOfDivergence(V);
2400 }
2401
2402 bool isAlwaysUniform(const Value *V) override {
2403 return Impl.isAlwaysUniform(V);
2404 }
2405
2406 bool isValidAddrSpaceCast(unsigned FromAS, unsigned ToAS) const override {
2407 return Impl.isValidAddrSpaceCast(FromAS, ToAS);
2408 }
2409
2410 bool addrspacesMayAlias(unsigned AS0, unsigned AS1) const override {
2411 return Impl.addrspacesMayAlias(AS0, AS1);
2412 }
2413
2414 unsigned getFlatAddressSpace() override { return Impl.getFlatAddressSpace(); }
2415
2416 bool collectFlatAddressOperands(SmallVectorImpl &OpIndexes,
2418 return Impl.collectFlatAddressOperands(OpIndexes, IID);
2419 }
2420
2421 bool isNoopAddrSpaceCast(unsigned FromAS, unsigned ToAS) const override {
2422 return Impl.isNoopAddrSpaceCast(FromAS, ToAS);
2423 }
2424
2425 bool
2426 canHaveNonUndefGlobalInitializerInAddressSpace(unsigned AS) const override {
2427 return Impl.canHaveNonUndefGlobalInitializerInAddressSpace(AS);
2428 }
2429
2430 unsigned getAssumedAddrSpace(const Value *V) const override {
2431 return Impl.getAssumedAddrSpace(V);
2432 }
2433
2434 bool isSingleThreaded() const override { return Impl.isSingleThreaded(); }
2435
2436 std::pair<const Value *, unsigned>
2437 getPredicatedAddrSpace(const Value *V) const override {
2438 return Impl.getPredicatedAddrSpace(V);
2439 }
2440
2441 Value *rewriteIntrinsicWithAddressSpace(IntrinsicInst *II, Value *OldV,
2442 Value *NewV) const override {
2443 return Impl.rewriteIntrinsicWithAddressSpace(II, OldV, NewV);
2444 }
2445
2446 bool isLoweredToCall(const Function *F) override {
2447 return Impl.isLoweredToCall(F);
2448 }
2449 void getUnrollingPreferences(Loop *L, ScalarEvolution &SE,
2450 UnrollingPreferences &UP,
2451 OptimizationRemarkEmitter *ORE) override {
2452 return Impl.getUnrollingPreferences(L, SE, UP, ORE);
2453 }
2454 void getPeelingPreferences(Loop *L, ScalarEvolution &SE,
2455 PeelingPreferences &PP) override {
2456 return Impl.getPeelingPreferences(L, SE, PP);
2457 }
2458 bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE,
2459 AssumptionCache &AC, TargetLibraryInfo *LibInfo,
2460 HardwareLoopInfo &HWLoopInfo) override {
2461 return Impl.isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);
2462 }
2463 unsigned getEpilogueVectorizationMinVF() override {
2464 return Impl.getEpilogueVectorizationMinVF();
2465 }
2466 bool preferPredicateOverEpilogue(TailFoldingInfo *TFI) override {
2467 return Impl.preferPredicateOverEpilogue(TFI);
2468 }
2470 getPreferredTailFoldingStyle(bool IVUpdateMayOverflow = true) override {
2471 return Impl.getPreferredTailFoldingStyle(IVUpdateMayOverflow);
2472 }
2473 std::optional<Instruction *>
2474 instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) override {
2475 return Impl.instCombineIntrinsic(IC, II);
2476 }
2477 std::optional<Value *>
2478 simplifyDemandedUseBitsIntrinsic(InstCombiner &IC, IntrinsicInst &II,
2479 APInt DemandedMask, KnownBits &Known,
2480 bool &KnownBitsComputed) override {
2481 return Impl.simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known,
2482 KnownBitsComputed);
2483 }
2484 std::optional<Value *> simplifyDemandedVectorEltsIntrinsic(
2485 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
2486 APInt &UndefElts2, APInt &UndefElts3,
2487 std::function<void(Instruction *, unsigned, APInt, APInt &)>
2488 SimplifyAndSetOp) override {
2489 return Impl.simplifyDemandedVectorEltsIntrinsic(
2490 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
2491 SimplifyAndSetOp);
2492 }
2493 bool isLegalAddImmediate(int64_t Imm) override {
2494 return Impl.isLegalAddImmediate(Imm);
2495 }
2496 bool isLegalAddScalableImmediate(int64_t Imm) override {
2497 return Impl.isLegalAddScalableImmediate(Imm);
2498 }
2499 bool isLegalICmpImmediate(int64_t Imm) override {
2500 return Impl.isLegalICmpImmediate(Imm);
2501 }
2502 bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
2503 bool HasBaseReg, int64_t Scale, unsigned AddrSpace,
2504 Instruction *I, int64_t ScalableOffset) override {
2505 return Impl.isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg, Scale,
2506 AddrSpace, I, ScalableOffset);
2507 }
2508 bool isLSRCostLess(const TargetTransformInfo::LSRCost &C1,
2509 const TargetTransformInfo::LSRCost &C2) override {
2510 return Impl.isLSRCostLess(C1, C2);
2511 }
2512 bool isNumRegsMajorCostOfLSR() override {
2513 return Impl.isNumRegsMajorCostOfLSR();
2514 }
2515 bool shouldDropLSRSolutionIfLessProfitable() const override {
2516 return Impl.shouldDropLSRSolutionIfLessProfitable();
2517 }
2518 bool isProfitableLSRChainElement(Instruction *I) override {
2519 return Impl.isProfitableLSRChainElement(I);
2520 }
2521 bool canMacroFuseCmp() override { return Impl.canMacroFuseCmp(); }
2522 bool canSaveCmp(Loop *L, BranchInst **BI, ScalarEvolution *SE, LoopInfo *LI,
2523 DominatorTree *DT, AssumptionCache *AC,
2524 TargetLibraryInfo *LibInfo) override {
2525 return Impl.canSaveCmp(L, BI, SE, LI, DT, AC, LibInfo);
2526 }
2528 getPreferredAddressingMode(const Loop *L,
2529 ScalarEvolution *SE) const override {
2530 return Impl.getPreferredAddressingMode(L, SE);
2531 }
2532 bool isLegalMaskedStore(Type *DataType, Align Alignment) override {
2533 return Impl.isLegalMaskedStore(DataType, Alignment);
2534 }
2535 bool isLegalMaskedLoad(Type *DataType, Align Alignment) override {
2536 return Impl.isLegalMaskedLoad(DataType, Alignment);
2537 }
2538 bool isLegalNTStore(Type *DataType, Align Alignment) override {
2539 return Impl.isLegalNTStore(DataType, Alignment);
2540 }
2541 bool isLegalNTLoad(Type *DataType, Align Alignment) override {
2542 return Impl.isLegalNTLoad(DataType, Alignment);
2543 }
2544 bool isLegalBroadcastLoad(Type *ElementTy,
2545 ElementCount NumElements) const override {
2546 return Impl.isLegalBroadcastLoad(ElementTy, NumElements);
2547 }
2548 bool isLegalMaskedScatter(Type *DataType, Align Alignment) override {
2549 return Impl.isLegalMaskedScatter(DataType, Alignment);
2550 }
2551 bool isLegalMaskedGather(Type *DataType, Align Alignment) override {
2552 return Impl.isLegalMaskedGather(DataType, Alignment);
2553 }
2554 bool forceScalarizeMaskedGather(VectorType *DataType,
2555 Align Alignment) override {
2556 return Impl.forceScalarizeMaskedGather(DataType, Alignment);
2557 }
2558 bool forceScalarizeMaskedScatter(VectorType *DataType,
2559 Align Alignment) override {
2560 return Impl.forceScalarizeMaskedScatter(DataType, Alignment);
2561 }
2562 bool isLegalMaskedCompressStore(Type *DataType, Align Alignment) override {
2563 return Impl.isLegalMaskedCompressStore(DataType, Alignment);
2564 }
2565 bool isLegalMaskedExpandLoad(Type *DataType, Align Alignment) override {
2566 return Impl.isLegalMaskedExpandLoad(DataType, Alignment);
2567 }
2568 bool isLegalStridedLoadStore(Type *DataType, Align Alignment) override {
2569 return Impl.isLegalStridedLoadStore(DataType, Alignment);
2570 }
2571 bool isLegalInterleavedAccessType(VectorType *VTy, unsigned Factor,
2572 Align Alignment,
2573 unsigned AddrSpace) override {
2574 return Impl.isLegalInterleavedAccessType(VTy, Factor, Alignment, AddrSpace);
2575 }
2576 bool isLegalMaskedVectorHistogram(Type *AddrType, Type *DataType) override {
2577 return Impl.isLegalMaskedVectorHistogram(AddrType, DataType);
2578 }
2579 bool isLegalAltInstr(VectorType *VecTy, unsigned Opcode0, unsigned Opcode1,
2580 const SmallBitVector &OpcodeMask) const override {
2581 return Impl.isLegalAltInstr(VecTy, Opcode0, Opcode1, OpcodeMask);
2582 }
2583 bool enableOrderedReductions() override {
2584 return Impl.enableOrderedReductions();
2585 }
2586 bool hasDivRemOp(Type *DataType, bool IsSigned) override {
2587 return Impl.hasDivRemOp(DataType, IsSigned);
2588 }
2589 bool hasVolatileVariant(Instruction *I, unsigned AddrSpace) override {
2590 return Impl.hasVolatileVariant(I, AddrSpace);
2591 }
2592 bool prefersVectorizedAddressing() override {
2593 return Impl.prefersVectorizedAddressing();
2594 }
2595 InstructionCost getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
2596 StackOffset BaseOffset, bool HasBaseReg,
2597 int64_t Scale,
2598 unsigned AddrSpace) override {
2599 return Impl.getScalingFactorCost(Ty, BaseGV, BaseOffset, HasBaseReg, Scale,
2600 AddrSpace);
2601 }
2602 bool LSRWithInstrQueries() override { return Impl.LSRWithInstrQueries(); }
2603 bool isTruncateFree(Type *Ty1, Type *Ty2) override {
2604 return Impl.isTruncateFree(Ty1, Ty2);
2605 }
2606 bool isProfitableToHoist(Instruction *I) override {
2607 return Impl.isProfitableToHoist(I);
2608 }
2609 bool useAA() override { return Impl.useAA(); }
2610 bool isTypeLegal(Type *Ty) override { return Impl.isTypeLegal(Ty); }
2611 unsigned getRegUsageForType(Type *Ty) override {
2612 return Impl.getRegUsageForType(Ty);
2613 }
2614 bool shouldBuildLookupTables() override {
2615 return Impl.shouldBuildLookupTables();
2616 }
2617 bool shouldBuildLookupTablesForConstant(Constant *C) override {
2618 return Impl.shouldBuildLookupTablesForConstant(C);
2619 }
2620 bool shouldBuildRelLookupTables() override {
2621 return Impl.shouldBuildRelLookupTables();
2622 }
2623 bool useColdCCForColdCall(Function &F) override {
2624 return Impl.useColdCCForColdCall(F);
2625 }
2626 bool isTargetIntrinsicTriviallyScalarizable(Intrinsic::ID ID) override {
2627 return Impl.isTargetIntrinsicTriviallyScalarizable(ID);
2628 }
2629
2630 bool isTargetIntrinsicWithScalarOpAtArg(Intrinsic::ID ID,
2631 unsigned ScalarOpdIdx) override {
2632 return Impl.isTargetIntrinsicWithScalarOpAtArg(ID, ScalarOpdIdx);
2633 }
2634
2635 bool isTargetIntrinsicWithOverloadTypeAtArg(Intrinsic::ID ID,
2636 int OpdIdx) override {
2637 return Impl.isTargetIntrinsicWithOverloadTypeAtArg(ID, OpdIdx);
2638 }
2639
2640 bool isTargetIntrinsicWithStructReturnOverloadAtField(Intrinsic::ID ID,
2641 int RetIdx) override {
2642 return Impl.isTargetIntrinsicWithStructReturnOverloadAtField(ID, RetIdx);
2643 }
2644
2645 InstructionCost getScalarizationOverhead(VectorType *Ty,
2646 const APInt &DemandedElts,
2647 bool Insert, bool Extract,
2649 ArrayRef<Value *> VL = {}) override {
2650 return Impl.getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
2652 }
2653 InstructionCost
2654 getOperandsScalarizationOverhead(ArrayRef<const Value *> Args,
2655 ArrayRef<Type *> Tys,
2657 return Impl.getOperandsScalarizationOverhead(Args, Tys, CostKind);
2658 }
2659
2660 bool supportsEfficientVectorElementLoadStore() override {
2661 return Impl.supportsEfficientVectorElementLoadStore();
2662 }
2663
2664 bool supportsTailCalls() override { return Impl.supportsTailCalls(); }
2665 bool supportsTailCallFor(const CallBase *CB) override {
2666 return Impl.supportsTailCallFor(CB);
2667 }
2668
2669 bool enableAggressiveInterleaving(bool LoopHasReductions) override {
2670 return Impl.enableAggressiveInterleaving(LoopHasReductions);
2671 }
2672 MemCmpExpansionOptions enableMemCmpExpansion(bool OptSize,
2673 bool IsZeroCmp) const override {
2674 return Impl.enableMemCmpExpansion(OptSize, IsZeroCmp);
2675 }
2676 bool enableSelectOptimize() override {
2677 return Impl.enableSelectOptimize();
2678 }
2679 bool shouldTreatInstructionLikeSelect(const Instruction *I) override {
2680 return Impl.shouldTreatInstructionLikeSelect(I);
2681 }
2682 bool enableInterleavedAccessVectorization() override {
2683 return Impl.enableInterleavedAccessVectorization();
2684 }
2685 bool enableMaskedInterleavedAccessVectorization() override {
2686 return Impl.enableMaskedInterleavedAccessVectorization();
2687 }
2688 bool isFPVectorizationPotentiallyUnsafe() override {
2689 return Impl.isFPVectorizationPotentiallyUnsafe();
2690 }
2691 bool allowsMisalignedMemoryAccesses(LLVMContext &Context, unsigned BitWidth,
2693 unsigned *Fast) override {
2695 Alignment, Fast);
2696 }
2697 PopcntSupportKind getPopcntSupport(unsigned IntTyWidthInBit) override {
2698 return Impl.getPopcntSupport(IntTyWidthInBit);
2699 }
2700 bool haveFastSqrt(Type *Ty) override { return Impl.haveFastSqrt(Ty); }
2701
2702 bool isExpensiveToSpeculativelyExecute(const Instruction* I) override {
2703 return Impl.isExpensiveToSpeculativelyExecute(I);
2704 }
2705
2706 bool isFCmpOrdCheaperThanFCmpZero(Type *Ty) override {
2707 return Impl.isFCmpOrdCheaperThanFCmpZero(Ty);
2708 }
2709
2710 InstructionCost getFPOpCost(Type *Ty) override {
2711 return Impl.getFPOpCost(Ty);
2712 }
2713
2714 InstructionCost getIntImmCodeSizeCost(unsigned Opc, unsigned Idx,
2715 const APInt &Imm, Type *Ty) override {
2716 return Impl.getIntImmCodeSizeCost(Opc, Idx, Imm, Ty);
2717 }
2718 InstructionCost getIntImmCost(const APInt &Imm, Type *Ty,
2720 return Impl.getIntImmCost(Imm, Ty, CostKind);
2721 }
2722 InstructionCost getIntImmCostInst(unsigned Opc, unsigned Idx,
2723 const APInt &Imm, Type *Ty,
2725 Instruction *Inst = nullptr) override {
2726 return Impl.getIntImmCostInst(Opc, Idx, Imm, Ty, CostKind, Inst);
2727 }
2728 InstructionCost getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx,
2729 const APInt &Imm, Type *Ty,
2731 return Impl.getIntImmCostIntrin(IID, Idx, Imm, Ty, CostKind);
2732 }
2733 bool preferToKeepConstantsAttached(const Instruction &Inst,
2734 const Function &Fn) const override {
2735 return Impl.preferToKeepConstantsAttached(Inst, Fn);
2736 }
2737 unsigned getNumberOfRegisters(unsigned ClassID) const override {
2738 return Impl.getNumberOfRegisters(ClassID);
2739 }
2740 bool hasConditionalLoadStoreForType(Type *Ty = nullptr) const override {
2741 return Impl.hasConditionalLoadStoreForType(Ty);
2742 }
2743 unsigned getRegisterClassForType(bool Vector,
2744 Type *Ty = nullptr) const override {
2745 return Impl.getRegisterClassForType(Vector, Ty);
2746 }
2747 const char *getRegisterClassName(unsigned ClassID) const override {
2748 return Impl.getRegisterClassName(ClassID);
2749 }
2750 TypeSize getRegisterBitWidth(RegisterKind K) const override {
2751 return Impl.getRegisterBitWidth(K);
2752 }
2753 unsigned getMinVectorRegisterBitWidth() const override {
2754 return Impl.getMinVectorRegisterBitWidth();
2755 }
2756 std::optional getMaxVScale() const override {
2757 return Impl.getMaxVScale();
2758 }
2759 std::optional getVScaleForTuning() const override {
2760 return Impl.getVScaleForTuning();
2761 }
2762 bool isVScaleKnownToBeAPowerOfTwo() const override {
2763 return Impl.isVScaleKnownToBeAPowerOfTwo();
2764 }
2765 bool shouldMaximizeVectorBandwidth(
2767 return Impl.shouldMaximizeVectorBandwidth(K);
2768 }
2769 ElementCount getMinimumVF(unsigned ElemWidth,
2770 bool IsScalable) const override {
2771 return Impl.getMinimumVF(ElemWidth, IsScalable);
2772 }
2773 unsigned getMaximumVF(unsigned ElemWidth, unsigned Opcode) const override {
2774 return Impl.getMaximumVF(ElemWidth, Opcode);
2775 }
2776 unsigned getStoreMinimumVF(unsigned VF, Type *ScalarMemTy,
2777 Type *ScalarValTy) const override {
2778 return Impl.getStoreMinimumVF(VF, ScalarMemTy, ScalarValTy);
2779 }
2780 bool shouldConsiderAddressTypePromotion(
2781 const Instruction &I, bool &AllowPromotionWithoutCommonHeader) override {
2782 return Impl.shouldConsiderAddressTypePromotion(
2783 I, AllowPromotionWithoutCommonHeader);
2784 }
2785 unsigned getCacheLineSize() const override { return Impl.getCacheLineSize(); }
2786 std::optional getCacheSize(CacheLevel Level) const override {
2787 return Impl.getCacheSize(Level);
2788 }
2789 std::optional
2790 getCacheAssociativity(CacheLevel Level) const override {
2791 return Impl.getCacheAssociativity(Level);
2792 }
2793
2794 std::optional getMinPageSize() const override {
2795 return Impl.getMinPageSize();
2796 }
2797
2798
2799
2800 unsigned getPrefetchDistance() const override {
2801 return Impl.getPrefetchDistance();
2802 }
2803
2804
2805
2806
2807 unsigned getMinPrefetchStride(unsigned NumMemAccesses,
2808 unsigned NumStridedMemAccesses,
2809 unsigned NumPrefetches,
2810 bool HasCall) const override {
2811 return Impl.getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses,
2812 NumPrefetches, HasCall);
2813 }
2814
2815
2816
2817
2818 unsigned getMaxPrefetchIterationsAhead() const override {
2819 return Impl.getMaxPrefetchIterationsAhead();
2820 }
2821
2822
2823 bool enableWritePrefetching() const override {
2824 return Impl.enableWritePrefetching();
2825 }
2826
2827
2828 bool shouldPrefetchAddressSpace(unsigned AS) const override {
2829 return Impl.shouldPrefetchAddressSpace(AS);
2830 }
2831
2832 InstructionCost getPartialReductionCost(
2833 unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType,
2836 std::optional BinOp = std::nullopt) const override {
2837 return Impl.getPartialReductionCost(Opcode, InputTypeA, InputTypeB,
2838 AccumType, VF, OpAExtend, OpBExtend,
2839 BinOp);
2840 }
2841
2842 unsigned getMaxInterleaveFactor(ElementCount VF) override {
2843 return Impl.getMaxInterleaveFactor(VF);
2844 }
2845 unsigned getEstimatedNumberOfCaseClusters(const SwitchInst &SI,
2846 unsigned &JTSize,
2847 ProfileSummaryInfo *PSI,
2848 BlockFrequencyInfo *BFI) override {
2849 return Impl.getEstimatedNumberOfCaseClusters(SI, JTSize, PSI, BFI);
2850 }
2851 InstructionCost getArithmeticInstrCost(
2853 OperandValueInfo Opd1Info, OperandValueInfo Opd2Info,
2854 ArrayRef<const Value *> Args,
2855 const Instruction *CxtI = nullptr) override {
2856 return Impl.getArithmeticInstrCost(Opcode, Ty, CostKind, Opd1Info, Opd2Info,
2857 Args, CxtI);
2858 }
2859 InstructionCost getAltInstrCost(VectorType *VecTy, unsigned Opcode0,
2860 unsigned Opcode1,
2861 const SmallBitVector &OpcodeMask,
2863 return Impl.getAltInstrCost(VecTy, Opcode0, Opcode1, OpcodeMask, CostKind);
2864 }
2865
2867 ArrayRef Mask,
2870 ArrayRef<const Value *> Args,
2871 const Instruction *CxtI) override {
2872 return Impl.getShuffleCost(Kind, Tp, Mask, CostKind, Index, SubTp, Args,
2873 CxtI);
2874 }
2875 InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
2878 const Instruction *I) override {
2879 return Impl.getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I);
2880 }
2881 InstructionCost getExtractWithExtendCost(unsigned Opcode, Type *Dst,
2883 unsigned Index) override {
2884 return Impl.getExtractWithExtendCost(Opcode, Dst, VecTy, Index);
2885 }
2887 const Instruction *I = nullptr) override {
2888 return Impl.getCFInstrCost(Opcode, CostKind, I);
2889 }
2890 InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy,
2893 OperandValueInfo Op1Info,
2894 OperandValueInfo Op2Info,
2895 const Instruction *I) override {
2896 return Impl.getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred, CostKind,
2897 Op1Info, Op2Info, I);
2898 }
2899 InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val,
2901 unsigned Index, Value *Op0,
2902 Value *Op1) override {
2903 return Impl.getVectorInstrCost(Opcode, Val, CostKind, Index, Op0, Op1);
2904 }
2905 InstructionCost getVectorInstrCost(
2907 Value *Scalar,
2908 ArrayRef<std::tuple<Value *, User *, int>> ScalarUserAndIdx) override {
2909 return Impl.getVectorInstrCost(Opcode, Val, CostKind, Index, Scalar,
2910 ScalarUserAndIdx);
2911 }
2912 InstructionCost getVectorInstrCost(const Instruction &I, Type *Val,
2914 unsigned Index) override {
2915 return Impl.getVectorInstrCost(I, Val, CostKind, Index);
2916 }
2917 InstructionCost
2918 getReplicationShuffleCost(Type *EltTy, int ReplicationFactor, int VF,
2919 const APInt &DemandedDstElts,
2921 return Impl.getReplicationShuffleCost(EltTy, ReplicationFactor, VF,
2923 }
2924 InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment,
2927 OperandValueInfo OpInfo,
2928 const Instruction *I) override {
2930 OpInfo, I);
2931 }
2932 InstructionCost getVPMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment,
2935 const Instruction *I) override {
2936 return Impl.getVPMemoryOpCost(Opcode, Src, Alignment, AddressSpace,
2938 }
2939 InstructionCost getMaskedMemoryOpCost(unsigned Opcode, Type *Src,
2942 return Impl.getMaskedMemoryOpCost(Opcode, Src, Alignment, AddressSpace,
2944 }
2945 InstructionCost
2946 getGatherScatterOpCost(unsigned Opcode, Type *DataTy, const Value *Ptr,
2947 bool VariableMask, Align Alignment,
2949 const Instruction *I = nullptr) override {
2950 return Impl.getGatherScatterOpCost(Opcode, DataTy, Ptr, VariableMask,
2952 }
2953 InstructionCost
2954 getStridedMemoryOpCost(unsigned Opcode, Type *DataTy, const Value *Ptr,
2955 bool VariableMask, Align Alignment,
2957 const Instruction *I = nullptr) override {
2958 return Impl.getStridedMemoryOpCost(Opcode, DataTy, Ptr, VariableMask,
2960 }
2961 InstructionCost getInterleavedMemoryOpCost(
2962 unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef Indices,
2964 bool UseMaskForCond, bool UseMaskForGaps) override {
2965 return Impl.getInterleavedMemoryOpCost(Opcode, VecTy, Factor, Indices,
2967 UseMaskForCond, UseMaskForGaps);
2968 }
2969 InstructionCost
2970 getArithmeticReductionCost(unsigned Opcode, VectorType *Ty,
2971 std::optional FMF,
2973 return Impl.getArithmeticReductionCost(Opcode, Ty, FMF, CostKind);
2974 }
2975 InstructionCost
2978 return Impl.getMinMaxReductionCost(IID, Ty, FMF, CostKind);
2979 }
2980 InstructionCost
2981 getExtendedReductionCost(unsigned Opcode, bool IsUnsigned, Type *ResTy,
2984 return Impl.getExtendedReductionCost(Opcode, IsUnsigned, ResTy, Ty, FMF,
2986 }
2987 InstructionCost
2988 getMulAccReductionCost(bool IsUnsigned, Type *ResTy, VectorType *Ty,
2990 return Impl.getMulAccReductionCost(IsUnsigned, ResTy, Ty, CostKind);
2991 }
2992 InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
2994 return Impl.getIntrinsicInstrCost(ICA, CostKind);
2995 }
2996 InstructionCost getCallInstrCost(Function *F, Type *RetTy,
2997 ArrayRef<Type *> Tys,
2999 return Impl.getCallInstrCost(F, RetTy, Tys, CostKind);
3000 }
3001 unsigned getNumberOfParts(Type *Tp) override {
3002 return Impl.getNumberOfParts(Tp);
3003 }
3004 InstructionCost getAddressComputationCost(Type *Ty, ScalarEvolution *SE,
3005 const SCEV *Ptr) override {
3006 return Impl.getAddressComputationCost(Ty, SE, Ptr);
3007 }
3008 InstructionCost getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys) override {
3009 return Impl.getCostOfKeepingLiveOverCall(Tys);
3010 }
3011 bool getTgtMemIntrinsic(IntrinsicInst *Inst,
3012 MemIntrinsicInfo &Info) override {
3013 return Impl.getTgtMemIntrinsic(Inst, Info);
3014 }
3015 unsigned getAtomicMemIntrinsicMaxElementSize() const override {
3016 return Impl.getAtomicMemIntrinsicMaxElementSize();
3017 }
3018 Value *getOrCreateResultFromMemIntrinsic(IntrinsicInst *Inst,
3019 Type *ExpectedType) override {
3020 return Impl.getOrCreateResultFromMemIntrinsic(Inst, ExpectedType);
3021 }
3022 Type *getMemcpyLoopLoweringType(
3023 LLVMContext &Context, Value *Length, unsigned SrcAddrSpace,
3024 unsigned DestAddrSpace, Align SrcAlign, Align DestAlign,
3025 std::optional<uint32_t> AtomicElementSize) const override {
3026 return Impl.getMemcpyLoopLoweringType(Context, Length, SrcAddrSpace,
3027 DestAddrSpace, SrcAlign, DestAlign,
3028 AtomicElementSize);
3029 }
3030 void getMemcpyLoopResidualLoweringType(
3031 SmallVectorImpl<Type *> &OpsOut, LLVMContext &Context,
3032 unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace,
3033 Align SrcAlign, Align DestAlign,
3034 std::optional<uint32_t> AtomicCpySize) const override {
3035 Impl.getMemcpyLoopResidualLoweringType(OpsOut, Context, RemainingBytes,
3036 SrcAddrSpace, DestAddrSpace,
3037 SrcAlign, DestAlign, AtomicCpySize);
3038 }
3040 const Function *Callee) const override {
3041 return Impl.areInlineCompatible(Caller, Callee);
3042 }
3043 unsigned getInlineCallPenalty(const Function *F, const CallBase &Call,
3044 unsigned DefaultCallPenalty) const override {
3045 return Impl.getInlineCallPenalty(F, Call, DefaultCallPenalty);
3046 }
3047 bool areTypesABICompatible(const Function *Caller, const Function *Callee,
3048 const ArrayRef<Type *> &Types) const override {
3049 return Impl.areTypesABICompatible(Caller, Callee, Types);
3050 }
3051 bool isIndexedLoadLegal(MemIndexedMode Mode, Type *Ty) const override {
3052 return Impl.isIndexedLoadLegal(Mode, Ty, getDataLayout());
3053 }
3054 bool isIndexedStoreLegal(MemIndexedMode Mode, Type *Ty) const override {
3055 return Impl.isIndexedStoreLegal(Mode, Ty, getDataLayout());
3056 }
3057 unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) const override {
3058 return Impl.getLoadStoreVecRegBitWidth(AddrSpace);
3059 }
3060 bool isLegalToVectorizeLoad(LoadInst *LI) const override {
3061 return Impl.isLegalToVectorizeLoad(LI);
3062 }
3063 bool isLegalToVectorizeStore(StoreInst *SI) const override {
3064 return Impl.isLegalToVectorizeStore(SI);
3065 }
3066 bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes, Align Alignment,
3067 unsigned AddrSpace) const override {
3068 return Impl.isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment,
3069 AddrSpace);
3070 }
3071 bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes, Align Alignment,
3072 unsigned AddrSpace) const override {
3073 return Impl.isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment,
3074 AddrSpace);
3075 }
3076 bool isLegalToVectorizeReduction(const RecurrenceDescriptor &RdxDesc,
3077 ElementCount VF) const override {
3078 return Impl.isLegalToVectorizeReduction(RdxDesc, VF);
3079 }
3080 bool isElementTypeLegalForScalableVector(Type *Ty) const override {
3081 return Impl.isElementTypeLegalForScalableVector(Ty);
3082 }
3083 unsigned getLoadVectorFactor(unsigned VF, unsigned LoadSize,
3084 unsigned ChainSizeInBytes,
3086 return Impl.getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy);
3087 }
3088 unsigned getStoreVectorFactor(unsigned VF, unsigned StoreSize,
3089 unsigned ChainSizeInBytes,
3091 return Impl.getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy);
3092 }
3093 bool preferFixedOverScalableIfEqualCost() const override {
3094 return Impl.preferFixedOverScalableIfEqualCost();
3095 }
3096 bool preferInLoopReduction(unsigned Opcode, Type *Ty,
3097 ReductionFlags Flags) const override {
3098 return Impl.preferInLoopReduction(Opcode, Ty, Flags);
3099 }
3100 bool preferPredicatedReductionSelect(unsigned Opcode, Type *Ty,
3101 ReductionFlags Flags) const override {
3102 return Impl.preferPredicatedReductionSelect(Opcode, Ty, Flags);
3103 }
3104 bool preferEpilogueVectorization() const override {
3105 return Impl.preferEpilogueVectorization();
3106 }
3107
3108 bool shouldExpandReduction(const IntrinsicInst *II) const override {
3109 return Impl.shouldExpandReduction(II);
3110 }
3111
3113 getPreferredExpandedReductionShuffle(const IntrinsicInst *II) const override {
3114 return Impl.getPreferredExpandedReductionShuffle(II);
3115 }
3116
3117 unsigned getGISelRematGlobalCost() const override {
3118 return Impl.getGISelRematGlobalCost();
3119 }
3120
3121 unsigned getMinTripCountTailFoldingThreshold() const override {
3122 return Impl.getMinTripCountTailFoldingThreshold();
3123 }
3124
3125 bool supportsScalableVectors() const override {
3126 return Impl.supportsScalableVectors();
3127 }
3128
3129 bool enableScalableVectorization() const override {
3130 return Impl.enableScalableVectorization();
3131 }
3132
3133 bool hasActiveVectorLength(unsigned Opcode, Type *DataType,
3134 Align Alignment) const override {
3135 return Impl.hasActiveVectorLength(Opcode, DataType, Alignment);
3136 }
3137
3138 bool isProfitableToSinkOperands(Instruction *I,
3139 SmallVectorImpl<Use *> &Ops) const override {
3140 return Impl.isProfitableToSinkOperands(I, Ops);
3141 };
3142
3143 bool isVectorShiftByScalarCheap(Type *Ty) const override {
3144 return Impl.isVectorShiftByScalarCheap(Ty);
3145 }
3146
3148 getVPLegalizationStrategy(const VPIntrinsic &PI) const override {
3149 return Impl.getVPLegalizationStrategy(PI);
3150 }
3151
3152 bool hasArmWideBranch(bool Thumb) const override {
3153 return Impl.hasArmWideBranch(Thumb);
3154 }
3155
3156 uint64_t getFeatureMask(const Function &F) const override {
3157 return Impl.getFeatureMask(F);
3158 }
3159
3160 bool isMultiversionedFunction(const Function &F) const override {
3161 return Impl.isMultiversionedFunction(F);
3162 }
3163
3164 unsigned getMaxNumArgs() const override {
3165 return Impl.getMaxNumArgs();
3166 }
3167
3168 unsigned getNumBytesToPadGlobalArray(unsigned Size,
3169 Type *ArrayType) const override {
3170 return Impl.getNumBytesToPadGlobalArray(Size, ArrayType);
3171 }
3172};
3173
3174template
3176 : TTIImpl(new Model<T>(Impl)) {}
3177
3178
3179
3180
3181
3182
3183
3184
3185
3186
3187
3188
3190public:
3192
3193
3194
3195
3196
3198
3199
3200
3201
3202
3204
3205
3207 : TTICallback(Arg.TTICallback) {}
3209 : TTICallback(std::move(Arg.TTICallback)) {}
3211 TTICallback = RHS.TTICallback;
3212 return *this;
3213 }
3215 TTICallback = std::move(RHS.TTICallback);
3216 return *this;
3217 }
3218
3220
3221private:
3224
3225
3226
3227
3228
3229
3230
3231
3232
3233
3234
3235 std::function<Result(const Function &)> TTICallback;
3236
3237
3239};
3240
3241
3242
3243
3244
3247 std::optional TTI;
3248
3249 virtual void anchor();
3250
3251public:
3253
3254
3255
3256
3257
3259
3261
3263};
3264
3265
3266
3267
3268
3270
3271}
3272
3273#endif
AMDGPU Lower Kernel Arguments
This file implements a class to represent arbitrary precision integral constant values and operations...
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Atomic ordering constants.
Analysis containing CSE Info
static cl::opt< TargetTransformInfo::TargetCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(TargetTransformInfo::TCK_RecipThroughput), cl::values(clEnumValN(TargetTransformInfo::TCK_RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(TargetTransformInfo::TCK_Latency, "latency", "Instruction latency"), clEnumValN(TargetTransformInfo::TCK_CodeSize, "code-size", "Code size"), clEnumValN(TargetTransformInfo::TCK_SizeAndLatency, "size-latency", "Code size and latency")))
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
static cl::opt< bool > ForceNestedLoop("force-nested-hardware-loop", cl::Hidden, cl::init(false), cl::desc("Force allowance of nested hardware loops"))
static cl::opt< bool > ForceHardwareLoopPHI("force-hardware-loop-phi", cl::Hidden, cl::init(false), cl::desc("Force hardware loop counter to be updated through a phi"))
This header defines various interfaces for pass management in LLVM.
This file defines an InstructionCost class that is used when calculating the cost of an instruction,...
std::optional< unsigned > getMaxVScale(const Function &F, const TargetTransformInfo &TTI)
mir Rename Register Operands
uint64_t IntrinsicInst * II
static cl::opt< RegAllocEvictionAdvisorAnalysis::AdvisorMode > Mode("regalloc-enable-advisor", cl::Hidden, cl::init(RegAllocEvictionAdvisorAnalysis::AdvisorMode::Default), cl::desc("Enable regalloc advisor mode"), cl::values(clEnumValN(RegAllocEvictionAdvisorAnalysis::AdvisorMode::Default, "default", "Default"), clEnumValN(RegAllocEvictionAdvisorAnalysis::AdvisorMode::Release, "release", "precompiled"), clEnumValN(RegAllocEvictionAdvisorAnalysis::AdvisorMode::Development, "development", "for training")))
Class for arbitrary precision integers.
an instruction to allocate memory on the stack
API to communicate dependencies between analyses during invalidation.
A container for analyses that lazily runs them and caches their results.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Class to represent array types.
A cache of @llvm.assume calls within a function.
LLVM Basic Block Representation.
BlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate IR basic block frequen...
Conditional or Unconditional Branch instruction.
Base class for all callable instructions (InvokeInst and CallInst) Holds everything related to callin...
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
This is an important base class in LLVM.
A parsed version of the target data layout string in and methods for querying it.
Concrete subclass of DominatorTreeBase that is used to compute a normal dominator tree.
Convenience struct for specifying and reasoning about fast-math flags.
ImmutablePass class - This class is used to provide information that does not need to be run.
The core instruction combiner logic.
static InstructionCost getInvalid(CostType Val=0)
Class to represent integer types.
Drive the analysis of interleaved memory accesses in the loop.
FastMathFlags getFlags() const
const SmallVectorImpl< Type * > & getArgTypes() const
Type * getReturnType() const
bool skipScalarizationCost() const
const SmallVectorImpl< const Value * > & getArgs() const
InstructionCost getScalarizationCost() const
const IntrinsicInst * getInst() const
Intrinsic::ID getID() const
bool isTypeBasedOnly() const
A wrapper class for inspecting calls to intrinsic functions.
This is an important class for using LLVM in a threaded context.
An instruction for reading from memory.
LoopVectorizationLegality checks if it is legal to vectorize a loop, and to what vectorization factor...
Represents a single loop in the control flow graph.
A set of analyses that are preserved following a run of a transformation pass.
Analysis providing profile information.
The RecurrenceDescriptor is used to identify recurrences variables in a loop.
This class represents an analyzed expression in the program.
The main scalar evolution driver.
This is a 'bitvector' (really, a variable-sized bit array), optimized for the case when the array is ...
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
StackOffset holds a fixed and a scalable offset in bytes.
An instruction for storing to memory.
Analysis pass providing the TargetTransformInfo.
TargetIRAnalysis(const TargetIRAnalysis &Arg)
TargetIRAnalysis & operator=(const TargetIRAnalysis &RHS)
Result run(const Function &F, FunctionAnalysisManager &)
TargetTransformInfo Result
TargetIRAnalysis()
Default construct a target IR analysis.
TargetIRAnalysis & operator=(TargetIRAnalysis &&RHS)
TargetIRAnalysis(TargetIRAnalysis &&Arg)
Provides information about what library functions are available for the current target.
Wrapper pass for TargetTransformInfo.
TargetTransformInfoWrapperPass()
We must provide a default constructor for the pass but it should never be used.
TargetTransformInfo & getTTI(const Function &F)
virtual bool preferFixedOverScalableIfEqualCost() const =0
virtual std::optional< Value * > simplifyDemandedUseBitsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, bool &KnownBitsComputed)=0
virtual InstructionCost getAddressComputationCost(Type *Ty, ScalarEvolution *SE, const SCEV *Ptr)=0
virtual TypeSize getRegisterBitWidth(RegisterKind K) const =0
virtual const DataLayout & getDataLayout() const =0
virtual InstructionCost getBranchMispredictPenalty()=0
virtual bool isProfitableLSRChainElement(Instruction *I)=0
virtual InstructionCost getGatherScatterOpCost(unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, Align Alignment, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)=0
virtual InstructionCost getIntImmCostInst(unsigned Opc, unsigned Idx, const APInt &Imm, Type *Ty, TargetCostKind CostKind, Instruction *Inst=nullptr)=0
virtual InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind)=0
virtual uint64_t getFeatureMask(const Function &F) const =0
virtual void getUnrollingPreferences(Loop *L, ScalarEvolution &, UnrollingPreferences &UP, OptimizationRemarkEmitter *ORE)=0
virtual bool isLegalNTStore(Type *DataType, Align Alignment)=0
virtual unsigned adjustInliningThreshold(const CallBase *CB)=0
virtual InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, OperandValueInfo Op1Info, OperandValueInfo Op2Info, const Instruction *I)=0
virtual bool isExpensiveToSpeculativelyExecute(const Instruction *I)=0
virtual bool shouldMaximizeVectorBandwidth(TargetTransformInfo::RegisterKind K) const =0
virtual bool isLegalInterleavedAccessType(VectorType *VTy, unsigned Factor, Align Alignment, unsigned AddrSpace)=0
virtual std::optional< Instruction * > instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II)=0
virtual bool preferPredicatedReductionSelect(unsigned Opcode, Type *Ty, ReductionFlags) const =0
virtual VPLegalization getVPLegalizationStrategy(const VPIntrinsic &PI) const =0
virtual bool isLegalNTLoad(Type *DataType, Align Alignment)=0
virtual bool enableOrderedReductions()=0
virtual PopcntSupportKind getPopcntSupport(unsigned IntTyWidthInBit)=0
virtual unsigned getNumberOfRegisters(unsigned ClassID) const =0
virtual std::pair< const Value *, unsigned > getPredicatedAddrSpace(const Value *V) const =0
virtual bool isLegalMaskedGather(Type *DataType, Align Alignment)=0
virtual bool areTypesABICompatible(const Function *Caller, const Function *Callee, const ArrayRef< Type * > &Types) const =0
virtual bool supportsTailCalls()=0
virtual InstructionCost getIntImmCost(const APInt &Imm, Type *Ty, TargetCostKind CostKind)=0
virtual bool shouldPrefetchAddressSpace(unsigned AS) const =0
virtual bool isFCmpOrdCheaperThanFCmpZero(Type *Ty)=0
virtual unsigned getMinVectorRegisterBitWidth() const =0
virtual InstructionCost getAltInstrCost(VectorType *VecTy, unsigned Opcode0, unsigned Opcode1, const SmallBitVector &OpcodeMask, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput) const =0
virtual std::optional< unsigned > getVScaleForTuning() const =0
virtual InstructionCost getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, const APInt &Imm, Type *Ty, TargetCostKind CostKind)=0
virtual InstructionCost getMinMaxReductionCost(Intrinsic::ID IID, VectorType *Ty, FastMathFlags FMF, TTI::TargetCostKind CostKind)=0
virtual bool supportsEfficientVectorElementLoadStore()=0
virtual unsigned getRegUsageForType(Type *Ty)=0
virtual bool hasArmWideBranch(bool Thumb) const =0
virtual MemCmpExpansionOptions enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const =0
virtual InstructionCost getMulAccReductionCost(bool IsUnsigned, Type *ResTy, VectorType *Ty, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput)=0
virtual InstructionCost getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, OperandValueInfo Opd1Info, OperandValueInfo Opd2Info, ArrayRef< const Value * > Args, const Instruction *CxtI=nullptr)=0
virtual unsigned getAssumedAddrSpace(const Value *V) const =0
virtual bool isTruncateFree(Type *Ty1, Type *Ty2)=0
virtual bool isTargetIntrinsicTriviallyScalarizable(Intrinsic::ID ID)=0
virtual bool collectFlatAddressOperands(SmallVectorImpl< int > &OpIndexes, Intrinsic::ID IID) const =0
virtual InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr, ArrayRef< const Value * > Operands, Type *AccessType, TTI::TargetCostKind CostKind)=0
virtual bool shouldBuildLookupTables()=0
virtual bool isLegalBroadcastLoad(Type *ElementTy, ElementCount NumElements) const =0
virtual bool isLegalToVectorizeStore(StoreInst *SI) const =0
virtual bool isLegalMaskedVectorHistogram(Type *AddrType, Type *DataType)=0
virtual bool isVectorShiftByScalarCheap(Type *Ty) const =0
virtual unsigned getGISelRematGlobalCost() const =0
virtual unsigned getCallerAllocaCost(const CallBase *CB, const AllocaInst *AI) const =0
virtual InstructionCost getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, StackOffset BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace)=0
virtual Type * getMemcpyLoopLoweringType(LLVMContext &Context, Value *Length, unsigned SrcAddrSpace, unsigned DestAddrSpace, Align SrcAlign, Align DestAlign, std::optional< uint32_t > AtomicElementSize) const =0
virtual bool forceScalarizeMaskedScatter(VectorType *DataType, Align Alignment)=0
virtual bool supportsTailCallFor(const CallBase *CB)=0
virtual std::optional< unsigned > getMaxVScale() const =0
virtual InstructionCost getInstructionCost(const User *U, ArrayRef< const Value * > Operands, TargetCostKind CostKind)=0
virtual bool isLegalToVectorizeReduction(const RecurrenceDescriptor &RdxDesc, ElementCount VF) const =0
virtual unsigned getMaxNumArgs() const =0
virtual bool shouldExpandReduction(const IntrinsicInst *II) const =0
virtual bool enableWritePrefetching() const =0
virtual bool useColdCCForColdCall(Function &F)=0
virtual unsigned getInlineCallPenalty(const Function *F, const CallBase &Call, unsigned DefaultCallPenalty) const =0
virtual bool preferInLoopReduction(unsigned Opcode, Type *Ty, ReductionFlags) const =0
virtual int getInlinerVectorBonusPercent() const =0
virtual unsigned getMaxPrefetchIterationsAhead() const =0
virtual bool isLegalMaskedScatter(Type *DataType, Align Alignment)=0
virtual bool isIndexedLoadLegal(MemIndexedMode Mode, Type *Ty) const =0
virtual unsigned getCacheLineSize() const =0
virtual bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const =0
virtual unsigned getStoreVectorFactor(unsigned VF, unsigned StoreSize, unsigned ChainSizeInBytes, VectorType *VecTy) const =0
virtual ReductionShuffle getPreferredExpandedReductionShuffle(const IntrinsicInst *II) const =0
virtual AddressingModeKind getPreferredAddressingMode(const Loop *L, ScalarEvolution *SE) const =0
virtual bool shouldBuildLookupTablesForConstant(Constant *C)=0
virtual bool preferPredicateOverEpilogue(TailFoldingInfo *TFI)=0
virtual bool isProfitableToHoist(Instruction *I)=0
virtual InstructionCost getScalarizationOverhead(VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract, TargetCostKind CostKind, ArrayRef< Value * > VL={})=0
virtual bool isLegalMaskedExpandLoad(Type *DataType, Align Alignment)=0
virtual InstructionCost getFPOpCost(Type *Ty)=0
virtual unsigned getMinTripCountTailFoldingThreshold() const =0
virtual bool enableMaskedInterleavedAccessVectorization()=0
virtual unsigned getRegisterClassForType(bool Vector, Type *Ty=nullptr) const =0
virtual bool isTypeLegal(Type *Ty)=0
virtual BranchProbability getPredictableBranchThreshold()=0
virtual bool enableScalableVectorization() const =0
virtual bool getTgtMemIntrinsic(IntrinsicInst *Inst, MemIntrinsicInfo &Info)=0
virtual bool isValidAddrSpaceCast(unsigned FromAS, unsigned ToAS) const =0
virtual const char * getRegisterClassName(unsigned ClassID) const =0
virtual unsigned getMaxInterleaveFactor(ElementCount VF)=0
virtual bool enableAggressiveInterleaving(bool LoopHasReductions)=0
virtual bool isLegalAltInstr(VectorType *VecTy, unsigned Opcode0, unsigned Opcode1, const SmallBitVector &OpcodeMask) const =0
virtual bool haveFastSqrt(Type *Ty)=0
virtual bool isLegalMaskedCompressStore(Type *DataType, Align Alignment)=0
virtual std::optional< unsigned > getCacheSize(CacheLevel Level) const =0
virtual InstructionCost getCallInstrCost(Function *F, Type *RetTy, ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind)=0
virtual InstructionCost getPointersChainCost(ArrayRef< const Value * > Ptrs, const Value *Base, const TTI::PointersChainInfo &Info, Type *AccessTy, TTI::TargetCostKind CostKind)=0
virtual void getPeelingPreferences(Loop *L, ScalarEvolution &SE, PeelingPreferences &PP)=0
virtual std::optional< unsigned > getCacheAssociativity(CacheLevel Level) const =0
virtual bool supportsScalableVectors() const =0
virtual void getMemcpyLoopResidualLoweringType(SmallVectorImpl< Type * > &OpsOut, LLVMContext &Context, unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace, Align SrcAlign, Align DestAlign, std::optional< uint32_t > AtomicCpySize) const =0
virtual bool isTargetIntrinsicWithScalarOpAtArg(Intrinsic::ID ID, unsigned ScalarOpdIdx)=0
virtual bool forceScalarizeMaskedGather(VectorType *DataType, Align Alignment)=0
virtual unsigned getNumberOfParts(Type *Tp)=0
virtual bool isLegalICmpImmediate(int64_t Imm)=0
virtual unsigned getEstimatedNumberOfCaseClusters(const SwitchInst &SI, unsigned &JTSize, ProfileSummaryInfo *PSI, BlockFrequencyInfo *BFI)=0
virtual InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)=0
virtual bool isElementTypeLegalForScalableVector(Type *Ty) const =0
virtual TailFoldingStyle getPreferredTailFoldingStyle(bool IVUpdateMayOverflow=true)=0
virtual bool hasDivRemOp(Type *DataType, bool IsSigned)=0
virtual unsigned getMinPrefetchStride(unsigned NumMemAccesses, unsigned NumStridedMemAccesses, unsigned NumPrefetches, bool HasCall) const =0
virtual bool shouldBuildRelLookupTables()=0
virtual InstructionCost getOperandsScalarizationOverhead(ArrayRef< const Value * > Args, ArrayRef< Type * > Tys, TargetCostKind CostKind)=0
virtual bool isLoweredToCall(const Function *F)=0
virtual bool isSourceOfDivergence(const Value *V)=0
virtual bool isLegalAddScalableImmediate(int64_t Imm)=0
virtual bool canHaveNonUndefGlobalInitializerInAddressSpace(unsigned AS) const =0
virtual unsigned getInliningCostBenefitAnalysisSavingsMultiplier() const =0
virtual bool isLegalMaskedLoad(Type *DataType, Align Alignment)=0
virtual unsigned getNumBytesToPadGlobalArray(unsigned Size, Type *ArrayType) const =0
virtual InstructionCost getExtendedReductionCost(unsigned Opcode, bool IsUnsigned, Type *ResTy, VectorType *Ty, FastMathFlags FMF, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput)=0
virtual bool isFPVectorizationPotentiallyUnsafe()=0
virtual Value * getOrCreateResultFromMemIntrinsic(IntrinsicInst *Inst, Type *ExpectedType)=0
virtual unsigned getLoadVectorFactor(unsigned VF, unsigned LoadSize, unsigned ChainSizeInBytes, VectorType *VecTy) const =0
virtual InstructionCost getIntImmCodeSizeCost(unsigned Opc, unsigned Idx, const APInt &Imm, Type *Ty)=0
virtual bool hasConditionalLoadStoreForType(Type *Ty=nullptr) const =0
virtual InstructionCost getPartialReductionCost(unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType, ElementCount VF, PartialReductionExtendKind OpAExtend, PartialReductionExtendKind OpBExtend, std::optional< unsigned > BinOp) const =0
virtual InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I)=0
virtual bool isProfitableToSinkOperands(Instruction *I, SmallVectorImpl< Use * > &OpsToSink) const =0
virtual bool hasBranchDivergence(const Function *F=nullptr)=0
virtual InstructionCost getArithmeticReductionCost(unsigned Opcode, VectorType *Ty, std::optional< FastMathFlags > FMF, TTI::TargetCostKind CostKind)=0
virtual bool isMultiversionedFunction(const Function &F) const =0
virtual unsigned getInliningThresholdMultiplier() const =0
virtual InstructionCost getReplicationShuffleCost(Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts, TTI::TargetCostKind CostKind)=0
virtual bool isLegalMaskedStore(Type *DataType, Align Alignment)=0
virtual InstructionCost getVectorInstrCost(const Instruction &I, Type *Val, TTI::TargetCostKind CostKind, unsigned Index)=0
virtual bool isLegalToVectorizeLoad(LoadInst *LI) const =0
virtual bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const =0
virtual unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) const =0
virtual bool isTargetIntrinsicWithOverloadTypeAtArg(Intrinsic::ID ID, int OpdIdx)=0
virtual bool isLSRCostLess(const TargetTransformInfo::LSRCost &C1, const TargetTransformInfo::LSRCost &C2)=0
virtual bool shouldDropLSRSolutionIfLessProfitable() const =0
virtual bool isNoopAddrSpaceCast(unsigned FromAS, unsigned ToAS) const =0
virtual InstructionCost getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, bool UseMaskForCond=false, bool UseMaskForGaps=false)=0
virtual bool prefersVectorizedAddressing()=0
virtual uint64_t getMaxMemIntrinsicInlineSizeThreshold() const =0
virtual InstructionCost getShuffleCost(ShuffleKind Kind, VectorType *Tp, ArrayRef< int > Mask, TTI::TargetCostKind CostKind, int Index, VectorType *SubTp, ArrayRef< const Value * > Args, const Instruction *CxtI)=0
virtual InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, OperandValueInfo OpInfo, const Instruction *I)=0
virtual bool canSaveCmp(Loop *L, BranchInst **BI, ScalarEvolution *SE, LoopInfo *LI, DominatorTree *DT, AssumptionCache *AC, TargetLibraryInfo *LibInfo)=0
virtual InstructionCost getMaskedMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind)=0
virtual bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo)=0
virtual bool isAlwaysUniform(const Value *V)=0
virtual std::optional< unsigned > getMinPageSize() const =0
virtual bool canMacroFuseCmp()=0
virtual InstructionCost getMemcpyCost(const Instruction *I)=0
virtual ElementCount getMinimumVF(unsigned ElemWidth, bool IsScalable) const =0
virtual bool areInlineCompatible(const Function *Caller, const Function *Callee) const =0
virtual bool addrspacesMayAlias(unsigned AS0, unsigned AS1) const =0
virtual InstructionCost getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index)=0
virtual unsigned getEpilogueVectorizationMinVF()=0
virtual std::optional< Value * > simplifyDemandedVectorEltsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp)=0
virtual InstructionCost getStridedMemoryOpCost(unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, Align Alignment, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)=0
virtual unsigned getFlatAddressSpace()=0
virtual InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, Value *Op0, Value *Op1)=0
virtual InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, Value *Scalar, ArrayRef< std::tuple< Value *, User *, int > > ScalarUserAndIdx)=0
virtual unsigned getPrefetchDistance() const =0
virtual bool enableSelectOptimize()=0
virtual bool LSRWithInstrQueries()=0
virtual bool shouldTreatInstructionLikeSelect(const Instruction *I)=0
virtual bool hasVolatileVariant(Instruction *I, unsigned AddrSpace)=0
virtual bool preferToKeepConstantsAttached(const Instruction &Inst, const Function &Fn) const =0
virtual bool isNumRegsMajorCostOfLSR()=0
virtual bool isLegalStridedLoadStore(Type *DataType, Align Alignment)=0
virtual bool isSingleThreaded() const =0
virtual bool isLegalAddImmediate(int64_t Imm)=0
virtual Value * rewriteIntrinsicWithAddressSpace(IntrinsicInst *II, Value *OldV, Value *NewV) const =0
virtual bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace, Instruction *I, int64_t ScalableOffset)=0
virtual bool shouldConsiderAddressTypePromotion(const Instruction &I, bool &AllowPromotionWithoutCommonHeader)=0
virtual unsigned getStoreMinimumVF(unsigned VF, Type *ScalarMemTy, Type *ScalarValTy) const =0
virtual bool isVScaleKnownToBeAPowerOfTwo() const =0
virtual InstructionCost getCostOfKeepingLiveOverCall(ArrayRef< Type * > Tys)=0
virtual bool hasActiveVectorLength(unsigned Opcode, Type *DataType, Align Alignment) const =0
virtual bool enableInterleavedAccessVectorization()=0
virtual bool isTargetIntrinsicWithStructReturnOverloadAtField(Intrinsic::ID ID, int RetIdx)=0
virtual unsigned getAtomicMemIntrinsicMaxElementSize() const =0
virtual bool preferEpilogueVectorization() const =0
virtual InstructionCost getVPMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, const Instruction *I)=0
virtual int getInliningLastCallToStaticBonus() const =0
virtual unsigned getMaximumVF(unsigned ElemWidth, unsigned Opcode) const =0
virtual bool isIndexedStoreLegal(MemIndexedMode Mode, Type *Ty) const =0
virtual bool allowsMisalignedMemoryAccesses(LLVMContext &Context, unsigned BitWidth, unsigned AddressSpace, Align Alignment, unsigned *Fast)=0
virtual unsigned getInliningCostBenefitAnalysisProfitableMultiplier() const =0
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
bool getTgtMemIntrinsic(IntrinsicInst *Inst, MemIntrinsicInfo &Info) const
bool isLegalToVectorizeLoad(LoadInst *LI) const
std::optional< unsigned > getVScaleForTuning() const
static CastContextHint getCastContextHint(const Instruction *I)
Calculates a CastContextHint from I.
unsigned getMaxNumArgs() const
bool addrspacesMayAlias(unsigned AS0, unsigned AS1) const
Return false if a AS0 address cannot possibly alias a AS1 address.
bool isLegalMaskedScatter(Type *DataType, Align Alignment) const
Return true if the target supports masked scatter.
InstructionCost getStridedMemoryOpCost(unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, Align Alignment, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, const Instruction *I=nullptr) const
bool shouldBuildLookupTables() const
Return true if switches should be turned into lookup tables for the target.
bool isLegalToVectorizeStore(StoreInst *SI) const
bool enableAggressiveInterleaving(bool LoopHasReductions) const
Don't restrict interleaved unrolling to small loops.
uint64_t getFeatureMask(const Function &F) const
Returns a bitmask constructed from the target-features or fmv-features metadata of a function.
bool isMultiversionedFunction(const Function &F) const
Returns true if this is an instance of a function with multiple versions.
bool isFCmpOrdCheaperThanFCmpZero(Type *Ty) const
Return true if it is faster to check if a floating-point value is NaN (or not-NaN) versus a compariso...
bool preferInLoopReduction(unsigned Opcode, Type *Ty, ReductionFlags Flags) const
bool supportsEfficientVectorElementLoadStore() const
If target has efficient vector element load/store instructions, it can return true here so that inser...
bool isAlwaysUniform(const Value *V) const
unsigned getAssumedAddrSpace(const Value *V) const
bool shouldDropLSRSolutionIfLessProfitable() const
Return true if LSR should drop a found solution if it's calculated to be less profitable than the bas...
bool isLSRCostLess(const TargetTransformInfo::LSRCost &C1, const TargetTransformInfo::LSRCost &C2) const
Return true if LSR cost of C1 is lower than C2.
unsigned getPrefetchDistance() const
Type * getMemcpyLoopLoweringType(LLVMContext &Context, Value *Length, unsigned SrcAddrSpace, unsigned DestAddrSpace, Align SrcAlign, Align DestAlign, std::optional< uint32_t > AtomicElementSize=std::nullopt) const
bool isLegalMaskedExpandLoad(Type *DataType, Align Alignment) const
Return true if the target supports masked expand load.
bool prefersVectorizedAddressing() const
Return true if target doesn't mind addresses in vectors.
InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, OperandValueInfo Op1Info={OK_AnyValue, OP_None}, OperandValueInfo Op2Info={OK_AnyValue, OP_None}, const Instruction *I=nullptr) const
bool hasBranchDivergence(const Function *F=nullptr) const
Return true if branch divergence exists.
MemCmpExpansionOptions enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const
InstructionCost getAddressComputationCost(Type *Ty, ScalarEvolution *SE=nullptr, const SCEV *Ptr=nullptr) const
bool invalidate(Function &, const PreservedAnalyses &, FunctionAnalysisManager::Invalidator &)
Handle the invalidation of this information.
void getUnrollingPreferences(Loop *L, ScalarEvolution &, UnrollingPreferences &UP, OptimizationRemarkEmitter *ORE) const
Get target-customized preferences for the generic loop unrolling transformation.
bool shouldBuildLookupTablesForConstant(Constant *C) const
Return true if switches should be turned into lookup tables containing this constant value for the ta...
InstructionCost getOperandsScalarizationOverhead(ArrayRef< const Value * > Args, ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind) const
Estimate the overhead of scalarizing an instructions unique non-constant operands.
bool supportsTailCallFor(const CallBase *CB) const
If target supports tail call on CB.
std::optional< Instruction * > instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const
Targets can implement their own combinations for target-specific intrinsics.
bool isProfitableLSRChainElement(Instruction *I) const
TypeSize getRegisterBitWidth(RegisterKind K) const
unsigned getInlineCallPenalty(const Function *F, const CallBase &Call, unsigned DefaultCallPenalty) const
Returns a penalty for invoking call Call in F.
bool isExpensiveToSpeculativelyExecute(const Instruction *I) const
Return true if the cost of the instruction is too high to speculatively execute and should be kept be...
bool isLegalMaskedGather(Type *DataType, Align Alignment) const
Return true if the target supports masked gather.
InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, OperandValueInfo OpdInfo={OK_AnyValue, OP_None}, const Instruction *I=nullptr) const
std::optional< unsigned > getMaxVScale() const
InstructionCost getReplicationShuffleCost(Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts, TTI::TargetCostKind CostKind) const
InstructionCost getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, bool UseMaskForCond=false, bool UseMaskForGaps=false) const
bool isSingleThreaded() const
std::optional< Value * > simplifyDemandedVectorEltsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp) const
Can be used to implement target-specific instruction combining.
bool enableOrderedReductions() const
Return true if we should be enabling ordered reductions for the target.
InstructionCost getInstructionCost(const User *U, TargetCostKind CostKind) const
This is a helper function which calls the three-argument getInstructionCost with Operands which are t...
unsigned getInliningCostBenefitAnalysisProfitableMultiplier() const
InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const
InstructionCost getArithmeticReductionCost(unsigned Opcode, VectorType *Ty, std::optional< FastMathFlags > FMF, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput) const
Calculate the cost of vector reduction intrinsics.
unsigned getAtomicMemIntrinsicMaxElementSize() const
InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind=TTI::TCK_SizeAndLatency, const Instruction *I=nullptr) const
bool LSRWithInstrQueries() const
Return true if the loop strength reduce pass should make Instruction* based TTI queries to isLegalAdd...
unsigned getStoreVectorFactor(unsigned VF, unsigned StoreSize, unsigned ChainSizeInBytes, VectorType *VecTy) const
VPLegalization getVPLegalizationStrategy(const VPIntrinsic &PI) const
static PartialReductionExtendKind getPartialReductionExtendKind(Instruction *I)
Get the kind of extension that an instruction represents.
bool enableWritePrefetching() const
bool shouldTreatInstructionLikeSelect(const Instruction *I) const
Should the Select Optimization pass treat the given instruction like a select, potentially converting...
bool isNoopAddrSpaceCast(unsigned FromAS, unsigned ToAS) const
bool shouldMaximizeVectorBandwidth(TargetTransformInfo::RegisterKind K) const
TailFoldingStyle getPreferredTailFoldingStyle(bool IVUpdateMayOverflow=true) const
Query the target what the preferred style of tail folding is.
InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr, ArrayRef< const Value * > Operands, Type *AccessType=nullptr, TargetCostKind CostKind=TCK_SizeAndLatency) const
Estimate the cost of a GEP operation when lowered.
bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const
bool isLegalInterleavedAccessType(VectorType *VTy, unsigned Factor, Align Alignment, unsigned AddrSpace) const
Return true is the target supports interleaved access for the given vector type VTy,...
unsigned getRegUsageForType(Type *Ty) const
Returns the estimated number of registers required to represent Ty.
bool isLegalBroadcastLoad(Type *ElementTy, ElementCount NumElements) const
\Returns true if the target supports broadcasting a load to a vector of type <NumElements x ElementTy...
bool isIndexedStoreLegal(enum MemIndexedMode Mode, Type *Ty) const
std::pair< const Value *, unsigned > getPredicatedAddrSpace(const Value *V) const
unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) const
ReductionShuffle getPreferredExpandedReductionShuffle(const IntrinsicInst *II) const
InstructionCost getExtendedReductionCost(unsigned Opcode, bool IsUnsigned, Type *ResTy, VectorType *Ty, FastMathFlags FMF, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput) const
Calculate the cost of an extended reduction pattern, similar to getArithmeticReductionCost of a reduc...
static OperandValueInfo getOperandInfo(const Value *V)
Collect properties of V used in cost analysis, e.g. OP_PowerOf2.
InstructionCost getMulAccReductionCost(bool IsUnsigned, Type *ResTy, VectorType *Ty, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput) const
Calculate the cost of an extended reduction pattern, similar to getArithmeticReductionCost of an Add ...
unsigned getRegisterClassForType(bool Vector, Type *Ty=nullptr) const
bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace=0, Instruction *I=nullptr, int64_t ScalableOffset=0) const
Return true if the addressing mode represented by AM is legal for this target, for a load/store of th...
PopcntSupportKind getPopcntSupport(unsigned IntTyWidthInBit) const
Return hardware support for population count.
unsigned getEstimatedNumberOfCaseClusters(const SwitchInst &SI, unsigned &JTSize, ProfileSummaryInfo *PSI, BlockFrequencyInfo *BFI) const
bool isElementTypeLegalForScalableVector(Type *Ty) const
bool forceScalarizeMaskedGather(VectorType *Type, Align Alignment) const
Return true if the target forces scalarizing of llvm.masked.gather intrinsics.
unsigned getMaxPrefetchIterationsAhead() const
bool canHaveNonUndefGlobalInitializerInAddressSpace(unsigned AS) const
Return true if globals in this address space can have initializers other than undef.
ElementCount getMinimumVF(unsigned ElemWidth, bool IsScalable) const
InstructionCost getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, const APInt &Imm, Type *Ty, TargetCostKind CostKind) const
bool enableMaskedInterleavedAccessVectorization() const
Enable matching of interleaved access groups that contain predicated accesses or gaps and therefore v...
InstructionCost getIntImmCostInst(unsigned Opc, unsigned Idx, const APInt &Imm, Type *Ty, TargetCostKind CostKind, Instruction *Inst=nullptr) const
Return the expected cost of materialization for the given integer immediate of the specified type for...
bool isLegalStridedLoadStore(Type *DataType, Align Alignment) const
Return true if the target supports strided load.
TargetTransformInfo & operator=(TargetTransformInfo &&RHS)
InstructionCost getMinMaxReductionCost(Intrinsic::ID IID, VectorType *Ty, FastMathFlags FMF=FastMathFlags(), TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput) const
TargetCostKind
The kind of cost model.
@ TCK_RecipThroughput
Reciprocal throughput.
@ TCK_CodeSize
Instruction code size.
@ TCK_SizeAndLatency
The weighted sum of size and latency.
@ TCK_Latency
The latency of instruction.
InstructionCost getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, TTI::OperandValueInfo Opd1Info={TTI::OK_AnyValue, TTI::OP_None}, TTI::OperandValueInfo Opd2Info={TTI::OK_AnyValue, TTI::OP_None}, ArrayRef< const Value * > Args={}, const Instruction *CxtI=nullptr, const TargetLibraryInfo *TLibInfo=nullptr) const
This is an approximation of reciprocal throughput of a math/logic op.
bool areTypesABICompatible(const Function *Caller, const Function *Callee, const ArrayRef< Type * > &Types) const
bool enableSelectOptimize() const
Should the Select Optimization pass be enabled and ran.
bool collectFlatAddressOperands(SmallVectorImpl< int > &OpIndexes, Intrinsic::ID IID) const
Return any intrinsic address operand indexes which may be rewritten if they use a flat address space ...
OperandValueProperties
Additional properties of an operand's values.
int getInliningLastCallToStaticBonus() const
InstructionCost getPointersChainCost(ArrayRef< const Value * > Ptrs, const Value *Base, const PointersChainInfo &Info, Type *AccessTy, TargetCostKind CostKind=TTI::TCK_RecipThroughput) const
Estimate the cost of a chain of pointers (typically pointer operands of a chain of loads or stores wi...
bool isVScaleKnownToBeAPowerOfTwo() const
bool isIndexedLoadLegal(enum MemIndexedMode Mode, Type *Ty) const
unsigned getMaximumVF(unsigned ElemWidth, unsigned Opcode) const
bool isSourceOfDivergence(const Value *V) const
Returns whether V is a source of divergence.
bool isLegalICmpImmediate(int64_t Imm) const
Return true if the specified immediate is legal icmp immediate, that is the target has icmp instructi...
bool isTypeLegal(Type *Ty) const
Return true if this type is legal.
static bool requiresOrderedReduction(std::optional< FastMathFlags > FMF)
A helper function to determine the type of reduction algorithm used for a given Opcode and set of Fas...
bool isLegalToVectorizeReduction(const RecurrenceDescriptor &RdxDesc, ElementCount VF) const
std::optional< unsigned > getCacheAssociativity(CacheLevel Level) const
bool isLegalNTLoad(Type *DataType, Align Alignment) const
Return true if the target supports nontemporal load.
InstructionCost getMemcpyCost(const Instruction *I) const
unsigned adjustInliningThreshold(const CallBase *CB) const
bool isLegalAddImmediate(int64_t Imm) const
Return true if the specified immediate is legal add immediate, that is the target has add instruction...
bool isTargetIntrinsicWithStructReturnOverloadAtField(Intrinsic::ID ID, int RetIdx) const
Identifies if the vector form of the intrinsic that returns a struct is overloaded at the struct elem...
InstructionCost getVPMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, const Instruction *I=nullptr) const
unsigned getLoadVectorFactor(unsigned VF, unsigned LoadSize, unsigned ChainSizeInBytes, VectorType *VecTy) const
InstructionCost getMaskedMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput) const
bool canSaveCmp(Loop *L, BranchInst **BI, ScalarEvolution *SE, LoopInfo *LI, DominatorTree *DT, AssumptionCache *AC, TargetLibraryInfo *LibInfo) const
Return true if the target can save a compare for loop count, for example hardware loop saves a compar...
bool isTargetIntrinsicTriviallyScalarizable(Intrinsic::ID ID) const
Value * rewriteIntrinsicWithAddressSpace(IntrinsicInst *II, Value *OldV, Value *NewV) const
Rewrite intrinsic call II such that OldV will be replaced with NewV, which has a different address sp...
InstructionCost getCostOfKeepingLiveOverCall(ArrayRef< Type * > Tys) const
unsigned getMinPrefetchStride(unsigned NumMemAccesses, unsigned NumStridedMemAccesses, unsigned NumPrefetches, bool HasCall) const
Some HW prefetchers can handle accesses up to a certain constant stride.
bool preferPredicatedReductionSelect(unsigned Opcode, Type *Ty, ReductionFlags Flags) const
InstructionCost getShuffleCost(ShuffleKind Kind, VectorType *Tp, ArrayRef< int > Mask={}, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, int Index=0, VectorType *SubTp=nullptr, ArrayRef< const Value * > Args={}, const Instruction *CxtI=nullptr) const
bool shouldPrefetchAddressSpace(unsigned AS) const
InstructionCost getIntImmCost(const APInt &Imm, Type *Ty, TargetCostKind CostKind) const
Return the expected cost of materializing for the given integer immediate of the specified type.
unsigned getMinVectorRegisterBitWidth() const
bool isLegalNTStore(Type *DataType, Align Alignment) const
Return true if the target supports nontemporal store.
unsigned getFlatAddressSpace() const
Returns the address space ID for a target's 'flat' address space.
bool preferToKeepConstantsAttached(const Instruction &Inst, const Function &Fn) const
It can be advantageous to detach complex constants from their uses to make their generation cheaper.
bool hasArmWideBranch(bool Thumb) const
const char * getRegisterClassName(unsigned ClassID) const
bool preferEpilogueVectorization() const
Return true if the loop vectorizer should consider vectorizing an otherwise scalar epilogue loop.
bool shouldConsiderAddressTypePromotion(const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const
BranchProbability getPredictableBranchThreshold() const
If a branch or a select condition is skewed in one direction by more than this factor,...
unsigned getCallerAllocaCost(const CallBase *CB, const AllocaInst *AI) const
unsigned getCacheLineSize() const
bool allowsMisalignedMemoryAccesses(LLVMContext &Context, unsigned BitWidth, unsigned AddressSpace=0, Align Alignment=Align(1), unsigned *Fast=nullptr) const
Determine if the target supports unaligned memory accesses.
InstructionCost getGatherScatterOpCost(unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, Align Alignment, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, const Instruction *I=nullptr) const
int getInlinerVectorBonusPercent() const
bool hasActiveVectorLength(unsigned Opcode, Type *DataType, Align Alignment) const
unsigned getEpilogueVectorizationMinVF() const
PopcntSupportKind
Flags indicating the kind of support for population count.
InstructionCost getIntImmCodeSizeCost(unsigned Opc, unsigned Idx, const APInt &Imm, Type *Ty) const
Return the expected cost for the given integer when optimising for size.
AddressingModeKind getPreferredAddressingMode(const Loop *L, ScalarEvolution *SE) const
Return the preferred addressing mode LSR should make efforts to generate.
bool isLoweredToCall(const Function *F) const
Test whether calls to a function lower to actual program function calls.
bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const
bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const
Query the target whether it would be profitable to convert the given loop into a hardware loop.
unsigned getInliningThresholdMultiplier() const
InstructionCost getBranchMispredictPenalty() const
Returns estimated penalty of a branch misprediction in latency.
unsigned getNumberOfRegisters(unsigned ClassID) const
bool isLegalAltInstr(VectorType *VecTy, unsigned Opcode0, unsigned Opcode1, const SmallBitVector &OpcodeMask) const
Return true if this is an alternating opcode pattern that can be lowered to a single instruction on t...
bool isProfitableToHoist(Instruction *I) const
Return true if it is profitable to hoist instruction in the then/else to before if.
bool supportsScalableVectors() const
bool hasVolatileVariant(Instruction *I, unsigned AddrSpace) const
Return true if the given instruction (assumed to be a memory access instruction) has a volatile varia...
bool isLegalMaskedCompressStore(Type *DataType, Align Alignment) const
Return true if the target supports masked compress store.
std::optional< unsigned > getMinPageSize() const
bool isFPVectorizationPotentiallyUnsafe() const
Indicate that it is potentially unsafe to automatically vectorize floating-point operations because t...
bool isLegalMaskedStore(Type *DataType, Align Alignment) const
Return true if the target supports masked store.
bool shouldBuildRelLookupTables() const
Return true if lookup tables should be turned into relative lookup tables.
PartialReductionExtendKind
unsigned getStoreMinimumVF(unsigned VF, Type *ScalarMemTy, Type *ScalarValTy) const
std::optional< unsigned > getCacheSize(CacheLevel Level) const
std::optional< Value * > simplifyDemandedUseBitsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, bool &KnownBitsComputed) const
Can be used to implement target-specific instruction combining.
bool isLegalAddScalableImmediate(int64_t Imm) const
Return true if adding the specified scalable immediate is legal, that is the target has add instructi...
bool isTargetIntrinsicWithScalarOpAtArg(Intrinsic::ID ID, unsigned ScalarOpdIdx) const
Identifies if the vector form of the intrinsic has a scalar operand.
bool hasDivRemOp(Type *DataType, bool IsSigned) const
Return true if the target has a unified operation to calculate division and remainder.
InstructionCost getAltInstrCost(VectorType *VecTy, unsigned Opcode0, unsigned Opcode1, const SmallBitVector &OpcodeMask, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput) const
Returns the cost estimation for alternating opcode pattern that can be lowered to a single instructio...
TargetCostConstants
Underlying constants for 'cost' values in this interface.
@ TCC_Expensive
The cost of a 'div' instruction on x86.
@ TCC_Free
Expected to fold away in lowering.
@ TCC_Basic
The cost of a typical 'add' instruction.
InstructionCost getScalarizationOverhead(VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract, TTI::TargetCostKind CostKind, ArrayRef< Value * > VL={}) const
Estimate the overhead of scalarizing an instruction.
bool enableInterleavedAccessVectorization() const
Enable matching of interleaved access groups.
unsigned getMinTripCountTailFoldingThreshold() const
InstructionCost getInstructionCost(const User *U, ArrayRef< const Value * > Operands, TargetCostKind CostKind) const
Estimate the cost of a given IR user when lowered.
unsigned getMaxInterleaveFactor(ElementCount VF) const
bool enableScalableVectorization() const
bool isVectorShiftByScalarCheap(Type *Ty) const
Return true if it's significantly cheaper to shift a vector by a uniform scalar than by an amount whi...
bool isNumRegsMajorCostOfLSR() const
Return true if LSR major cost is number of registers.
unsigned getInliningCostBenefitAnalysisSavingsMultiplier() const
bool isLegalMaskedVectorHistogram(Type *AddrType, Type *DataType) const
InstructionCost getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index) const
unsigned getGISelRematGlobalCost() const
unsigned getNumBytesToPadGlobalArray(unsigned Size, Type *ArrayType) const
MemIndexedMode
The type of load/store indexing.
@ MIM_Unindexed
No indexing.
@ MIM_PostInc
Post-incrementing.
@ MIM_PostDec
Post-decrementing.
@ MIM_PreDec
Pre-decrementing.
@ MIM_PreInc
Pre-incrementing.
bool areInlineCompatible(const Function *Caller, const Function *Callee) const
bool useColdCCForColdCall(Function &F) const
Return true if the input function which is cold at all call sites, should use coldcc calling conventi...
InstructionCost getFPOpCost(Type *Ty) const
Return the expected cost of supporting the floating point operation of the specified type.
bool supportsTailCalls() const
If the target supports tail calls.
bool canMacroFuseCmp() const
Return true if the target can fuse a compare and branch.
Value * getOrCreateResultFromMemIntrinsic(IntrinsicInst *Inst, Type *ExpectedType) const
bool isValidAddrSpaceCast(unsigned FromAS, unsigned ToAS) const
Query the target whether the specified address space cast from FromAS to ToAS is valid.
unsigned getNumberOfParts(Type *Tp) const
bool hasConditionalLoadStoreForType(Type *Ty=nullptr) const
InstructionCost getPartialReductionCost(unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType, ElementCount VF, PartialReductionExtendKind OpAExtend, PartialReductionExtendKind OpBExtend, std::optional< unsigned > BinOp=std::nullopt) const
InstructionCost getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, StackOffset BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace=0) const
Return the cost of the scaling factor used in the addressing mode represented by AM for this target,...
bool isTruncateFree(Type *Ty1, Type *Ty2) const
Return true if it's free to truncate a value of type Ty1 to type Ty2.
bool isProfitableToSinkOperands(Instruction *I, SmallVectorImpl< Use * > &Ops) const
Return true if sinking I's operands to the same basic block as I is profitable, e....
void getMemcpyLoopResidualLoweringType(SmallVectorImpl< Type * > &OpsOut, LLVMContext &Context, unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace, Align SrcAlign, Align DestAlign, std::optional< uint32_t > AtomicCpySize=std::nullopt) const
bool preferPredicateOverEpilogue(TailFoldingInfo *TFI) const
Query the target whether it would be prefered to create a predicated vector loop, which can avoid the...
bool forceScalarizeMaskedScatter(VectorType *Type, Align Alignment) const
Return true if the target forces scalarizing of llvm.masked.scatter intrinsics.
bool isTargetIntrinsicWithOverloadTypeAtArg(Intrinsic::ID ID, int OpdIdx) const
Identifies if the vector form of the intrinsic is overloaded on the type of the operand at index OpdI...
bool haveFastSqrt(Type *Ty) const
Return true if the hardware has a fast square-root instruction.
bool shouldExpandReduction(const IntrinsicInst *II) const
TargetTransformInfo(T Impl)
Construct a TTI object using a type implementing the Concept API below.
uint64_t getMaxMemIntrinsicInlineSizeThreshold() const
Returns the maximum memset / memcpy size in bytes that still makes it profitable to inline the call.
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index=-1, Value *Op0=nullptr, Value *Op1=nullptr) const
ShuffleKind
The various kinds of shuffle patterns for vector queries.
@ SK_InsertSubvector
InsertSubvector. Index indicates start offset.
@ SK_Select
Selects elements from the corresponding lane of either source operand.
@ SK_PermuteSingleSrc
Shuffle elements of single source vector with any shuffle mask.
@ SK_Transpose
Transpose two vectors.
@ SK_Splice
Concatenates elements from the first input vector with elements of the second input vector.
@ SK_Broadcast
Broadcast element 0 to all other elements.
@ SK_PermuteTwoSrc
Merge elements from two source vectors into one with any shuffle mask.
@ SK_Reverse
Reverse the order of the vector.
@ SK_ExtractSubvector
ExtractSubvector Index indicates start offset.
void getPeelingPreferences(Loop *L, ScalarEvolution &SE, PeelingPreferences &PP) const
Get target-customized preferences for the generic loop peeling transformation.
InstructionCost getCallInstrCost(Function *F, Type *RetTy, ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind=TTI::TCK_SizeAndLatency) const
InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind=TTI::TCK_SizeAndLatency, const Instruction *I=nullptr) const
CastContextHint
Represents a hint about the context in which a cast is used.
@ Reversed
The cast is used with a reversed load/store.
@ Masked
The cast is used with a masked load/store.
@ None
The cast is not used with a load/store of any kind.
@ Normal
The cast is used with a normal load/store.
@ Interleave
The cast is used with an interleaved load/store.
@ GatherScatter
The cast is used with a gather/scatter.
OperandValueKind
Additional information about an operand's possible values.
@ OK_UniformConstantValue
@ OK_NonUniformConstantValue
CacheLevel
The possible cache levels.
bool preferFixedOverScalableIfEqualCost() const
bool isLegalMaskedLoad(Type *DataType, Align Alignment) const
Return true if the target supports masked load.
The instances of the Type class are immutable: once they are created, they are never changed.
This is the common base class for vector predication intrinsics.
LLVM Value Representation.
Base class of all SIMD vector types.
constexpr char Args[]
Key for Kernel::Metadata::mArgs.
bool areInlineCompatible(const Function &Caller, const Function &Callee)
@ Fast
Attempts to make calls as fast as possible (e.g.
@ C
The default llvm calling convention, compatible with C.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Type
MessagePack types as defined in the standard, with the exception of Integer being divided into a sign...
This is an optimization pass for GlobalISel generic memory operations.
AtomicOrdering
Atomic ordering for LLVM's memory model.
ImmutablePass * createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA)
Create an analysis pass wrapper around a TTI object.
constexpr unsigned BitWidth
OutputIt move(R &&Range, OutputIt Out)
Provide wrappers to std::move which take ranges instead of having to pass begin/end explicitly.
@ DataAndControlFlowWithoutRuntimeCheck
Use predicate to control both data and control flow, but modify the trip count so that a runtime over...
@ DataWithEVL
Use predicated EVL instructions for tail-folding.
@ DataAndControlFlow
Use predicate to control both data and control flow.
@ DataWithoutLaneMask
Same as Data, but avoids using the get.active.lane.mask intrinsic to calculate the mask and instead i...
Implement std::hash so that hash_code can be used in STL containers.
This struct is a compact representation of a valid (non-zero power of two) alignment.
A CRTP mix-in that provides informational APIs needed for analysis passes.
A special type used by analysis passes to provide an address that identifies that particular analysis...
Attributes of a target dependent hardware loop.
bool canAnalyze(LoopInfo &LI)
HardwareLoopInfo()=delete
bool isHardwareLoopCandidate(ScalarEvolution &SE, LoopInfo &LI, DominatorTree &DT, bool ForceNestedLoop=false, bool ForceHardwareLoopPHI=false)
Information about a load/store intrinsic defined by the target.
unsigned short MatchingId
Value * PtrVal
This is the pointer that the intrinsic is loading from or storing to.
InterleavedAccessInfo * IAI
TailFoldingInfo(TargetLibraryInfo *TLI, LoopVectorizationLegality *LVL, InterleavedAccessInfo *IAI)
LoopVectorizationLegality * LVL
unsigned Insns
TODO: Some of these could be merged.
Returns options for expansion of memcmp. IsZeroCmp is.
SmallVector< unsigned, 8 > LoadSizes
unsigned NumLoadsPerBlock
bool AllowOverlappingLoads
SmallVector< unsigned, 4 > AllowedTailExpansions
bool isNegatedPowerOf2() const
OperandValueInfo getNoProps() const
OperandValueProperties Properties
bool AllowPeeling
Allow peeling off loop iterations.
bool AllowLoopNestsPeeling
Allow peeling off loop iterations for loop nests.
bool PeelProfiledIterations
Allow peeling basing on profile.
unsigned PeelCount
A forced peeling factor (the number of bodied of the original loop that should be peeled off before t...
Describe known properties for a set of pointers.
unsigned IsKnownStride
True if distance between any two neigbouring pointers is a known value.
static PointersChainInfo getKnownStride()
bool isUnitStride() const
unsigned IsUnitStride
These properties only valid if SameBaseAddress is set.
bool isKnownStride() const
unsigned IsSameBaseAddress
All the GEPs in a set have same base address.
static PointersChainInfo getUnitStride()
static PointersChainInfo getUnknownStride()
Flags describing the kind of vector reduction.
bool IsSigned
Whether the operation is a signed int reduction.
bool IsMaxOp
If the op a min/max kind, true if it's a max operation.
bool NoNaN
If op is an fp min/max, whether NaNs may be present.
Parameters that control the generic loop unrolling transformation.
unsigned Count
A forced unrolling factor (the number of concatenated bodies of the original loop in the unrolled loo...
bool UpperBound
Allow using trip count upper bound to unroll loops.
unsigned Threshold
The cost threshold for the unrolled loop.
bool Force
Apply loop unroll on any kind of loop (mainly to loops that fail runtime unrolling).
unsigned PartialOptSizeThreshold
The cost threshold for the unrolled loop when optimizing for size, like OptSizeThreshold,...
bool UnrollVectorizedLoop
Don't disable runtime unroll for the loops which were vectorized.
unsigned DefaultUnrollRuntimeCount
Default unroll count for loops with run-time trip count.
unsigned MaxPercentThresholdBoost
If complete unrolling will reduce the cost of the loop, we will boost the Threshold by a certain perc...
unsigned SCEVExpansionBudget
Don't allow runtime unrolling if expanding the trip count takes more than SCEVExpansionBudget.
unsigned UnrollAndJamInnerLoopThreshold
Threshold for unroll and jam, for inner loop size.
unsigned MaxIterationsCountToAnalyze
Don't allow loop unrolling to simulate more than this number of iterations when checking full unroll ...
bool AllowRemainder
Allow generation of a loop remainder (extra iterations after unroll).
bool UnrollAndJam
Allow unroll and jam. Used to enable unroll and jam for the target.
bool UnrollRemainder
Allow unrolling of all the iterations of the runtime loop remainder.
unsigned FullUnrollMaxCount
Set the maximum unrolling factor for full unrolling.
unsigned PartialThreshold
The cost threshold for the unrolled loop, like Threshold, but used for partial/runtime unrolling (set...
bool Runtime
Allow runtime unrolling (unrolling of loops to expand the size of the loop body even when the number ...
bool Partial
Allow partial unrolling (unrolling of loops to expand the size of the loop body, not only to eliminat...
unsigned OptSizeThreshold
The cost threshold for the unrolled loop when optimizing for size (set to UINT_MAX to disable).
bool AllowExpensiveTripCount
Allow emitting expensive instructions (such as divisions) when computing the trip count of a loop for...
unsigned MaxUpperBound
Set the maximum upper bound of trip count.
bool shouldDoNothing() const
VPTransform EVLParamStrategy
VPLegalization(VPTransform EVLParamStrategy, VPTransform OpStrategy)