LLVM: lib/Target/WebAssembly/WebAssemblyInstrInfo.h Source File (original) (raw)

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15#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYINSTRINFO_H

16#define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYINSTRINFO_H

17

21

22#define GET_INSTRINFO_HEADER

23#include "WebAssemblyGenInstrInfo.inc"

24

25#define GET_INSTRINFO_OPERAND_ENUM

26#include "WebAssemblyGenInstrInfo.inc"

27

28namespace llvm {

29

30class WebAssemblySubtarget;

31

34

35public:

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39

41

44 bool KillSrc, bool RenamableDest = false,

45 bool RenamableSrc = false) const override;

47 unsigned OpIdx1,

48 unsigned OpIdx2) const override;

49

53 bool AllowModify = false) const override;

55 int *BytesRemoved = nullptr) const override;

59 int *BytesAdded = nullptr) const override;

60 bool

62

65

67

69 int64_t &Offset) const override;

70};

71

72}

73

74#endif

MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL

const SmallVectorImpl< MachineOperand > MachineBasicBlock * TBB

const SmallVectorImpl< MachineOperand > & Cond

This file contains the WebAssembly implementation of the WebAssemblyRegisterInfo class.

ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...

MachineInstrBundleIterator< MachineInstr > iterator

Representation of each machine instruction.

MachineOperand class - Representation of each machine instruction operand.

Wrapper class representing virtual and physical registers.

This class consists of common code factored out of the SmallVector class to reduce code duplication b...

bool reverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const override

WebAssemblyInstrInfo(const WebAssemblySubtarget &STI)

const MachineOperand & getCalleeOperand(const MachineInstr &MI) const override

ArrayRef< std::pair< int, const char * > > getSerializableTargetIndices() const override

bool isExplicitTargetIndexDef(const MachineInstr &MI, int &Index, int64_t &Offset) const override

const WebAssemblyRegisterInfo & getRegisterInfo() const

Definition WebAssemblyInstrInfo.h:38

void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const DebugLoc &DL, Register DestReg, Register SrcReg, bool KillSrc, bool RenamableDest=false, bool RenamableSrc=false) const override

unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const override

bool isReMaterializableImpl(const MachineInstr &MI) const override

MachineInstr * commuteInstructionImpl(MachineInstr &MI, bool NewMI, unsigned OpIdx1, unsigned OpIdx2) const override

bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify=false) const override

unsigned removeBranch(MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override

This is an optimization pass for GlobalISel generic memory operations.