WebAssemblyLowerBrUnless.cpp Source File (original) (raw)

25using namespace llvm;

27#define DEBUG_TYPE "wasm-lower-br_unless"

29namespace {

31 StringRef getPassName() const override {

32 return "WebAssembly Lower br_unless";

33 }

35 void getAnalysisUsage(AnalysisUsage &AU) const override {

38 }

42public:

43 static char ID;

45};

46}

48char WebAssemblyLowerBrUnless::ID = 0;

50 "Lowers br_unless into inverted br_if", false, false)

53 return new WebAssemblyLowerBrUnless();

54}

56bool WebAssemblyLowerBrUnless::runOnMachineFunction(MachineFunction &MF) {

57 LLVM_DEBUG(dbgs() << "********** Lowering br_unless **********\n"

58 "********** Function: "

61 auto &MFI = *MF.getInfo();

62 const auto &TII = *MF.getSubtarget().getInstrInfo();

65 for (auto &MBB : MF) {

67 if (MI.getOpcode() != WebAssembly::BR_UNLESS)

68 continue;

71 bool Inverted = false;

74 if (MFI.isVRegStackified(Cond)) {

76 MachineInstr *Def = MRI.getVRegDef(Cond);

77 switch (Def->getOpcode()) {

78 using namespace WebAssembly;

79 case EQ_I32:

81 Inverted = true;

82 break;

83 case NE_I32:

85 Inverted = true;

86 break;

87 case GT_S_I32:

89 Inverted = true;

90 break;

91 case GE_S_I32:

93 Inverted = true;

94 break;

95 case LT_S_I32:

97 Inverted = true;

98 break;

99 case LE_S_I32:

101 Inverted = true;

102 break;

103 case GT_U_I32:

105 Inverted = true;

106 break;

107 case GE_U_I32:

109 Inverted = true;

110 break;

111 case LT_U_I32:

113 Inverted = true;

114 break;

115 case LE_U_I32:

117 Inverted = true;

118 break;

119 case EQ_I64:

121 Inverted = true;

122 break;

123 case NE_I64:

125 Inverted = true;

126 break;

127 case GT_S_I64:

129 Inverted = true;

130 break;

131 case GE_S_I64:

133 Inverted = true;

134 break;

135 case LT_S_I64:

137 Inverted = true;

138 break;

139 case LE_S_I64:

141 Inverted = true;

142 break;

143 case GT_U_I64:

145 Inverted = true;

146 break;

147 case GE_U_I64:

149 Inverted = true;

150 break;

151 case LT_U_I64:

153 Inverted = true;

154 break;

155 case LE_U_I64:

157 Inverted = true;

158 break;

159 case EQ_F32:

161 Inverted = true;

162 break;

163 case NE_F32:

165 Inverted = true;

166 break;

167 case EQ_F64:

169 Inverted = true;

170 break;

171 case NE_F64:

173 Inverted = true;

174 break;

175 case EQZ_I32: {

176

177 Cond = Def->getOperand(1).getReg();

178 Def->eraseFromParent();

179 Inverted = true;

180 break;

181 }

182 default:

183 break;

184 }

185 }

186

187

188

189 if (!Inverted) {

190 Register Tmp = MRI.createVirtualRegister(&WebAssembly::I32RegClass);

193 MFI.stackifyVReg(MRI, Tmp);

195 Inverted = true;

196 }

197

198

199

202 .add(MI.getOperand(0))

205 }

206 }

207

208 return true;

209}

unsigned const MachineRegisterInfo * MRI

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

const TargetInstrInfo & TII

Promote Memory to Register

#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)

const SmallVectorImpl< MachineOperand > & Cond

This file provides WebAssembly-specific target descriptions.

This file declares WebAssembly-specific per-machine-function information.

This file declares the WebAssembly-specific subclass of TargetSubtarget.

This file contains the entry points for global functions defined in the LLVM WebAssembly back-end.

Represent the analysis usage information of a pass.

LLVM_ABI void setPreservesCFG()

This function should be called by the pass, iff they do not:

FunctionPass class - This class is used to implement most global optimizations.

const MCInstrDesc & get(unsigned Opcode) const

Return the machine instruction descriptor that corresponds to the specified instruction opcode.

LLVM_ABI instr_iterator erase(instr_iterator I)

Remove an instruction from the instruction list and delete it.

MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...

void getAnalysisUsage(AnalysisUsage &AU) const override

getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.

const TargetSubtargetInfo & getSubtarget() const

getSubtarget - Return the subtarget for which this machine code is being compiled.

StringRef getName() const

getName - Return the name of the corresponding LLVM function.

MachineRegisterInfo & getRegInfo()

getRegInfo - Return information about the registers currently in use.

Ty * getInfo()

getInfo - Keep track of various per-function pieces of information for backends that would like to do...

const MachineInstrBuilder & add(const MachineOperand &MO) const

const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const

Add a new virtual register operand.

StringRef - Represent a constant reference to a string, i.e.

unsigned ID

LLVM IR allows to use arbitrary numbers as calling convention identifiers.

NodeAddr< DefNode * > Def

This is an optimization pass for GlobalISel generic memory operations.

MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)

Builder interface. Specify how to create the initial instruction itself.

iterator_range< early_inc_iterator_impl< detail::IterOfRange< RangeT > > > make_early_inc_range(RangeT &&Range)

Make a range that does early increment to allow mutation of the underlying range without disrupting i...

LLVM_ABI raw_ostream & dbgs()

dbgs() - This returns a reference to a raw_ostream for debugging messages.

FunctionPass * createWebAssemblyLowerBrUnless()