LLVM: lib/Target/X86/Disassembler/X86DisassemblerDecoder.h File Reference (original) (raw)

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Namespaces
namespace llvm
This is an optimization pass for GlobalISel generic memory operations.
namespace llvm::X86Disassembler
Macros
#define bitFromOffset0(val)
#define bitFromOffset1(val)
#define bitFromOffset2(val)
#define bitFromOffset3(val)
#define bitFromOffset4(val)
#define bitFromOffset5(val)
#define bitFromOffset6(val)
#define bitFromOffset7(val)
#define twoBitsFromOffset0(val)
#define twoBitsFromOffset6(val)
#define threeBitsFromOffset0(val)
#define threeBitsFromOffset3(val)
#define fourBitsFromOffset0(val)
#define fourBitsFromOffset3(val)
#define fiveBitsFromOffset0(val)
#define invertedBitFromOffset2(val)
#define invertedBitFromOffset3(val)
#define invertedBitFromOffset4(val)
#define invertedBitFromOffset5(val)
#define invertedBitFromOffset6(val)
#define invertedBitFromOffset7(val)
#define invertedFourBitsFromOffset3(val)
#define modFromModRM(modRM)
#define regFromModRM(modRM)
#define rmFromModRM(modRM)
#define scaleFromSIB(sib)
#define indexFromSIB(sib)
#define baseFromSIB(sib)
#define wFromREX(rex)
#define rFromREX(rex)
#define xFromREX(rex)
#define bFromREX(rex)
#define mFromREX2(rex2)
#define r2FromREX2(rex2)
#define x2FromREX2(rex2)
#define b2FromREX2(rex2)
#define wFromREX2(rex2)
#define rFromREX2(rex2)
#define xFromREX2(rex2)
#define bFromREX2(rex2)
#define rFromXOP2of3(xop)
#define xFromXOP2of3(xop)
#define bFromXOP2of3(xop)
#define mmmmmFromXOP2of3(xop)
#define wFromXOP3of3(xop)
#define vvvvFromXOP3of3(xop)
#define lFromXOP3of3(xop)
#define ppFromXOP3of3(xop)
#define rFromVEX2of2(vex)
#define vvvvFromVEX2of2(vex)
#define lFromVEX2of2(vex)
#define ppFromVEX2of2(vex)
#define rFromVEX2of3(vex)
#define xFromVEX2of3(vex)
#define bFromVEX2of3(vex)
#define mmmmmFromVEX2of3(vex)
#define wFromVEX3of3(vex)
#define vvvvFromVEX3of3(vex)
#define lFromVEX3of3(vex)
#define ppFromVEX3of3(vex)
#define rFromEVEX2of4(evex)
#define xFromEVEX2of4(evex)
#define bFromEVEX2of4(evex)
#define r2FromEVEX2of4(evex)
#define b2FromEVEX2of4(evex)
#define mmmFromEVEX2of4(evex)
#define wFromEVEX3of4(evex)
#define vvvvFromEVEX3of4(evex)
#define uFromEVEX3of4(evex)
#define ppFromEVEX3of4(evex)
#define oszcFromEVEX3of4(evex)
#define zFromEVEX4of4(evex)
#define l2FromEVEX4of4(evex)
#define lFromEVEX4of4(evex)
#define bFromEVEX4of4(evex)
#define v2FromEVEX4of4(evex)
#define aaaFromEVEX4of4(evex)
#define nfFromEVEX4of4(evex)
#define scFromEVEX4of4(evex)
#define REGS_8BIT
#define EA_BASES_16BIT
#define REGS_16BIT
#define EA_BASES_32BIT
#define REGS_32BIT
#define EA_BASES_64BIT
#define REGS_64BIT
#define REGS_MMX
#define REGS_XMM
#define REGS_YMM
#define REGS_ZMM
#define REGS_MASKS
#define REGS_MASK_PAIRS
#define REGS_SEGMENT
#define REGS_DEBUG
#define REGS_CONTROL
#define REGS_TMM
#define ALL_EA_BASES
#define ALL_SIB_BASES
#define ALL_REGS
#define ENTRY(x)
#define ENTRY(x)
#define ENTRY(x)
#define ENTRY(x)
#define ENTRY(x)
Enumerations
enum llvm::X86Disassembler::EABase { llvm::X86Disassembler::EA_BASE_NONE, llvm::X86Disassembler::EA_max }
All possible values of the base field for effective-address computations, a.k.a. More...
enum llvm::X86Disassembler::SIBIndex { llvm::X86Disassembler::SIB_INDEX_NONE, llvm::X86Disassembler::SIB_INDEX_max }
All possible values of the SIB index field. More...
enum llvm::X86Disassembler::SIBBase { llvm::X86Disassembler::SIB_BASE_NONE, llvm::X86Disassembler::SIB_BASE_max }
All possible values of the SIB base field. More...
enum llvm::X86Disassembler::EADisplacement { llvm::X86Disassembler::EA_DISP_NONE, llvm::X86Disassembler::EA_DISP_8, llvm::X86Disassembler::EA_DISP_16, llvm::X86Disassembler::EA_DISP_32 }
Possible displacement types for effective-address computations. More...
enum llvm::X86Disassembler::Reg { llvm::X86Disassembler::MODRM_REG_max }
All possible values of the reg field in the ModR/M byte. More...
enum llvm::X86Disassembler::SegmentOverride { llvm::X86Disassembler::SEG_OVERRIDE_NONE, llvm::X86Disassembler::SEG_OVERRIDE_CS, llvm::X86Disassembler::SEG_OVERRIDE_SS, llvm::X86Disassembler::SEG_OVERRIDE_DS, llvm::X86Disassembler::SEG_OVERRIDE_ES, llvm::X86Disassembler::SEG_OVERRIDE_FS, llvm::X86Disassembler::SEG_OVERRIDE_GS, llvm::X86Disassembler::SEG_OVERRIDE_max }
All possible segment overrides. More...
enum llvm::X86Disassembler::VEXLeadingOpcodeByte { llvm::X86Disassembler::VEX_LOB_0F = 0x1 , llvm::X86Disassembler::VEX_LOB_0F38 = 0x2 , llvm::X86Disassembler::VEX_LOB_0F3A = 0x3 , llvm::X86Disassembler::VEX_LOB_MAP4 = 0x4 , llvm::X86Disassembler::VEX_LOB_MAP5 = 0x5 , llvm::X86Disassembler::VEX_LOB_MAP6 = 0x6 , llvm::X86Disassembler::VEX_LOB_MAP7 = 0x7 }
Possible values for the VEX.m-mmmm field. More...
enum llvm::X86Disassembler::XOPMapSelect { llvm::X86Disassembler::XOP_MAP_SELECT_8 = 0x8 , llvm::X86Disassembler::XOP_MAP_SELECT_9 = 0x9 , llvm::X86Disassembler::XOP_MAP_SELECT_A = 0xA }
enum llvm::X86Disassembler::VEXPrefixCode { llvm::X86Disassembler::VEX_PREFIX_NONE = 0x0 , llvm::X86Disassembler::VEX_PREFIX_66 = 0x1 , llvm::X86Disassembler::VEX_PREFIX_F3 = 0x2 , llvm::X86Disassembler::VEX_PREFIX_F2 = 0x3 }
Possible values for the VEX.pp/EVEX.pp field. More...
enum llvm::X86Disassembler::VectorExtensionType { llvm::X86Disassembler::TYPE_NO_VEX_XOP = 0x0 , llvm::X86Disassembler::TYPE_VEX_2B = 0x1 , llvm::X86Disassembler::TYPE_VEX_3B = 0x2 , llvm::X86Disassembler::TYPE_EVEX = 0x3 , llvm::X86Disassembler::TYPE_XOP = 0x4 }

◆ aaaFromEVEX4of4

#define aaaFromEVEX4of4 ( evex )

◆ ALL_EA_BASES

◆ ALL_REGS

◆ ALL_SIB_BASES

◆ b2FromEVEX2of4

#define b2FromEVEX2of4 ( evex )

◆ b2FromREX2

#define b2FromREX2 ( rex2 )

◆ baseFromSIB

#define baseFromSIB ( sib )

◆ bFromEVEX2of4

#define bFromEVEX2of4 ( evex )

◆ bFromEVEX4of4

#define bFromEVEX4of4 ( evex )

◆ bFromREX

◆ bFromREX2

#define bFromREX2 ( rex2 )

◆ bFromVEX2of3

#define bFromVEX2of3 ( vex )

◆ bFromXOP2of3

#define bFromXOP2of3 ( xop )

◆ bitFromOffset0

#define bitFromOffset0 ( val )

◆ bitFromOffset1

#define bitFromOffset1 ( val )

◆ bitFromOffset2

#define bitFromOffset2 ( val )

◆ bitFromOffset3

#define bitFromOffset3 ( val )

◆ bitFromOffset4

#define bitFromOffset4 ( val )

◆ bitFromOffset5

#define bitFromOffset5 ( val )

◆ bitFromOffset6

#define bitFromOffset6 ( val )

◆ bitFromOffset7

#define bitFromOffset7 ( val )

◆ EA_BASES_16BIT

◆ EA_BASES_32BIT

◆ EA_BASES_64BIT

◆ ENTRY [1/5]

◆ ENTRY [2/5]

◆ ENTRY [3/5]

◆ ENTRY [4/5]

◆ ENTRY [5/5]

◆ fiveBitsFromOffset0

#define fiveBitsFromOffset0 ( val )

◆ fourBitsFromOffset0

#define fourBitsFromOffset0 ( val )

◆ fourBitsFromOffset3

#define fourBitsFromOffset3 ( val )

◆ indexFromSIB

#define indexFromSIB ( sib )

◆ invertedBitFromOffset2

#define invertedBitFromOffset2 ( val )

◆ invertedBitFromOffset3

#define invertedBitFromOffset3 ( val )

◆ invertedBitFromOffset4

#define invertedBitFromOffset4 ( val )

◆ invertedBitFromOffset5

#define invertedBitFromOffset5 ( val )

◆ invertedBitFromOffset6

#define invertedBitFromOffset6 ( val )

◆ invertedBitFromOffset7

#define invertedBitFromOffset7 ( val )

◆ invertedFourBitsFromOffset3

#define invertedFourBitsFromOffset3 ( val )

◆ l2FromEVEX4of4

#define l2FromEVEX4of4 ( evex )

◆ lFromEVEX4of4

#define lFromEVEX4of4 ( evex )

◆ lFromVEX2of2

#define lFromVEX2of2 ( vex )

◆ lFromVEX3of3

#define lFromVEX3of3 ( vex )

◆ lFromXOP3of3

#define lFromXOP3of3 ( xop )

◆ mFromREX2

#define mFromREX2 ( rex2 )

◆ mmmFromEVEX2of4

#define mmmFromEVEX2of4 ( evex )

◆ mmmmmFromVEX2of3

#define mmmmmFromVEX2of3 ( vex )

◆ mmmmmFromXOP2of3

#define mmmmmFromXOP2of3 ( xop )

◆ modFromModRM

#define modFromModRM ( modRM )

◆ nfFromEVEX4of4

#define nfFromEVEX4of4 ( evex )

◆ oszcFromEVEX3of4

#define oszcFromEVEX3of4 ( evex )

◆ ppFromEVEX3of4

#define ppFromEVEX3of4 ( evex )

◆ ppFromVEX2of2

#define ppFromVEX2of2 ( vex )

◆ ppFromVEX3of3

#define ppFromVEX3of3 ( vex )

◆ ppFromXOP3of3

#define ppFromXOP3of3 ( xop )

◆ r2FromEVEX2of4

#define r2FromEVEX2of4 ( evex )

◆ r2FromREX2

#define r2FromREX2 ( rex2 )

◆ regFromModRM

#define regFromModRM ( modRM )

◆ REGS_16BIT

◆ REGS_32BIT

◆ REGS_64BIT

◆ REGS_8BIT

◆ REGS_CONTROL

Value:

ENTRY(CR1) \

ENTRY(CR2) \

ENTRY(CR3) \

ENTRY(CR4) \

ENTRY(CR5) \

ENTRY(CR6) \

ENTRY(CR7) \

ENTRY(CR8) \

ENTRY(CR9) \

ENTRY(CR10) \

ENTRY(CR11) \

ENTRY(CR12) \

ENTRY(CR13) \

ENTRY(CR14) \

ENTRY(CR15)

#define ENTRY(ASMNAME, ENUM)

Definition at line 509 of file X86DisassemblerDecoder.h.

◆ REGS_DEBUG

Value:

ENTRY(DR1) \

ENTRY(DR2) \

ENTRY(DR3) \

ENTRY(DR4) \

ENTRY(DR5) \

ENTRY(DR6) \

ENTRY(DR7) \

ENTRY(DR8) \

ENTRY(DR9) \

ENTRY(DR10) \

ENTRY(DR11) \

ENTRY(DR12) \

ENTRY(DR13) \

ENTRY(DR14) \

ENTRY(DR15)

Definition at line 491 of file X86DisassemblerDecoder.h.

◆ REGS_MASK_PAIRS

◆ REGS_MASKS

Value:

ENTRY(K1) \

ENTRY(K2) \

ENTRY(K3) \

ENTRY(K4) \

ENTRY(K5) \

ENTRY(K6) \

ENTRY(K7)

Definition at line 467 of file X86DisassemblerDecoder.h.

◆ REGS_MMX

Value:

ENTRY(MM1) \

ENTRY(MM2) \

ENTRY(MM3) \

ENTRY(MM4) \

ENTRY(MM5) \

ENTRY(MM6) \

ENTRY(MM7)

Definition at line 355 of file X86DisassemblerDecoder.h.

◆ REGS_SEGMENT

◆ REGS_TMM

Value:

ENTRY(TMM1) \

ENTRY(TMM2) \

ENTRY(TMM3) \

ENTRY(TMM4) \

ENTRY(TMM5) \

ENTRY(TMM6) \

ENTRY(TMM7)

Definition at line 528 of file X86DisassemblerDecoder.h.

◆ REGS_XMM

◆ REGS_YMM

◆ REGS_ZMM

◆ rFromEVEX2of4

#define rFromEVEX2of4 ( evex )

◆ rFromREX

◆ rFromREX2

#define rFromREX2 ( rex2 )

◆ rFromVEX2of2

#define rFromVEX2of2 ( vex )

◆ rFromVEX2of3

#define rFromVEX2of3 ( vex )

◆ rFromXOP2of3

#define rFromXOP2of3 ( xop )

◆ rmFromModRM

#define rmFromModRM ( modRM )

◆ scaleFromSIB

#define scaleFromSIB ( sib )

◆ scFromEVEX4of4

#define scFromEVEX4of4 ( evex )

◆ threeBitsFromOffset0

#define threeBitsFromOffset0 ( val )

◆ threeBitsFromOffset3

#define threeBitsFromOffset3 ( val )

◆ twoBitsFromOffset0

#define twoBitsFromOffset0 ( val )

◆ twoBitsFromOffset6

#define twoBitsFromOffset6 ( val )

◆ uFromEVEX3of4

#define uFromEVEX3of4 ( evex )

◆ v2FromEVEX4of4

#define v2FromEVEX4of4 ( evex )

◆ vvvvFromEVEX3of4

#define vvvvFromEVEX3of4 ( evex )

◆ vvvvFromVEX2of2

#define vvvvFromVEX2of2 ( vex )

◆ vvvvFromVEX3of3

#define vvvvFromVEX3of3 ( vex )

◆ vvvvFromXOP3of3

#define vvvvFromXOP3of3 ( xop )

◆ wFromEVEX3of4

#define wFromEVEX3of4 ( evex )

◆ wFromREX

◆ wFromREX2

#define wFromREX2 ( rex2 )

◆ wFromVEX3of3

#define wFromVEX3of3 ( vex )

◆ wFromXOP3of3

#define wFromXOP3of3 ( xop )

◆ x2FromREX2

#define x2FromREX2 ( rex2 )

◆ xFromEVEX2of4

#define xFromEVEX2of4 ( evex )

◆ xFromREX

◆ xFromREX2

#define xFromREX2 ( rex2 )

◆ xFromVEX2of3

#define xFromVEX2of3 ( vex )

◆ xFromXOP2of3

#define xFromXOP2of3 ( xop )

◆ zFromEVEX4of4

#define zFromEVEX4of4 ( evex )