LLVM: lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp Source File (original) (raw)

44

45

46 if (MI->getOpcode() == X86::DATA16_PREFIX &&

48 OS << "\tdata32";

51

52

54

55

58}

61 if (MI->getNumOperands() == 0 ||

62 ->getOperand(MI->getNumOperands() - 1).isImm())

63 return false;

64

65 int64_t Imm = MI->getOperand(MI->getNumOperands() - 1).getImm();

66

68

69

70

71 switch (MI->getOpcode()) {

72 case X86::CMPPDrmi: case X86::CMPPDrri:

73 case X86::CMPPSrmi: case X86::CMPPSrri:

74 case X86::CMPSDrmi: case X86::CMPSDrri:

75 case X86::CMPSDrmi_Int: case X86::CMPSDrri_Int:

76 case X86::CMPSSrmi: case X86::CMPSSrri:

77 case X86::CMPSSrmi_Int: case X86::CMPSSrri_Int:

78 if (Imm >= 0 && Imm <= 7) {

79 OS << '\t';

82 OS << ", ";

83

84

90 else

92 } else

94

95 return true;

96 }

97 break;

98

99 case X86::VCMPPDrmi: case X86::VCMPPDrri:

100 case X86::VCMPPDYrmi: case X86::VCMPPDYrri:

101 case X86::VCMPPDZ128rmi: case X86::VCMPPDZ128rri:

102 case X86::VCMPPDZ256rmi: case X86::VCMPPDZ256rri:

103 case X86::VCMPPDZrmi: case X86::VCMPPDZrri:

104 case X86::VCMPPSrmi: case X86::VCMPPSrri:

105 case X86::VCMPPSYrmi: case X86::VCMPPSYrri:

106 case X86::VCMPPSZ128rmi: case X86::VCMPPSZ128rri:

107 case X86::VCMPPSZ256rmi: case X86::VCMPPSZ256rri:

108 case X86::VCMPPSZrmi: case X86::VCMPPSZrri:

109 case X86::VCMPSDrmi: case X86::VCMPSDrri:

110 case X86::VCMPSDZrmi: case X86::VCMPSDZrri:

111 case X86::VCMPSDrmi_Int: case X86::VCMPSDrri_Int:

112 case X86::VCMPSDZrmi_Int: case X86::VCMPSDZrri_Int:

113 case X86::VCMPSSrmi: case X86::VCMPSSrri:

114 case X86::VCMPSSZrmi: case X86::VCMPSSZrri:

115 case X86::VCMPSSrmi_Int: case X86::VCMPSSrri_Int:

116 case X86::VCMPSSZrmi_Int: case X86::VCMPSSZrri_Int:

117 case X86::VCMPPDZ128rmik: case X86::VCMPPDZ128rrik:

118 case X86::VCMPPDZ256rmik: case X86::VCMPPDZ256rrik:

119 case X86::VCMPPDZrmik: case X86::VCMPPDZrrik:

120 case X86::VCMPPSZ128rmik: case X86::VCMPPSZ128rrik:

121 case X86::VCMPPSZ256rmik: case X86::VCMPPSZ256rrik:

122 case X86::VCMPPSZrmik: case X86::VCMPPSZrrik:

123 case X86::VCMPSDZrmik_Int: case X86::VCMPSDZrrik_Int:

124 case X86::VCMPSSZrmik_Int: case X86::VCMPSSZrrik_Int:

125 case X86::VCMPPDZ128rmbi: case X86::VCMPPDZ128rmbik:

126 case X86::VCMPPDZ256rmbi: case X86::VCMPPDZ256rmbik:

127 case X86::VCMPPDZrmbi: case X86::VCMPPDZrmbik:

128 case X86::VCMPPSZ128rmbi: case X86::VCMPPSZ128rmbik:

129 case X86::VCMPPSZ256rmbi: case X86::VCMPPSZ256rmbik:

130 case X86::VCMPPSZrmbi: case X86::VCMPPSZrmbik:

131 case X86::VCMPPDZrrib: case X86::VCMPPDZrribk:

132 case X86::VCMPPSZrrib: case X86::VCMPPSZrribk:

133 case X86::VCMPSDZrrib_Int: case X86::VCMPSDZrribk_Int:

134 case X86::VCMPSSZrrib_Int: case X86::VCMPSSZrribk_Int:

135 case X86::VCMPPHZ128rmi: case X86::VCMPPHZ128rri:

136 case X86::VCMPPHZ256rmi: case X86::VCMPPHZ256rri:

137 case X86::VCMPPHZrmi: case X86::VCMPPHZrri:

138 case X86::VCMPSHZrmi: case X86::VCMPSHZrri:

139 case X86::VCMPSHZrmi_Int: case X86::VCMPSHZrri_Int:

140 case X86::VCMPPHZ128rmik: case X86::VCMPPHZ128rrik:

141 case X86::VCMPPHZ256rmik: case X86::VCMPPHZ256rrik:

142 case X86::VCMPPHZrmik: case X86::VCMPPHZrrik:

143 case X86::VCMPSHZrmik_Int: case X86::VCMPSHZrrik_Int:

144 case X86::VCMPPHZ128rmbi: case X86::VCMPPHZ128rmbik:

145 case X86::VCMPPHZ256rmbi: case X86::VCMPPHZ256rmbik:

146 case X86::VCMPPHZrmbi: case X86::VCMPPHZrmbik:

147 case X86::VCMPPHZrrib: case X86::VCMPPHZrribk:

148 case X86::VCMPSHZrrib_Int: case X86::VCMPSHZrribk_Int:

149 case X86::VCMPBF16Z128rmi: case X86::VCMPBF16Z128rri:

150 case X86::VCMPBF16Z256rmi: case X86::VCMPBF16Z256rri:

151 case X86::VCMPBF16Zrmi: case X86::VCMPBF16Zrri:

152 case X86::VCMPBF16Z128rmik: case X86::VCMPBF16Z128rrik:

153 case X86::VCMPBF16Z256rmik: case X86::VCMPBF16Z256rrik:

154 case X86::VCMPBF16Zrmik: case X86::VCMPBF16Zrrik:

155 case X86::VCMPBF16Z128rmbi: case X86::VCMPBF16Z128rmbik:

156 case X86::VCMPBF16Z256rmbi: case X86::VCMPBF16Z256rmbik:

157 case X86::VCMPBF16Zrmbi: case X86::VCMPBF16Zrmbik:

158 if (Imm >= 0 && Imm <= 31) {

159 OS << '\t';

161

162 unsigned CurOp = 0;

164

166

167 OS << " {";

169 OS << "}";

170 }

171 OS << ", ";

173 OS << ", ";

174

177

178

184 } else {

186 }

187

188

189 unsigned NumElts;

194 else

198 NumElts *= 2;

199 }

200 OS << "{1to" << NumElts << "}";

201 } else {

205 else

214 } else {

216 }

217 }

218 } else {

221 OS << ", {sae}";

222 }

223

224 return true;

225 }

226 break;

227

228 case X86::VPCOMBmi: case X86::VPCOMBri:

229 case X86::VPCOMDmi: case X86::VPCOMDri:

230 case X86::VPCOMQmi: case X86::VPCOMQri:

231 case X86::VPCOMUBmi: case X86::VPCOMUBri:

232 case X86::VPCOMUDmi: case X86::VPCOMUDri:

233 case X86::VPCOMUQmi: case X86::VPCOMUQri:

234 case X86::VPCOMUWmi: case X86::VPCOMUWri:

235 case X86::VPCOMWmi: case X86::VPCOMWri:

236 if (Imm >= 0 && Imm <= 7) {

237 OS << '\t';

240 OS << ", ";

242 OS << ", ";

245 else

247 return true;

248 }

249 break;

250

251 case X86::VPCMPBZ128rmi: case X86::VPCMPBZ128rri:

252 case X86::VPCMPBZ256rmi: case X86::VPCMPBZ256rri:

253 case X86::VPCMPBZrmi: case X86::VPCMPBZrri:

254 case X86::VPCMPDZ128rmi: case X86::VPCMPDZ128rri:

255 case X86::VPCMPDZ256rmi: case X86::VPCMPDZ256rri:

256 case X86::VPCMPDZrmi: case X86::VPCMPDZrri:

257 case X86::VPCMPQZ128rmi: case X86::VPCMPQZ128rri:

258 case X86::VPCMPQZ256rmi: case X86::VPCMPQZ256rri:

259 case X86::VPCMPQZrmi: case X86::VPCMPQZrri:

260 case X86::VPCMPUBZ128rmi: case X86::VPCMPUBZ128rri:

261 case X86::VPCMPUBZ256rmi: case X86::VPCMPUBZ256rri:

262 case X86::VPCMPUBZrmi: case X86::VPCMPUBZrri:

263 case X86::VPCMPUDZ128rmi: case X86::VPCMPUDZ128rri:

264 case X86::VPCMPUDZ256rmi: case X86::VPCMPUDZ256rri:

265 case X86::VPCMPUDZrmi: case X86::VPCMPUDZrri:

266 case X86::VPCMPUQZ128rmi: case X86::VPCMPUQZ128rri:

267 case X86::VPCMPUQZ256rmi: case X86::VPCMPUQZ256rri:

268 case X86::VPCMPUQZrmi: case X86::VPCMPUQZrri:

269 case X86::VPCMPUWZ128rmi: case X86::VPCMPUWZ128rri:

270 case X86::VPCMPUWZ256rmi: case X86::VPCMPUWZ256rri:

271 case X86::VPCMPUWZrmi: case X86::VPCMPUWZrri:

272 case X86::VPCMPWZ128rmi: case X86::VPCMPWZ128rri:

273 case X86::VPCMPWZ256rmi: case X86::VPCMPWZ256rri:

274 case X86::VPCMPWZrmi: case X86::VPCMPWZrri:

275 case X86::VPCMPBZ128rmik: case X86::VPCMPBZ128rrik:

276 case X86::VPCMPBZ256rmik: case X86::VPCMPBZ256rrik:

277 case X86::VPCMPBZrmik: case X86::VPCMPBZrrik:

278 case X86::VPCMPDZ128rmik: case X86::VPCMPDZ128rrik:

279 case X86::VPCMPDZ256rmik: case X86::VPCMPDZ256rrik:

280 case X86::VPCMPDZrmik: case X86::VPCMPDZrrik:

281 case X86::VPCMPQZ128rmik: case X86::VPCMPQZ128rrik:

282 case X86::VPCMPQZ256rmik: case X86::VPCMPQZ256rrik:

283 case X86::VPCMPQZrmik: case X86::VPCMPQZrrik:

284 case X86::VPCMPUBZ128rmik: case X86::VPCMPUBZ128rrik:

285 case X86::VPCMPUBZ256rmik: case X86::VPCMPUBZ256rrik:

286 case X86::VPCMPUBZrmik: case X86::VPCMPUBZrrik:

287 case X86::VPCMPUDZ128rmik: case X86::VPCMPUDZ128rrik:

288 case X86::VPCMPUDZ256rmik: case X86::VPCMPUDZ256rrik:

289 case X86::VPCMPUDZrmik: case X86::VPCMPUDZrrik:

290 case X86::VPCMPUQZ128rmik: case X86::VPCMPUQZ128rrik:

291 case X86::VPCMPUQZ256rmik: case X86::VPCMPUQZ256rrik:

292 case X86::VPCMPUQZrmik: case X86::VPCMPUQZrrik:

293 case X86::VPCMPUWZ128rmik: case X86::VPCMPUWZ128rrik:

294 case X86::VPCMPUWZ256rmik: case X86::VPCMPUWZ256rrik:

295 case X86::VPCMPUWZrmik: case X86::VPCMPUWZrrik:

296 case X86::VPCMPWZ128rmik: case X86::VPCMPWZ128rrik:

297 case X86::VPCMPWZ256rmik: case X86::VPCMPWZ256rrik:

298 case X86::VPCMPWZrmik: case X86::VPCMPWZrrik:

299 case X86::VPCMPDZ128rmbi: case X86::VPCMPDZ128rmbik:

300 case X86::VPCMPDZ256rmbi: case X86::VPCMPDZ256rmbik:

301 case X86::VPCMPDZrmbi: case X86::VPCMPDZrmbik:

302 case X86::VPCMPQZ128rmbi: case X86::VPCMPQZ128rmbik:

303 case X86::VPCMPQZ256rmbi: case X86::VPCMPQZ256rmbik:

304 case X86::VPCMPQZrmbi: case X86::VPCMPQZrmbik:

305 case X86::VPCMPUDZ128rmbi: case X86::VPCMPUDZ128rmbik:

306 case X86::VPCMPUDZ256rmbi: case X86::VPCMPUDZ256rmbik:

307 case X86::VPCMPUDZrmbi: case X86::VPCMPUDZrmbik:

308 case X86::VPCMPUQZ128rmbi: case X86::VPCMPUQZ128rmbik:

309 case X86::VPCMPUQZ256rmbi: case X86::VPCMPUQZ256rmbik:

310 case X86::VPCMPUQZrmbi: case X86::VPCMPUQZrmbik:

311 if ((Imm >= 0 && Imm <= 2) || (Imm >= 4 && Imm <= 6)) {

312 OS << '\t';

314

315 unsigned CurOp = 0;

317

319

320 OS << " {";

322 OS << "}";

323 }

324 OS << ", ";

326 OS << ", ";

327

330

331

334 else

336

337

338 unsigned NumElts;

343 else

345 OS << "{1to" << NumElts << "}";

346 } else {

351 else

353 }

354 } else {

356 }

357

358 return true;

359 }

360 break;

361 }

362

363 return false;

364}

369 if (Op.isReg()) {

371 } else if (Op.isImm()) {

373 } else {

374 assert(Op.isExpr() && "unknown operand kind in printOperand");

375 O << "offset ";

376 MAI.printExpr(O, *Op.getExpr());

377 }

378}

382

383

386 if (MIA->evaluateBranch(*MI, 0, 0, Target))

387 return;

388 if (MIA->evaluateMemoryOperandAddress(*MI, nullptr, 0, 0))

389 return;

390 }

395

396

398

400 O << '[';

401

402 bool NeedPlus = false;

403 if (BaseReg.getReg()) {

405 NeedPlus = true;

406 }

407

408 if (IndexReg.getReg()) {

409 if (NeedPlus) O << " + ";

410 if (ScaleVal != 1 || !BaseReg.getReg())

411 O << ScaleVal << '*';

413 NeedPlus = true;

414 }

415

416 if (!DispSpec.isImm()) {

417 if (NeedPlus) O << " + ";

418 assert(DispSpec.isExpr() && "non-immediate displacement for LEA?");

419 MAI.printExpr(O, *DispSpec.getExpr());

420 } else {

421 int64_t DispVal = DispSpec.getImm();

422 if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg())) {

423 if (NeedPlus) {

424 if (DispVal > 0)

425 O << " + ";

426 else {

427 O << " - ";

428 DispVal = -DispVal;

429 }

430 }

432 }

433 }

434

435 O << ']';

436}

440

442

444 O << '[';

446 O << ']';

447}

451

452 O << "es:";

453

455 O << '[';

457 O << ']';

458}

463

464

466

468 O << '[';

469

470 if (DispSpec.isImm()) {

472 } else {

473 assert(DispSpec.isExpr() && "non-immediate displacement?");

474 MAI.printExpr(O, *DispSpec.getExpr());

475 }

476

477 O << ']';

478}

482 if (MI->getOperand(Op).isExpr())

483 return MAI.printExpr(O, *MI->getOperand(Op).getExpr());

484

486}

490 MCRegister Reg = MI->getOperand(OpNo).getReg();

491

492 if (Reg == X86::ST0)

493 OS << "st(0)";

494 else

496}