X86MCTargetDesc.h Source File (original) (raw)

13#ifndef LLVM_LIB_TARGET_X86_MCTARGETDESC_X86MCTARGETDESC_H

14#define LLVM_LIB_TARGET_X86_MCTARGETDESC_X86MCTARGETDESC_H

17#include

18#include

19#include

21namespace llvm {

58namespace X86_MC {

73 const MCSubtargetInfo &STI);

83#ifndef NDEBUG

85#endif

89 int MemoryOperand, uint64_t TSFlags);

94 StringRef FS);

96void emitInstruction(MCObjectStreamer &, const MCInst &Inst,

97 const MCSubtargetInfo &STI);

99void emitPrefix(MCCodeEmitter &MCE, const MCInst &MI, SmallVectorImpl &CB,

100 const MCSubtargetInfo &STI);

101}

102

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129 std::unique_ptr &&AB,

130 std::unique_ptr &&OW,

131 std::unique_ptr &&CE);

132

134 std::unique_ptr &&MAB,

135 std::unique_ptr &&MOW,

136 std::unique_ptr &&MCE);

137

138

139std::unique_ptr

141

142

143std::unique_ptr

145

146std::unique_ptr

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155 bool High = false);

156}

157

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161

162#define GET_REGINFO_ENUM

163#include "X86GenRegisterInfo.inc"

164

165

166

167#define GET_INSTRINFO_ENUM

168#define GET_INSTRINFO_MC_HELPER_DECLS

169#include "X86GenInstrInfo.inc"

170

171#define GET_SUBTARGETINFO_ENUM

172#include "X86GenSubtargetInfo.inc"

173

174#define GET_X86_MNEMONIC_TABLES_H

175#include "X86GenMnemonicTables.inc"

176

177#endif

unsigned const MachineRegisterInfo * MRI

This file defines the SmallVector class.

Generic interface to target specific assembler backends.

MCCodeEmitter - Generic instruction encoding interface.

Context object for machine code objects.

This is an instance of a target assembly language printer that converts an MCInst to valid target ass...

Instances of this class represent a single low-level machine instruction.

Interface to description of machine instruction set.

Streaming object file generation interface.

Base class for classes that define behaviour that is specific to both the target and the object forma...

Defines the object file and target independent interfaces used by the assembler backend to write nati...

MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...

Wrapper class representing physical registers. Should be passed by value.

Streaming machine code generation interface.

Generic base class for all target subtargets.

Target specific streamer interface.

StringRef - Represent a constant reference to a string, i.e.

Target - Wrapper for Target specific information.

Triple - Helper class for working with autoconf configuration names.

formatted_raw_ostream - A raw_ostream that wraps another one and keeps track of line and column posit...

@ C

The default llvm calling convention, compatible with C.

Flavour of dwarf regnumbers.

Definition X86MCTargetDesc.h:44

@ X86_64

Definition X86MCTargetDesc.h:46

@ X86_32_DarwinEH

Definition X86MCTargetDesc.h:46

@ X86_32_Generic

Definition X86MCTargetDesc.h:46

Native X86 register numbers.

Definition X86MCTargetDesc.h:52

@ ESI

Definition X86MCTargetDesc.h:54

@ EBX

Definition X86MCTargetDesc.h:54

@ ESP

Definition X86MCTargetDesc.h:54

@ EAX

Definition X86MCTargetDesc.h:54

@ ECX

Definition X86MCTargetDesc.h:54

@ EBP

Definition X86MCTargetDesc.h:54

@ EDI

Definition X86MCTargetDesc.h:54

@ EDX

Definition X86MCTargetDesc.h:54

bool is32BitMemOperand(const MCInst &MI, unsigned Op)

bool is16BitMemOperand(const MCInst &MI, unsigned Op, const MCSubtargetInfo &STI)

bool hasLockPrefix(const MCInst &MI)

Returns true if this instruction has a LOCK prefix.

void initLLVMToSEHAndCVRegMapping(MCRegisterInfo *MRI)

bool needsAddressSizeOverride(const MCInst &MI, const MCSubtargetInfo &STI, int MemoryOperand, uint64_t TSFlags)

Returns true if this instruction needs an Address-Size override prefix.

void emitPrefix(MCCodeEmitter &MCE, const MCInst &MI, SmallVectorImpl< char > &CB, const MCSubtargetInfo &STI)

std::string ParseX86Triple(const Triple &TT)

void emitInstruction(MCObjectStreamer &, const MCInst &Inst, const MCSubtargetInfo &STI)

MCSubtargetInfo * createX86MCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS)

Create a X86 MCSubtargetInfo instance.

bool is64BitMemOperand(const MCInst &MI, unsigned Op)

unsigned getDwarfRegFlavour(const Triple &TT, bool isEH)

This is an optimization pass for GlobalISel generic memory operations.

MCTargetStreamer * createX86ObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI)

Implements X86-only directives for object files.

MCRegister getX86SubSuperRegister(MCRegister Reg, unsigned Size, bool High=false)

MCAsmBackend * createX86_64AsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)

std::unique_ptr< MCObjectTargetWriter > createX86WinCOFFObjectWriter(bool Is64Bit)

Construct an X86 Win COFF object writer.

MCTargetStreamer * createX86AsmTargetStreamer(MCStreamer &S, formatted_raw_ostream &OS, MCInstPrinter *InstPrinter)

Implements X86-only directives for assembly emission.

MCCodeEmitter * createX86MCCodeEmitter(const MCInstrInfo &MCII, MCContext &Ctx)

MCStreamer * createX86ELFStreamer(const Triple &T, MCContext &Context, std::unique_ptr< MCAsmBackend > &&MAB, std::unique_ptr< MCObjectWriter > &&MOW, std::unique_ptr< MCCodeEmitter > &&MCE)

MCStreamer * createX86WinCOFFStreamer(MCContext &C, std::unique_ptr< MCAsmBackend > &&AB, std::unique_ptr< MCObjectWriter > &&OW, std::unique_ptr< MCCodeEmitter > &&CE)

Construct an X86 Windows COFF machine code streamer which will generate PE/COFF format object files.

std::unique_ptr< MCObjectTargetWriter > createX86MachObjectWriter(bool Is64Bit, uint32_t CPUType, uint32_t CPUSubtype)

Construct an X86 Mach-O object writer.

DWARFExpression::Operation Op

std::unique_ptr< MCObjectTargetWriter > createX86ELFObjectWriter(bool IsELF64, uint8_t OSABI, uint16_t EMachine)

Construct an X86 ELF object writer.

MCAsmBackend * createX86_32AsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)