LLVM: llvm::AMDGPU::AMDGPUMCInstrAnalysis Class Reference (original) (raw)
#include "[Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h](AMDGPUMCTargetDesc%5F8h%5Fsource.html)"
| Public Member Functions | |
|---|---|
| AMDGPUMCInstrAnalysis (const MCInstrInfo *Info) | |
| bool | evaluateBranch (const MCInst &Inst, uint64_t Addr, uint64_t Size, uint64_t &Target) const override |
| Given a branch instruction try to get the address the branch targets. | |
| void | resetState () override |
| Clear the internal state. See updateState for more information. | |
| void | updateState (const MCInst &Inst, uint64_t Addr) override |
| Update internal state with Inst at Addr. | |
| unsigned | getVgprMSBs () const |
| Public Member Functions inherited from llvm::MCInstrAnalysis | |
| MCInstrAnalysis (const MCInstrInfo *Info) | |
| virtual | ~MCInstrAnalysis ()=default |
| virtual bool | isBranch (const MCInst &Inst) const |
| virtual bool | isConditionalBranch (const MCInst &Inst) const |
| virtual bool | isUnconditionalBranch (const MCInst &Inst) const |
| virtual bool | isIndirectBranch (const MCInst &Inst) const |
| virtual bool | isCall (const MCInst &Inst) const |
| virtual bool | isReturn (const MCInst &Inst) const |
| virtual bool | isTerminator (const MCInst &Inst) const |
| virtual bool | isBarrier (const MCInst &Inst) const |
| virtual bool | mayAffectControlFlow (const MCInst &Inst, const MCRegisterInfo &MCRI) const |
| virtual bool | clearsSuperRegisters (const MCRegisterInfo &MRI, const MCInst &Inst, APInt &Writes) const |
| Returns true if at least one of the register writes performed by. | |
| virtual bool | isZeroIdiom (const MCInst &MI, APInt &Mask, unsigned CPUID) const |
| Returns true if MI is a dependency breaking zero-idiom for the given subtarget. | |
| virtual bool | isDependencyBreaking (const MCInst &MI, APInt &Mask, unsigned CPUID) const |
| Returns true if MI is a dependency breaking instruction for the subtarget associated with CPUID . | |
| virtual bool | isOptimizableRegisterMove (const MCInst &MI, unsigned CPUID) const |
| Returns true if MI is a candidate for move elimination. | |
| virtual std::optional< uint64_t > | evaluateMemoryOperandAddress (const MCInst &Inst, const MCSubtargetInfo *STI, uint64_t Addr, uint64_t Size) const |
| Given an instruction tries to get the address of a memory operand. | |
| virtual std::optional< uint64_t > | getMemoryOperandRelocationOffset (const MCInst &Inst, uint64_t Size) const |
| Given an instruction with a memory operand that could require relocation, returns the offset within the instruction of that relocation. | |
| virtual std::vector< std::pair< uint64_t, uint64_t > > | findPltEntries (uint64_t PltSectionVA, ArrayRef< uint8_t > PltContents, const MCSubtargetInfo &STI) const |
| Returns (PLT virtual address, GOT virtual address) pairs for PLT entries. |
Definition at line 50 of file AMDGPUMCTargetDesc.h.
| llvm::AMDGPU::AMDGPUMCInstrAnalysis::AMDGPUMCInstrAnalysis ( const MCInstrInfo * Info) | inlineexplicit |
|---|
◆ evaluateBranch()
Given a branch instruction try to get the address the branch targets.
Return true on success, and the address in Target.
Reimplemented from llvm::MCInstrAnalysis.
Definition at line 155 of file AMDGPUMCTargetDesc.cpp.
References llvm::MCOperand::getImm(), llvm::MCInst::getNumOperands(), llvm::MCInst::getOpcode(), llvm::MCInst::getOperand(), llvm::AMDGPU::Imm, llvm::MCInstrAnalysis::Info, llvm::MCOperand::isImm(), llvm::MCOI::OPERAND_PCREL, llvm::SignExtend64(), Size, and llvm::MCInstrAnalysis::Target.
◆ getVgprMSBs()
| unsigned llvm::AMDGPU::AMDGPUMCInstrAnalysis::getVgprMSBs ( ) const | inline |
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◆ resetState()
| void llvm::AMDGPU::AMDGPUMCInstrAnalysis::resetState ( ) | inlineoverridevirtual |
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◆ updateState()
Update internal state with Inst at Addr.
For some types of analyses, inspecting a single instruction is not sufficient. Some examples are auipc/jalr pairs on RISC-V or adrp/ldr pairs on AArch64. To support inspecting multiple instructions, targets may keep track of an internal state while analysing instructions. Clients should call updateState for every instruction which allows later calls to one of the analysis functions to take previous instructions into account. Whenever state becomes irrelevant (e.g., when starting to disassemble a new function), clients should call resetState to clear it.
Reimplemented from llvm::MCInstrAnalysis.
Definition at line 169 of file AMDGPUMCTargetDesc.cpp.
References llvm::MCOperand::getImm(), llvm::MCInst::getOpcode(), llvm::MCInst::getOperand(), and llvm::MCInstrAnalysis::isTerminator().
The documentation for this class was generated from the following files:
- lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h
- lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp