LLVM: llvm::CodeGenPassBuilder< DerivedT, TargetMachineT > Class Template Reference (original) (raw)

This class provides access to building LLVM's passes. More...

#include "[llvm/Passes/CodeGenPassBuilder.h](CodeGenPassBuilder%5F8h%5Fsource.html)"

Protected Types
template
using is_module_pass_t
template
using is_function_pass_t
template
using is_machine_function_pass_t
using CreateMCStreamer
Protected Member Functions
template
TMC & getTM () const
CodeGenOptLevel getOptLevel () const
bool isGlobalISelAbortEnabled () const
Check whether or not GlobalISel should abort on error.
bool reportDiagnosticWhenGlobalISelFallback () const
Check whether or not a diagnostic should be emitted when GlobalISel uses the fallback path.
Error addInstSelector (AddMachinePass &) const
addInstSelector - This method should install an instruction selector pass, which converts from LLVM code to machine instructions.
void addGlobalMergePass (AddIRPass &) const
Target can override this to add GlobalMergePass before all IR passes.
void addILPOpts (AddMachinePass &) const
Add passes that optimize instruction level parallelism for out-of-order targets.
void addPreRegAlloc (AddMachinePass &) const
This method may be implemented by targets that want to run passes immediately before register allocation.
void addPreRewrite (AddMachinePass &) const
addPreRewrite - Add passes to the optimized register allocation pipeline after register allocation is complete, but before virtual registers are rewritten to physical registers.
void addPostRewrite (AddMachinePass &) const
Add passes to be run immediately after virtual registers are rewritten to physical registers.
void addPostRegAlloc (AddMachinePass &) const
This method may be implemented by targets that want to run passes after register allocation pass pipeline but before prolog-epilog insertion.
void addPreSched2 (AddMachinePass &) const
This method may be implemented by targets that want to run passes after prolog-epilog insertion and before the second instruction scheduling pass.
void addPreEmitPass (AddMachinePass &) const
This pass may be implemented by targets that want to run passes immediately before machine code is emitted.
void addPreEmitPass2 (AddMachinePass &) const
Targets may add passes immediately before machine code is emitted in this callback.
void addPreISel (AddIRPass &) const
{{@ For GlobalISel
Error addIRTranslator (AddMachinePass &) const
This method should install an IR translator pass, which converts from LLVM code to machine instructions with possibly generic opcodes.
void addPreLegalizeMachineIR (AddMachinePass &) const
This method may be implemented by targets that want to run passes immediately before legalization.
Error addLegalizeMachineIR (AddMachinePass &) const
This method should install a legalize pass, which converts the instruction sequence into one that can be selected by the target.
void addPreRegBankSelect (AddMachinePass &) const
This method may be implemented by targets that want to run passes immediately before the register bank selection.
Error addRegBankSelect (AddMachinePass &) const
This method should install a register bank selector pass, which assigns register banks to virtual registers without a register class or register banks.
void addPreGlobalInstructionSelect (AddMachinePass &) const
This method may be implemented by targets that want to run passes immediately before the (global) instruction selection.
Error addGlobalInstructionSelect (AddMachinePass &) const
This method should install a (global) instruction selector pass, which converts possibly generic instructions to fully target-specific instructions, thereby constraining all generic virtual registers to register classes.
void addISelPasses (AddIRPass &) const
High level function that adds all passes necessary to go from llvm IR representation to the MI representation.
Error addCoreISelPasses (AddMachinePass &) const
Add the actual instruction selection passes.
Error addMachinePasses (AddMachinePass &) const
Add the complete, standard set of LLVM CodeGen passes.
void addPassesToHandleExceptions (AddIRPass &) const
Add passes to lower exception handling for the code generator.
void addIRPasses (AddIRPass &) const
Add common target configurable passes that perform LLVM IR to IR transforms following machine independent optimization.
void addCodeGenPrepare (AddIRPass &) const
Add pass to prepare the LLVM IR for code generation.
void addISelPrepare (AddIRPass &) const
Add common passes that perform LLVM IR to IR transforms in preparation for instruction selection.
void addMachineSSAOptimization (AddMachinePass &) const
Methods with trivial inline returns are convenient points in the common codegen pass pipeline where targets may insert passes.
Error addFastRegAlloc (AddMachinePass &) const
addFastRegAlloc - Add the minimum set of target-independent passes that are required for fast register allocation.
void addOptimizedRegAlloc (AddMachinePass &) const
addOptimizedRegAlloc - Add passes related to register allocation.
void addMachineLateOptimization (AddMachinePass &) const
Add passes that optimize machine instructions after register allocation.
void addGCPasses (AddMachinePass &) const
addGCPasses - Add late codegen passes that analyze code for garbage collection.
void addBlockPlacement (AddMachinePass &) const
Add standard basic block placement passes.
void addAsmPrinter (AddMachinePass &, CreateMCStreamer) const
void addTargetRegisterAllocator (AddMachinePass &, bool Optimized) const
Utilities for targets to add passes to the pass manager.
void addRegAllocPass (AddMachinePass &, bool Optimized) const
addMachinePasses helper to create the target-selected or overriden regalloc pass.
Error addRegAssignmentFast (AddMachinePass &) const
Add core register alloator passes which do the actual register assignment and rewriting.
Error addRegAssignmentOptimized (AddMachinePass &) const
template<typename... PassTs>
void disablePass ()
Allow the target to disable a specific pass by default.
template<typename TargetPassT, typename InsertedPassT>
void insertPass (InsertedPassT &&Pass) const
Insert InsertedPass pass after TargetPass pass.

template<typename DerivedT, typename TargetMachineT>
class llvm::CodeGenPassBuilder< DerivedT, TargetMachineT >

This class provides access to building LLVM's passes.

Its members provide the baseline state available to passes during their construction. The MachinePassRegistry.def file specifies how to construct all of the built-in passes, and those may reference these members during construction.

Definition at line 167 of file CodeGenPassBuilder.h.

CreateMCStreamer

template<typename DerivedT, typename TargetMachineT>

Initial value:

std::function<Expected<std::unique_ptr>(MCContext &)>

Context object for machine code objects.

Definition at line 550 of file CodeGenPassBuilder.h.

is_function_pass_t

template<typename DerivedT, typename TargetMachineT>

template

Initial value:

decltype(std::declval<PassT &>().run(

std::declval<Function &>(), std::declval<FunctionAnalysisManager &>()))

Definition at line 206 of file CodeGenPassBuilder.h.

is_machine_function_pass_t

template<typename DerivedT, typename TargetMachineT>

template

Initial value:

decltype(std::declval<PassT &>().run(

std::declval<MachineFunction &>(),

std::declval<MachineFunctionAnalysisManager &>()))

Definition at line 210 of file CodeGenPassBuilder.h.

is_module_pass_t

template<typename DerivedT, typename TargetMachineT>

template

Initial value:

decltype(std::declval<PassT &>().run(

std::declval<Module &>(), std::declval<ModuleAnalysisManager &>()))

Definition at line 202 of file CodeGenPassBuilder.h.

template<typename DerivedT, typename TargetMachineT>

addAsmPrinter()

template<typename DerivedT, typename TargetMachineT>

addBlockPlacement()

template<typename Derived, typename TargetMachineT>

addCodeGenPrepare()

template<typename Derived, typename TargetMachineT>

addCoreISelPasses()

template<typename Derived, typename TargetMachineT>

Add the actual instruction selection passes.

This does not include preparation passes on IR.

Definition at line 911 of file CodeGenPassBuilder.h.

References addGlobalInstructionSelect(), addInstSelector(), addIRTranslator(), addLegalizeMachineIR(), addRegBankSelect(), isGlobalISelAbortEnabled(), llvm::None, Opt, reportDiagnosticWhenGlobalISelFallback(), llvm::Error::success(), and TM.

Referenced by buildPipeline().

addFastRegAlloc()

template<typename Derived, typename TargetMachineT>

addFastRegAlloc - Add the minimum set of target-independent passes that are required for fast register allocation.

Add the minimum set of target-independent passes that are required for register allocation.

No coalescing or scheduling.

Definition at line 1236 of file CodeGenPassBuilder.h.

Referenced by addMachinePasses().

addGCPasses()

template<typename DerivedT, typename TargetMachineT>

addGCPasses - Add late codegen passes that analyze code for garbage collection.

This should return true if GC info should be printed after these passes.

Definition at line 545 of file CodeGenPassBuilder.h.

addGlobalInstructionSelect()

template<typename DerivedT, typename TargetMachineT>

This method should install a (global) instruction selector pass, which converts possibly generic instructions to fully target-specific instructions, thereby constraining all generic virtual registers to register classes.

Definition at line 483 of file CodeGenPassBuilder.h.

Referenced by addCoreISelPasses().

addGlobalMergePass()

template<typename DerivedT, typename TargetMachineT>

addILPOpts()

template<typename DerivedT, typename TargetMachineT>

addInstSelector()

template<typename DerivedT, typename TargetMachineT>

addInstSelector - This method should install an instruction selector pass, which converts from LLVM code to machine instructions.

Definition at line 379 of file CodeGenPassBuilder.h.

Referenced by addCoreISelPasses().

addIRPasses()

template<typename Derived, typename TargetMachineT>

addIRTranslator()

template<typename DerivedT, typename TargetMachineT>

This method should install an IR translator pass, which converts from LLVM code to machine instructions with possibly generic opcodes.

Definition at line 447 of file CodeGenPassBuilder.h.

Referenced by addCoreISelPasses().

addISelPasses()

template<typename Derived, typename TargetMachineT>

addISelPrepare()

template<typename Derived, typename TargetMachineT>

addLegalizeMachineIR()

template<typename DerivedT, typename TargetMachineT>

This method should install a legalize pass, which converts the instruction sequence into one that can be selected by the target.

Definition at line 458 of file CodeGenPassBuilder.h.

Referenced by addCoreISelPasses().

addMachineLateOptimization()

template<typename Derived, typename TargetMachineT>

Add passes that optimize machine instructions after register allocation.

Post RegAlloc Pass Configuration.

Add passes that optimize machine instructions after register allocation.

Definition at line 1311 of file CodeGenPassBuilder.h.

References Opt, and TM.

addMachinePasses()

template<typename Derived, typename TargetMachineT>

Add the complete, standard set of LLVM CodeGen passes.

Add the complete set of target-independent postISel code generator passes.

Fully developed targets will not generally override this.

This can be read as the standard order of major LLVM CodeGen stages. Stages with nontrivial configuration or multiple passes are broken out below in addStage routines.

Any CodeGenPassBuilder<Derived, TargetMachine>::addXX routine may be overriden by the Target. The addPre/Post methods with empty header implementations allow injecting target-specific fixups just before or after major stages. Additionally, targets have the flexibility to change pass order within a stage by overriding default implementation of addStage routines below. Each technique has maintainability tradeoffs because alternate pass orders are not well supported. addPre/Post works better if the target pass is easily tied to a common pass. But if it has subtle dependencies on multiple passes, the target should override the stage instead.

Add passes that optimize machine instructions after register allocation.

Definition at line 1004 of file CodeGenPassBuilder.h.

References addFastRegAlloc(), getOptLevel(), getTM(), llvm::NeverOutline, llvm::None, Opt, Options, llvm::Error::success(), llvm::TargetDefault, and TM.

Referenced by buildPipeline().

addMachineSSAOptimization()

template<typename Derived, typename TargetMachineT>

Methods with trivial inline returns are convenient points in the common codegen pass pipeline where targets may insert passes.

Add passes that optimize machine instructions in SSA form.

Methods with out-of-line standard implementations are major CodeGen stages called by addMachinePasses. Some targets may override major stages when inserting passes is insufficient, but maintaining overriden stages is more work. addMachineSSAOptimization - Add standard passes that optimize machine instructions in SSA form.

Definition at line 1115 of file CodeGenPassBuilder.h.

References Opt.

addOptimizedRegAlloc()

template<typename Derived, typename TargetMachineT>

addOptimizedRegAlloc - Add passes related to register allocation.

Add standard target-independent passes that are tightly coupled with optimized register allocation, including coalescing, machine instruction scheduling, and register allocation itself.

CodeGenTargetMachineImpl provides standard regalloc passes for most targets.

Definition at line 1247 of file CodeGenPassBuilder.h.

References addRegAssignmentOptimized(), Opt, and TM.

addPassesToHandleExceptions()

template<typename Derived, typename TargetMachineT>

Add passes to lower exception handling for the code generator.

Turn exception handling constructs into something the code generators can handle.

Definition at line 826 of file CodeGenPassBuilder.h.

References llvm::AIX, llvm::ARM, assert(), llvm::DwarfCFI, llvm::MCAsmInfo::getExceptionHandlingType(), llvm::None, llvm::SjLj, TM, llvm::Wasm, llvm::WinEH, and llvm::ZOS.

Referenced by addISelPasses().

addPostRegAlloc()

template<typename DerivedT, typename TargetMachineT>

This method may be implemented by targets that want to run passes after register allocation pass pipeline but before prolog-epilog insertion.

Definition at line 419 of file CodeGenPassBuilder.h.

addPostRewrite()

template<typename DerivedT, typename TargetMachineT>

Add passes to be run immediately after virtual registers are rewritten to physical registers.

Definition at line 415 of file CodeGenPassBuilder.h.

addPreEmitPass()

template<typename DerivedT, typename TargetMachineT>

This pass may be implemented by targets that want to run passes immediately before machine code is emitted.

Definition at line 427 of file CodeGenPassBuilder.h.

addPreEmitPass2()

template<typename DerivedT, typename TargetMachineT>

Targets may add passes immediately before machine code is emitted in this callback.

This is called even later than addPreEmitPass.

Definition at line 434 of file CodeGenPassBuilder.h.

addPreGlobalInstructionSelect()

template<typename DerivedT, typename TargetMachineT>

This method may be implemented by targets that want to run passes immediately before the (global) instruction selection.

Definition at line 477 of file CodeGenPassBuilder.h.

addPreISel()

template<typename DerivedT, typename TargetMachineT>

{{@ For GlobalISel

addPreISel - This method should add any "last minute" LLVM->LLVM passes (which are run just before instruction selector).

Definition at line 441 of file CodeGenPassBuilder.h.

addPreLegalizeMachineIR()

template<typename DerivedT, typename TargetMachineT>

This method may be implemented by targets that want to run passes immediately before legalization.

Definition at line 454 of file CodeGenPassBuilder.h.

addPreRegAlloc()

template<typename DerivedT, typename TargetMachineT>

This method may be implemented by targets that want to run passes immediately before register allocation.

Definition at line 397 of file CodeGenPassBuilder.h.

addPreRegBankSelect()

template<typename DerivedT, typename TargetMachineT>

This method may be implemented by targets that want to run passes immediately before the register bank selection.

Definition at line 465 of file CodeGenPassBuilder.h.

addPreRewrite()

template<typename DerivedT, typename TargetMachineT>

addPreRewrite - Add passes to the optimized register allocation pipeline after register allocation is complete, but before virtual registers are rewritten to physical registers.

These passes must preserve VirtRegMap and LiveIntervals, and when running after RABasic or RAGreedy, they should take advantage of LiveRegMatrix. When these passes run, VirtRegMap contains legal physreg assignments for all virtual registers.

Note if the target overloads addRegAssignAndRewriteOptimized, this may not be honored. This is also not generally used for the fast variant, where the allocation and rewriting are done in one pass.

Definition at line 411 of file CodeGenPassBuilder.h.

addPreSched2()

template<typename DerivedT, typename TargetMachineT>

This method may be implemented by targets that want to run passes after prolog-epilog insertion and before the second instruction scheduling pass.

Definition at line 423 of file CodeGenPassBuilder.h.

addRegAllocPass()

template<typename Derived, typename TargetMachineT>

addRegAssignmentFast()

template<typename Derived, typename TargetMachineT>

addRegAssignmentOptimized()

template<typename Derived, typename TargetMachineT>

addRegBankSelect()

template<typename DerivedT, typename TargetMachineT>

This method should install a register bank selector pass, which assigns register banks to virtual registers without a register class or register banks.

Definition at line 470 of file CodeGenPassBuilder.h.

Referenced by addCoreISelPasses().

addTargetRegisterAllocator()

template<typename Derived, typename TargetMachineT>

Utilities for targets to add passes to the pass manager.

Register Allocation Pass Configuration.

createTargetRegisterAllocator - Create the register allocator pass for this target at the current optimization level.

Instantiate the default register allocator pass for this target for either the optimized or unoptimized allocation path. This will be added to the pass manager by addFastRegAlloc in the unoptimized case or addOptimizedRegAlloc in the optimized case.

A target that uses the standard regalloc pass order for fast or optimized allocation may still override this for per-target regalloc selection. But -regalloc-npm=... always takes precedence. If a target does not want to allow users to set -regalloc-npm=... at all, check if Opt.RegAlloc == RegAllocType::Unset.

Definition at line 1169 of file CodeGenPassBuilder.h.

buildPipeline()

disablePass()

template<typename DerivedT, typename TargetMachineT>

template<typename... PassTs>

Allow the target to disable a specific pass by default.

Backend can declare unwanted passes in constructor.

Definition at line 574 of file CodeGenPassBuilder.h.

getOptLevel()

template<typename DerivedT, typename TargetMachineT>

getPassInstrumentationCallbacks()

template<typename DerivedT, typename TargetMachineT>

getTM()

template<typename DerivedT, typename TargetMachineT>

template

insertPass()

template<typename DerivedT, typename TargetMachineT>

template<typename TargetPassT, typename InsertedPassT>

Insert InsertedPass pass after TargetPass pass.

Only machine function passes are supported.

Definition at line 582 of file CodeGenPassBuilder.h.

isGlobalISelAbortEnabled()

template<typename DerivedT, typename TargetMachineT>

reportDiagnosticWhenGlobalISelFallback()

template<typename DerivedT, typename TargetMachineT>

Check whether or not a diagnostic should be emitted when GlobalISel uses the fallback path.

In other words, it will emit a diagnostic when GlobalISel failed and isGlobalISelAbortEnabled is false.

Definition at line 373 of file CodeGenPassBuilder.h.

Referenced by addCoreISelPasses().

Opt

template<typename DerivedT, typename TargetMachineT>

Definition at line 357 of file CodeGenPassBuilder.h.

Referenced by addBlockPlacement(), addCodeGenPrepare(), addCoreISelPasses(), addIRPasses(), addISelPrepare(), addMachineLateOptimization(), addMachinePasses(), addMachineSSAOptimization(), addOptimizedRegAlloc(), addRegAllocPass(), and buildPipeline().

PIC

template<typename DerivedT, typename TargetMachineT>

TM

template<typename DerivedT, typename TargetMachineT>


The documentation for this class was generated from the following file: